diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp | 31 |
1 files changed, 13 insertions, 18 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp index 9a16b99a71..7add5feb1d 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -24,33 +24,28 @@ #pragma once +#if defined(__aarch64__) + namespace arm_conv { namespace pooling { void a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(unsigned int, const float *const *const, float *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int); -struct a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst +struct a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst : public DepthfirstStrategy<float, float> { - typedef float operand_type; - typedef float return_type; - - typedef void (*kern_type)(unsigned int, const float *const *const, float *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int); - - constexpr static PoolingType pooling_type(void) { return PoolingType::AVERAGE; } + using Parent = DepthfirstStrategy<float, float>; - constexpr static unsigned int pool_rows(void) { return 3; } - constexpr static unsigned int pool_cols(void) { return 3; } + const static auto pooling_type = PoolingType::AVERAGE; + const static auto pool_rows = 3u, pool_cols = 3u; + const static auto stride_rows = 1u, stride_cols = 1u; - constexpr static unsigned int stride_rows(void) { return 1; } - constexpr static unsigned int stride_cols(void) { return 1; } + a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst(const CPUInfo *) + : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {} - constexpr static unsigned int out_rows(void) { return 2; } - constexpr static unsigned int out_cols(void) { return 2; } - - kern_type kernel = a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl; - - a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst(const CPUInfo *) {} + Parent::KernelType get_kernel(void) const { return a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl; } }; } // namespace pooling } // namespace arm_conv + +#endif // defined(__aarch64__) |