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| author | Sheri Zhang <sheri.zhang@arm.com> | 2021-01-04 17:14:23 +0000 |
|---|---|---|
| committer | Sheri Zhang <sheri.zhang@arm.com> | 2021-01-05 10:57:03 +0000 |
| commit | 97b3f11a1655c05bedaf378f85f94cdccb1536ba (patch) | |
| tree | f4cc9728700880240ffd7e7b377cb5c13c9fe311 | |
| parent | dff29359f46cccf1239b9ae109a773eadb320594 (diff) | |
| download | ComputeLibrary-97b3f11a1655c05bedaf378f85f94cdccb1536ba.tar.gz | |
COMPMID-4076: ArmNN unittest failure with memory access voilation in FuseReLUIntoBatchNormFloat32CpuAccTest
1. Fix fusable and non-fusable configuration issue
2. Fix FP16 issue
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Change-Id: I6d0eacca7ac437f236ad403ddb283c10c8f419a6
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4761
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
3 files changed, 22 insertions, 6 deletions
diff --git a/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp b/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp index b4cac74dc4..6f2c72a970 100644 --- a/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp +++ b/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2020 Arm Limited. + * Copyright (c) 2017-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -74,12 +74,14 @@ static const BatchNormalizationKernel available_kernels[] = [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F32; }, REGISTER_FP32_SVE(arm_compute::cpu::fp32_sve_batch_normalization) }, -#else /* !defined(__ARM_FEATURE_SVE) */ +#else /* !defined(__ARM_FEATURE_SVE) */ +#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { "fp16_neon_batch_normalization", [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F16; }, REGISTER_FP16_NEON(arm_compute::cpu::fp16_neon_batch_normalization) }, +#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ { "f32_neon_batch_normalization", [](const BatchNormalizationSelectorData & data) { return data.dt == DataType::F32; }, diff --git a/src/core/NEON/kernels/batchnormalization/impl/NEON/fp16.cpp b/src/core/NEON/kernels/batchnormalization/impl/NEON/fp16.cpp index dfadef34f7..fd17b98f7b 100644 --- a/src/core/NEON/kernels/batchnormalization/impl/NEON/fp16.cpp +++ b/src/core/NEON/kernels/batchnormalization/impl/NEON/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -138,7 +138,14 @@ namespace cpu void fp16_neon_batch_normalization(ITensor *src, ITensor *dst, const ITensor *mean, const ITensor *var, const ITensor *beta, const ITensor *gamma, float epsilon, ActivationLayerInfo &act_info, const Window &window) { - fused_map[act_info.activation()](src, dst, mean, var, beta, gamma, epsilon, act_info, window); + if(act_info.enabled()) + { + fused_map[act_info.activation()](src, dst, mean, var, beta, gamma, epsilon, act_info, window); + } + else + { + batch_normalization<detail::dummy<float16_t, 8>>(src, dst, mean, var, beta, gamma, epsilon, act_info, window); + } } } // namespace cpu } // namespace arm_compute diff --git a/src/core/NEON/kernels/batchnormalization/impl/NEON/fp32.cpp b/src/core/NEON/kernels/batchnormalization/impl/NEON/fp32.cpp index a24f7f624a..5b375e5d4d 100644 --- a/src/core/NEON/kernels/batchnormalization/impl/NEON/fp32.cpp +++ b/src/core/NEON/kernels/batchnormalization/impl/NEON/fp32.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -137,7 +137,14 @@ namespace cpu void fp32_neon_batch_normalization(ITensor *src, ITensor *dst, const ITensor *mean, const ITensor *var, const ITensor *beta, const ITensor *gamma, float epsilon, ActivationLayerInfo &act_info, const Window &window) { - fused_map[act_info.activation()](src, dst, mean, var, beta, gamma, epsilon, act_info, window); + if(act_info.enabled()) + { + fused_map[act_info.activation()](src, dst, mean, var, beta, gamma, epsilon, act_info, window); + } + else + { + batch_normalization<detail::dummy<float, 4>>(src, dst, mean, var, beta, gamma, epsilon, act_info, window); + } } } // namespace cpu } // namespace arm_compute |