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path: root/ethosu/vela/register_command_stream_generator.py
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2024-04-02MLBEDSW-8672: Add ext_key trackingWilliam Isaksson
- Add ext_key tracking. - Fix debug db cmd offsets being off by 4. Change-Id: Ib109a15a0a2c44d08021c3b1bc3bcc067240ac5c Signed-off-by: William Isaksson <william.isaksson@arm.com>
2024-01-26vela: Remove dead code from register command streamTim Hall
- Removed the unused function get_block_config_for_npu_op() Change-Id: If36e4fe65286c4e13e127473d20971a1b6eaa94b Signed-off-by: Tim Hall <tim.hall@arm.com>
2024-01-18CONV ops int16 tests failed after TensorFlow updateWilliam Isaksson
Adds support for setting the accumulator type using the quantized_bias_type attribute Change-Id: Ibde1149143b510a1c650a5a037d3ab92d878d7cd Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-11-21MLBEDSW-7871: Document new error types in APIWilliam Isaksson
- Documents Legality requirements of CMD1 payloads - Fixes a miss in the command stream checks. Signed-off-by: William Isaksson <william.isaksson@arm.com> Change-Id: I9b33dedfa66650fa3100f61fd158a385818b4d52
2023-11-02MLBEDSW-8117: Incorrect stride check for IFM/IFM2 and OFMBjörn Davidsson
The constraint check for the IFM/IFM2/OFM strides were coded according to an incorrect version of the specification. Changed the check to verify that the strides are a multiple of 16 bytes. Also changed the wording in the exception message to clarify if it is a stride or value violating the constraint. Test case had two stride settings violating the constraint, after this change one of them still fails the check, so no change to tests, except in comments clarifying what is being tested. Change-Id: I93815d8bb08303b5f747c947c0bbd461b12895e3 Signed-off-by: Björn Davidsson <bjoern.davidsson@arm.com>
2023-08-08MLBEDSW-7689: Document verbose command stream optionsTim Hall
- Documented High-Level and register-Level command stream options - Changed High-Level command stream display to show the name of the command - Fixed an issue with some operators not being displayed by the CLI option --verbose-operators - Changed an unneeded print in pass packing to a more useful assertion Change-Id: I9d53f19f4e32d0478209bc964724c27c935f66d6 Signed-off-by: Tim Hall <tim.hall@arm.com>
2023-07-31MLBEDSW-7718: Add cmd1 payload legality checksWilliam Isaksson
- checks that cmd1 payloads are legal in register_command_stream_generator, - adds unit tests Change-Id: I2bc23147f60fe090c71703f08d9cbaa279fac86e Signed-off-by: William Isaksson <william.isaksson@arm.com>
2023-07-11MLBEDSW-7728: Fix DMA_WAITs in register_command_stream_generatorAlexander Hansson
* Fix bug in register_command_stream_generator where certain high-level command streams resulted in missing DMA_WAIT commands * Add unit-tests for DMA_WAIT and KERNEL_WAIT commands Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com> Change-Id: Iabb3ea3e95fa1ef933c50356d047b6b3f5aeafe3
2022-11-16MLBEDSW-6620: Update copyright notice and yearsRickard Bolin
- Update copyright notices to use SPDX format and add OSS mail as contact. - Update years on files where it had been missed. Signed-off-by: Rickard Bolin <rickard.bolin@arm.com> Change-Id: I7e9715ea4e17b76252728c708e46df12ad67ab1f
2022-11-09MLBEDSW-6881 SHAPE single op network is optimised to nothing3.6.0.rc1Fredrik Svedberg
Fixed by adding an operation to copy the statically optimised data to the subgraph output. Change-Id: Ica757e37d5460237973444ffd39c7d2850f319e3 Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
2022-10-04MLBEDSW-6969 Remove RescaleAdd and RescaleMul operatorsFredrik Svedberg
Removed RescaleAdd and RescaleMul operators in favour of Operation.explicit_scale and removed Operation.rescale. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Idccd8851731d4bb8d4e84970e0fd6b409d7d4e45
2022-09-08MLEMBED-1918: Issue with REDUCE_SUM on Ethos-U65-5123.6.0.rc0Tim Hall
- Ethos-U65-512 requires the input to REDUCE_SUM to use NHWC format - Updated the graph optimiser format check to cover this condition - Added a exception check to the backend of the compiler to verify that this condition is not been violated by the external api or Vela internals Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I2f1fabcbd264daf77d5822349d855a3a32b12c64
2022-07-23MLBEDSW-4157: Add RESIZE_NEAREST_NEIGHBOR supportTim Hall
- Changed ResizeBilinear to support ResizeNearestNeighbor as well for 1x1 IFM, IFM equal OFM, and non-align corners - Added support for ResizeNearestNeighbor with align corners by converting to a DepthwiseConv - Updated supported operator unit tests - Added is_resize() helper function and some associated refactoring Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Id5bdf2a25e8aa6a4f28b7236250abf768141ce37
2022-07-23vela: OFM_SCALE refactorTim Hall
- Minor rework at the register command stream level Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I58495e40efa3a95bdf6febde530f9f73fa8be30b
2022-05-19MLBEDSW-6563: networks failing with memory area exceeded in vela3.4.0.rc2Tim Hall
- For allocations that have a hard memory limit the Hill Climb allocator should be given more attempts to find a solution that would fit - The fix is to use a memory limit when there is a hard constraint, and a minimum iteration count, reset on every improvement, when there is a soft constraint - Added maximum number iterations CLI option Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I19ff53a0b68412de280263626778a3102cbe52fa
2022-05-11MLBEDSW-6452: Add byte offset in command streamTim Hall
- Added the offset address to the command stream disassembly Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I55c6ef59878c90c21d41051c076da6c1f0fa4201
2022-03-31vela: Added debug info to external APITim Hall
- Added optional name attributes to operators and tensors Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I3b5d881a7b1043a6ba4b58fff5d7532b271ba536
2022-03-30Update version of Black to 22.3.0Jonas Ohlsson
Update version of Black to 22.3.0 due to updated dependencies. Updates to fix reported issues due to new version. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: I60056aae452093ce8dcea1f499ecced22b25eef1
2022-03-21MLBEDSW-3367 Add mypy to pre-commitJonas Ohlsson
Add mypy to pre-commit and clean up all reported errors. Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com> Change-Id: If7dc869f5fecdb0e2db40f14e7d9db21aa33df71
2021-12-02MLBEDSW-5717 Fix for sigmoid int16Patrik Gustavsson
Fixed issue with sigmoid int16 with 1/2048 scaling. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I32718757e3776e6be89fe94a9b38368c78f0006b
2021-09-03TOSA: Added support for ADD, SUB and MULPatrik Gustavsson
Added support for ADD, SUB and MUL Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I52acdc126b16e2cf4096bcf7a77023ea7d204998
2021-09-03TOSA: Support for AVGPOOL, MAXPOOL and CONV2DPatrik Gustavsson
Added support for -AVGPOOL and CONV2D with TFLite correspondence -MAXPOOL -additional support for replacing RESCALE ops with avgpool. No support for breaking down tensors over the size supported by NPU. Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com> Change-Id: I1d2aa50ac30a26283b3e6f1fe88cba1544b7c189
2021-08-16MLBEDSW-4738 Reinstate find_block_config from v2.1Jacob Bohlin
Reinstated the v2.1.0 functionality for find_block_configs(). This is used exclusively by the external API. Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com> Change-Id: I6977f13866957edb083769658cc8c57c2b3556fb
2021-06-17Block config optimisation for 256/512 configurationsTim Hall
- 256 and 512 configuration variants execute 1D convolutions in an optimised manner compared to their 2x2 microblock dimensions. This commit takes this into account to improve Conv1D throughput on these configurations. Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I6ecdf6e4a219e356327b22f8393f50ee8817af23
2021-05-27MLBEDSW-4034: New Scheduler Size or Performance OptimisationTim Hall
- Merged dev/scheduler at 83639f90e8c828f70de6e29142355a940224959b Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I0050529d4b42da93768c7264296434dd877fb5b4
2021-05-04MLBEDSW-4429: elementwise_broadcast output diffDwight Lidman
This commit fixes a regression caused by a recent commit where io_ranges and elementwise_broadcast were failing with off-by-one errors. The culprit was the incorrect usage of NATURAL rounding in cases of elementwise ADD and SUB where the input and output scales were equal and advanced scaling was not used. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I35d56298e911a4d1bbca7d201bcde6044c8a5490
2021-04-16MLBEDSW-3550 Only use simple scaling when bitexact with TFLiteHenrik G Olsson
For 8 bit arithmetic we cannot guarantee reproducibility in the general case since precision differs, affecting rounding near half integers. It should be safe when the ratio between output and input scales has its 12 LSBs all set to 0, however. For 16 bit arithmetic it should be sufficient to adjust the input and output scalings with a factor of 2 to get the same rounding. Signed-off-by: Henrik G Olsson <henrik.olsson@arm.com> Change-Id: I809c0042615d16c5488d61f0c7d88e1a1315e6eb
2021-03-31MLBEDSW-3502: Bug fix addresses >= 32 bitLouis Verhaard
Bug fix in generation of register command offsets that do not fit in 32 bit. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: Iabb99cf6536c0f77b934691f8744df61f1eab3ed
2021-03-30Performance improvement in tensor allocationLouis Verhaard
- Tensor allocation verification was O(N^2), is now closer to O(N) - Removed a sort in HillClimb allocator Change-Id: I286a269881490c485cc2b0eeab3b1ecffa8f3df0 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-03-25MLBEDSW-4071: Power of two handling 16-bit tanh/sigmoidLouis Verhaard
Added special handling of power-of-two input scales for 16-bit tanh/sigmoid to align with the reference. Change-Id: I87831bcd587623d7db7100e768905355c2c98e9d Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-03-22MLBEDSW-3502: Add address checksLouis Verhaard
Added checks during command stream generation to make sure that address boundaries are respected. Change-Id: I4dbc693b42d54e35c8fcc785e8be88059e409eec Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2021-03-19MLBEDSW-3458: Added command stream size check.erik.andersson@arm.com
If the command stream size exceeds a certain threshold, a VelaError will now be raised. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: I9b9383f4c298a778b160cd527374e9244e4cae26
2021-03-19Address generation fixMauricio Briceno
- The architecture supports address extensions wider than 32b via the cmd1.param Change-Id: I7a01b4596f7a54f6be05b8e2c454494e6751757b Signed-off-by: Mauricio Briceno <mauricio.briceno@arm.com>
2021-02-25MLBEDSW-4064: Update copyright headerserik.andersson@arm.com
All files which have been updated in 2021 and contain a copyright header have had their headers updated. Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com> Change-Id: Ia682111a719d16e690433398ccfb69c7e93c1cd1
2021-01-20[MLBEDSW-2787] Remove op.attrs["rescale"] in softmax.pyFredrik Svedberg
Added RescaleAdd operation to avoid non-standard attribute "rescale" for Add operation. Also changed ResizeBilinear in the same way. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: I1d286f63890585c06b8a161df1ff77e3f844a4b9
2020-12-14MLBEDSW-3653: Fix type errors in annotated filesDwight Lidman
This commit corrects a number of type errors reported by mypy and refactors some parts of the code which are no longer necessary after making adjustments to satisfy mypy. Signed-off-by: Dwight Lidman <dwight.lidman@arm.com> Change-Id: I16b880b228e57f2a92fb8936f53e94886e0f9f44
2020-12-07MLBEDSW-3643: Refactor blockdep calculationLouis Verhaard
Moved blockdep calculation and other helper functions for code generation to a separate file. Change-Id: I2f8ccea478654272ebf42217fc5c1800e9ad177a Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3562: Improve blockdep calculationLouis Verhaard
Blockdep calculation can now handle different sized IFM/OFM. Change-Id: I898a3c1c3a6778916802f3dbfa658328e5093096 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-26MLBEDSW-3599: Added API for finding block configsLouis Verhaard
Added public API function npu_find_block_configs. Change-Id: Ib0925a62d7c5d19a9b9fbd8d808943c2ea2df02f Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-23MLBEDSW-3425: Added external API for driver actionsLouis Verhaard
Added external API to add driver actions to a command stream. Change-Id: Ie4779c1c745defc5769fa694358470cd6aea191c Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-23MLBEDSW-3424: Expose API through separate fileLouis Verhaard
All external APIs are now exposed by api.py. Signed-off-by: Louis Verhaard <louis.verhaard@arm.com> Change-Id: I33f480e424692ac30e9c7d791f583199f31164a7
2020-11-20MLBEDSW-3249: Vela config file examplesTim Hall
- Added sample vela.ini config file - Changed vela config format, split into system config and memory mode - Removed unused CPU cycle performance estimation - Added new CLI options for --memory-mode and --verbose-config - Changed CLI option --config to take multiple files - Removed CLI option --global-memory-clock-scales - Changed error helper functions to raise a VelaError exception - Refactored to create a new is_spilling_enabled function Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I27c41577e37a3859edb9524cd99784be10ef0a0d
2020-11-20vela: Rename Yoda to Ethos-U65Tim Hall
- Also changed to use Ethos-U where appropriate Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Ie45ba2bb3935b305abe897b78b498681296cb7c1
2020-11-13MLBEDSW-839: Code generation using external API2.0.0.rc1Louis Verhaard
Added external API to generate register command streams. Existing code generation has been refactored to make use of this API. Change-Id: Ibb4c2b167809869f16470b14da24f08a65c82b7b Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-11-11MLBEDSW-3019: Add profiling debug databaseTim Hall
- Added mechanism to track input to output graph transforms for debugging the resultant command stream. - Provides base implementation for MLBEDSW-2661 Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I2dfe8a409fbde7ad0282bfab5acb11ba1c8b82d8
2020-11-11MLBEDSW-3222: Bias tensors in fast storageAndreas Nevalainen
For IFM streamed cascades bias tensors are read several times. Moves these tensors to fast storage and add DMA commands. Change-Id: I630f6275986c1b5e3f126c925b11e22500fb1128 Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
2020-10-21vela: Refactor operators to use Kernel objectsTim Hall
- Normalise kernel availability by requiring all operators offer a kernel describing how much data they consume from the source, per OFM element, regardless of whether kernels are relevant to the operation. Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: Idbcff64879fc2eccf292b6208a7d2038eb388017
2020-10-19MLBEDSW-3194: Updated elementwise IFM banks countAndreas Nevalainen
Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com> Change-Id: Ie404a0c13e7c7de0eff649f77e0147a0f3d73acd
2020-10-08MLBEDSW-3148: Refactor OperationLouis Verhaard
- op.type is now an enum instead of a string - Removed unused operator codes - Refactored some attributes like npu_block_type, fused_activation_function - Refactored operator index calculation - Refactored a number of operator sets Change-Id: I641f65ee375794b7aec42abc0664251ae37d78e8 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
2020-09-30[MLBEDSW-2802] Fix 5D tensor crashFredrik Svedberg
Fixed crash in networks with 5D tensors. Fixed crash for (int32) tensors without quantization. Added validity checks for concatenation. Moved unfusing of activation function from tflite_reader to graph_optimiser. Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com> Change-Id: Ib9ba8891dc95ef5491e15d0feedef44331a26393
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