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| author | William Isaksson <william.isaksson@arm.com> | 2024-01-10 12:28:04 +0100 |
|---|---|---|
| committer | Rickard Bolin <rickard.bolin@arm.com> | 2024-01-18 13:24:26 +0000 |
| commit | 56e5f0c22ebc995dae13c6b72b08b28934a7871a (patch) | |
| tree | c0e7a25770d6d3dc8f15782a0e4529aff081ef3c /ethosu/vela/register_command_stream_generator.py | |
| parent | 84fe2f60d5c6a25fa73d081cc90ee858ebca821d (diff) | |
| download | ethos-u-vela-56e5f0c22ebc995dae13c6b72b08b28934a7871a.tar.gz | |
CONV ops int16 tests failed after TensorFlow update
Adds support for setting the accumulator type using the quantized_bias_type attribute
Change-Id: Ibde1149143b510a1c650a5a037d3ab92d878d7cd
Signed-off-by: William Isaksson <william.isaksson@arm.com>
Diffstat (limited to 'ethosu/vela/register_command_stream_generator.py')
| -rw-r--r-- | ethosu/vela/register_command_stream_generator.py | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/ethosu/vela/register_command_stream_generator.py b/ethosu/vela/register_command_stream_generator.py index 9d9a1e63..ec01d3ed 100644 --- a/ethosu/vela/register_command_stream_generator.py +++ b/ethosu/vela/register_command_stream_generator.py @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: Copyright 2020-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> +# SPDX-FileCopyrightText: Copyright 2020-2024 Arm Limited and/or its affiliates <open-source-office@arm.com> # # SPDX-License-Identifier: Apache-2.0 # @@ -31,6 +31,7 @@ import numpy as np from . import scaling from .api import NpuAccelerator +from .api import NpuAccumulatorType from .api import NpuActivation from .api import NpuActivationOp from .api import NpuAddressRange @@ -270,6 +271,11 @@ acc_format_map = { SHRAMElements.Acc40: acc_format.INT_40BIT.value, } +npu_acc_format_map = { + NpuAccumulatorType.Int32: acc_format.INT_32BIT.value, + NpuAccumulatorType.Int40: acc_format.INT_40BIT.value, +} + resampling_mode_map = { NpuResamplingMode.NONE: resampling_mode.NONE, NpuResamplingMode.NEAREST: resampling_mode.NEAREST, @@ -574,7 +580,10 @@ def generate_shram_registers( emit.cmd0_with_param(cmd0.NPU_SET_AB_START, arch_block_config.layout.ab_start) if has_ifm2(npu_op): emit.cmd0_with_param(cmd0.NPU_SET_IFM2_IB_START, arch_block_config.layout.ib_start2) - emit.cmd0_with_param(cmd0.NPU_SET_ACC_FORMAT, acc_format_map[arch_block_config.acc_type]) + if npu_op.accumulator_type != NpuAccumulatorType.Default: + emit.cmd0_with_param(cmd0.NPU_SET_ACC_FORMAT, npu_acc_format_map[npu_op.accumulator_type]) + else: + emit.cmd0_with_param(cmd0.NPU_SET_ACC_FORMAT, acc_format_map[arch_block_config.acc_type]) def get_block_config_for_npu_op( |