1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
|
/*
* Copyright (c) 2017-2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef ACL_SRC_CPU_KERNELS_CPUIM2COLKERNEL_H
#define ACL_SRC_CPU_KERNELS_CPUIM2COLKERNEL_H
#include "arm_compute/core/Size2D.h"
#include "src/core/common/Macros.h"
#include "src/cpu/ICpuKernel.h"
namespace arm_compute
{
class ITensor;
namespace cpu
{
namespace kernels
{
/** Interface for the im2col reshape kernel.
*
* Rearranges image blocks into columns. It is used to strip out each convolution block to a single column.
* It is used to transform a convolution to a plain matrix multiplication.
*
* For example taking into account the image below and assuming 3x3 image blocks with stride of 1 we have:
*
* @f[
* \left( \begin{array}{cccc}
* a00 & a01 & a02 & a03 \\
* a10 & a11 & a12 & a13 \\
* a20 & a21 & a22 & a23 \\
* a30 & a31 & a32 & a33 \\
* \end{array} \right)
* \rightarrow
* \left( \begin{array}{ccccccccc}
* a00 & a01 & a02 & a10 & a11 & a12 & a20 & a21 & a22 \\
* a01 & a02 & a03 & a11 & a12 & a13 & a21 & a22 & a23 \\
* a10 & a11 & a12 & a20 & a21 & a22 & a30 & a31 & a32 \\
* a11 & a12 & a13 & a21 & a22 & a23 & a31 & a32 & a33 \\
* \end{array} \right)
* @f]
*/
class CpuIm2ColKernel : public ICpuKernel<CpuIm2ColKernel>
{
public:
/** Default constructor */
CpuIm2ColKernel() = default;
ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuIm2ColKernel);
/** Set the input and output of the kernel.
*
* @param[in] src The input tensor info to convert. 3 lower dimensions represent a single input [width, height, IFM],
* while every optional dimension from 4 and above represent a batch of inputs.
* Data types supported: QASYMM8/QASYMM8_SIGNED/BFLOAT16/F16/F32
* Note: QASYMM8/QASYMM8_SIGNED works only for has_bias = false
* @param[out] dst The output tensor info. Data types supported: Same as @p input
* @param[in] kernel_dims The kernel dimensions (width and height).
* @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo.
* @param[in] has_bias In case biases are provided expands the matrix with 1.
* @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
* @param[in] num_groups (Optional) Number of groups when performing a grouped convolution. num_groups != 1 is not supported
* @param[in] input_pad_right (Optional) When fast-math is selected, per element padding for the im2col matrix may be necessary
*/
void configure(const ITensorInfo *src,
ITensorInfo *dst,
const Size2D &kernel_dims,
const PadStrideInfo &conv_info,
bool has_bias,
const Size2D &dilation = Size2D(1U, 1U),
unsigned int num_groups = 1,
unsigned int input_pad_right = 0);
/** Static function to check if given info will lead to a valid configuration
*
* Similar to CpuIm2ColKernel::configure()
*
* @return a status
*/
static Status validate(const ITensorInfo *src,
const ITensorInfo *dst,
const Size2D &kernel_dims,
const PadStrideInfo &conv_info,
bool has_bias,
const Size2D &dilation = Size2D(1U, 1U),
unsigned int num_groups = 1,
unsigned int input_pad_right = 0);
// Inherited methods overridden:
void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override;
const char *name() const override;
/** Return minimum workload size of the relevant kernel
*
* @param[in] platform The CPU platform used to create the context.
* @param[in] thread_count Number of threads in the execution.
*
* @return[out] small_network_mws Minimum workload size for requsted configuration.
*/
size_t get_mws(const CPUInfo &platform, size_t thread_count) const override;
private:
/** Common signature for all the specialised im2col functions
*
* @param[in] window Region on which to execute the kernel.
*/
using Im2ColFunctionPtr = void (*)(const ITensor *src,
ITensor *dst,
const Window &window,
DataLayout data_layout,
const PadStrideInfo &conv_info,
std::pair<unsigned int, unsigned int> convolved_dims,
const Size2D &kernel_dims,
const Size2D &dilation,
uint32_t input_pad_right,
bool has_bias);
Im2ColFunctionPtr _func{nullptr};
std::pair<unsigned int, unsigned int> _convolved_dims{};
PadStrideInfo _conv_info{};
unsigned int _kernel_width{0};
unsigned int _kernel_height{0};
unsigned int _input_pad_right{0};
bool _has_bias{false};
Size2D _dilation{1U, 1U};
DataLayout _data_layout{DataLayout::UNKNOWN};
};
} // namespace kernels
} // namespace cpu
} // namespace arm_compute
#endif // ACL_SRC_CPU_KERNELS_CPUIM2COLKERNEL_H
|
