aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp
blob: e6090fda9432ae5e29c31c6e4d22c58a6c67230e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
/*
 * Copyright (c) 2021, 2023 Arm Limited.
 *
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to
 * deal in the Software without restriction, including without limitation the
 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
 * sell copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in all
 * copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <cstddef>
#include <cstdint>

#if defined(ARM_COMPUTE_ENABLE_SVE)

namespace arm_conv {
namespace depthwise {

void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl(
  const unsigned int n_tile_rows,
  const unsigned int n_tile_cols,
  const float *inptr,
  int64_t ld_input_row,
  int64_t ld_input_col,
  float *outptr,
  int64_t ld_output_row,
  int64_t ld_output_col,
  const void *params,
  unsigned int n_channels,
  const float activation_min,
  const float activation_max
)
{
  struct Args
  {
    const uint64_t n_tile_rows, n_tile_cols;
    const float *inptr;
    const uint64_t ld_input_row;
    const uint64_t ld_input_col;
    float *outptr;
    const uint64_t ld_output_row;
    const uint64_t ld_output_col;
    const void *params;
    const float min, max;

    uint64_t tile_i = 0, tile_j = 0;

    Args(
      const unsigned int n_tile_rows,
      const unsigned int n_tile_cols,
      const float *inptr,
      int64_t ld_input_row,
      int64_t ld_input_col,
      float *outptr,
      int64_t ld_output_row,
      int64_t ld_output_col,
      const void *params,
      const float activation_min,
      const float activation_max
    ) : n_tile_rows(n_tile_rows), n_tile_cols(n_tile_cols), inptr(inptr),
        ld_input_row(ld_input_row), ld_input_col(ld_input_col), outptr(outptr),
        ld_output_row(ld_output_row), ld_output_col(ld_output_col),
        params(params), min(activation_min), max(activation_max)
    {
    }
  };

  Args params_struct(
    n_tile_rows, n_tile_cols,
    inptr, ld_input_row, ld_input_col,
    outptr, ld_output_row, ld_output_col,
    params, activation_min, activation_max
  );

  __asm__ __volatile__(
    "ptrue p3.b\n"
    "mov x11, #0x0\n"
    "mov x16, #0x0\n"
    "1:"  // Tile loop
    "str x11, [%x[params_struct], %[offsetof_args_tile_i]]\n"
    "mov x25, #0x4\n"
    "mov x24, #0x2\n"
    "str x16, [%x[params_struct], %[offsetof_args_tile_j]]\n"
    "ldr x23, [%x[params_struct], %[offsetof_args_ld_input_row]]\n"
    "ldr x15, [%x[params_struct], %[offsetof_args_ld_input_col]]\n"
    "mul x22, x11, x23\n"  // offset = tile_i * ld_input_row
    "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n"
    "madd x22, x16, x15, x22\n"  // offset += tile_j * ld_input_col
    "ldr x14, [%x[params_struct], %[offsetof_args_ld_output_col]]\n"
    "cntw x13\n"
    "mul x20, x11, x21\n"  // offset = tile_i * ld_output_row
    "ldr x12, [%x[params_struct], %[offsetof_args_inptr]]\n"
    "ldr x11, [%x[params_struct], %[offsetof_args_params]]\n"
    "add x10, x15, x15\n"
    "mul x22, x22, x25\n"  // offset *= kernel_stride * output_size
    "add x12, x12, x22, LSL #2\n"  // inptr[0] += offset * sizeof(float)
    "ldr x9, [%x[params_struct], %[offsetof_args_outptr]]\n"
    "add x28, x12, x23, LSL #2\n"
    "madd x20, x16, x14, x20\n"  // offset += tile_j * ld_output_col
    "whilelt p2.s, XZR, %x[n_channels]\n"
    "ld1w { z30.s }, p3/Z, [x11]\n"
    "ld1w { z0.s }, p3/Z, [x11, #1, MUL VL]\n"
    "mul x20, x20, x24\n"  // offset *= output_tile_size
    "ld1w { z1.s }, p3/Z, [x11, #2, MUL VL]\n"
    "ld1w { z2.s }, p3/Z, [x11, #3, MUL VL]\n"
    "add x27, x28, x23, LSL #2\n"
    "ld1w { z3.s }, p3/Z, [x11, #4, MUL VL]\n"
    "ld1w { z4.s }, p3/Z, [x11, #5, MUL VL]\n"
    "add x26, x10, x15\n"
    "add x25, x27, x23, LSL #2\n"
    "ld1w { z5.s }, p3/Z, [x11, #6, MUL VL]\n"
    "ld1w { z6.s }, p3/Z, [x11, #7, MUL VL]\n"
    "addvl x11, x11, #16\n"
    "add x24, x26, x15\n"
    "add x9, x9, x20, LSL #2\n"  // outptrs[0] += offset * sizeof(float)
    "cmp x13, %x[n_channels]\n"
    "ld1rw { z29.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
    "ld1rw { z28.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
    "add x23, x25, x23, LSL #2\n"
    "add x22, x9, x21, LSL #2\n"
    "ld1w { z7.s }, p3/Z, [x11, #-8, MUL VL]\n"
    "ld1w { z8.s }, p3/Z, [x11, #-7, MUL VL]\n"
    "mov x21, #0x0\n"
    "sub x20, XZR, x13\n"
    "ld1w { z9.s }, p2/Z, [x27, x10, LSL #2]\n"
    "ld1w { z10.s }, p2/Z, [x12]\n"
    "ld1w { z11.s }, p2/Z, [x12, x15, LSL #2]\n"
    "ld1w { z12.s }, p2/Z, [x12, x26, LSL #2]\n"
    "addvl x11, x11, #-6\n"
    "ld1w { z13.s }, p2/Z, [x12, x24, LSL #2]\n"
    "ld1w { z14.s }, p2/Z, [x28]\n"
    "ld1w { z15.s }, p2/Z, [x28, x15, LSL #2]\n"
    "ld1w { z16.s }, p2/Z, [x12, x10, LSL #2]\n"
    "bge 3f\n"
    "2:"  // Tile loop: Channel loop
    "movprfx z27, z30\n fmla z27.s, p3/M, z8.s, z9.s\n"
    "movprfx z26, z30\n fmla z26.s, p3/M, z6.s, z9.s\n"
    "whilelt p1.s, x13, %x[n_channels]\n"
    "incw x21\n"
    "fmla z27.s, p3/M, z0.s, z10.s\n"
    "fmla z26.s, p3/M, z1.s, z12.s\n"
    "ld1w { z20.s }, p2/Z, [x28, x24, LSL #2]\n"
    "incw x13\n"
    "fmla z27.s, p3/M, z1.s, z11.s\n"
    "fmla z26.s, p3/M, z2.s, z13.s\n"
    "ld1w { z17.s }, p2/Z, [x28, x26, LSL #2]\n"
    "ld1w { z19.s }, p2/Z, [x28, x10, LSL #2]\n"
    "fmla z27.s, p3/M, z3.s, z14.s\n"
    "fmla z26.s, p3/M, z0.s, z16.s\n"
    "ld1w { z18.s }, p2/Z, [x25]\n"
    "mov p0.b, p2.b\n"
    "fmla z27.s, p3/M, z4.s, z15.s\n"
    "fmla z26.s, p3/M, z4.s, z17.s\n"
    "ld1w { z25.s }, p2/Z, [x27]\n"
    "ld1w { z17.s }, p2/Z, [x25, x15, LSL #2]\n"
    "fmla z27.s, p3/M, z2.s, z16.s\n"
    "fmla z26.s, p3/M, z5.s, z20.s\n"
    "ld1w { z24.s }, p2/Z, [x27, x26, LSL #2]\n"
    "ld1w { z23.s }, p2/Z, [x27, x15, LSL #2]\n"
    "movprfx z22, z30\n fmla z22.s, p3/M, z2.s, z9.s\n"
    "movprfx z21, z30\n fmla z21.s, p3/M, z0.s, z9.s\n"
    "addvl x12, x12, #1\n"
    "addvl x28, x28, #1\n"
    "fmla z27.s, p3/M, z5.s, z19.s\n"
    "fmla z26.s, p3/M, z3.s, z19.s\n"
    "ld1w { z16.s }, p2/Z, [x25, x26, LSL #2]\n"
    "ld1w { z30.s }, p3/Z, [x11]\n"
    "fmla z22.s, p3/M, z3.s, z18.s\n"
    "fmla z21.s, p3/M, z4.s, z16.s\n"
    "ld1w { z16.s }, p2/Z, [x25, x24, LSL #2]\n"
    "ld1w { z20.s }, p2/Z, [x23, x15, LSL #2]\n"
    "fmla z22.s, p3/M, z0.s, z25.s\n"
    "fmla z21.s, p3/M, z1.s, z24.s\n"
    "ld1w { z0.s }, p3/Z, [x11, #1, MUL VL]\n"
    "incw x20\n"
    "fmla z22.s, p3/M, z4.s, z17.s\n"
    "fmla z21.s, p3/M, z5.s, z16.s\n"
    "ld1w { z19.s }, p2/Z, [x27, x24, LSL #2]\n"
    "ld1w { z18.s }, p2/Z, [x23, x26, LSL #2]\n"
    "fmla z27.s, p3/M, z6.s, z25.s\n"
    "fmla z22.s, p3/M, z1.s, z23.s\n"
    "ld1w { z17.s }, p2/Z, [x23]\n"
    "addvl x27, x27, #1\n"
    "fmla z21.s, p3/M, z2.s, z19.s\n"
    "fmla z27.s, p3/M, z7.s, z23.s\n"
    "ld1w { z16.s }, p2/Z, [x25, x10, LSL #2]\n"
    "fmax z27.s, p3/M, z27.s, z29.s\n"
    "fmla z22.s, p3/M, z6.s, z17.s\n"
    "fmla z21.s, p3/M, z3.s, z16.s\n"
    "ld1w { z17.s }, p2/Z, [x23, x10, LSL #2]\n"
    "ld1w { z1.s }, p3/Z, [x11, #2, MUL VL]\n"
    "fmla z22.s, p3/M, z7.s, z20.s\n"
    "fmla z21.s, p3/M, z7.s, z18.s\n"
    "ld1w { z2.s }, p3/Z, [x11, #3, MUL VL]\n"
    "ld1w { z3.s }, p3/Z, [x11, #4, MUL VL]\n"
    "fmla z26.s, p3/M, z7.s, z24.s\n"
    "fmla z22.s, p3/M, z5.s, z16.s\n"
    "ld1w { z4.s }, p3/Z, [x11, #5, MUL VL]\n"
    "ld1w { z5.s }, p3/Z, [x11, #6, MUL VL]\n"
    "fmla z21.s, p3/M, z6.s, z17.s\n"
    "fmla z26.s, p3/M, z8.s, z19.s\n"
    "ld1w { z16.s }, p2/Z, [x23, x24, LSL #2]\n"
    "fmax z26.s, p3/M, z26.s, z29.s\n"
    "fmla z22.s, p3/M, z8.s, z17.s\n"
    "fmla z21.s, p3/M, z8.s, z16.s\n"
    "fmax z22.s, p3/M, z22.s, z29.s\n"
    "fmax z21.s, p3/M, z21.s, z29.s\n"
    "ld1w { z6.s }, p3/Z, [x11, #7, MUL VL]\n"
    "addvl x11, x11, #16\n"
    "whilelt p2.s, x21, %x[n_channels]\n"
    "ld1w { z9.s }, p1/Z, [x27, x10, LSL #2]\n"
    "cmp x13, %x[n_channels]\n"
    "fmin z27.s, p3/M, z27.s, z28.s\n"
    "ld1w { z10.s }, p1/Z, [x12]\n"
    "ld1w { z11.s }, p1/Z, [x12, x15, LSL #2]\n"
    "fmin z26.s, p3/M, z26.s, z28.s\n"
    "fmin z22.s, p3/M, z22.s, z28.s\n"
    "ld1w { z12.s }, p1/Z, [x12, x26, LSL #2]\n"
    "ld1w { z13.s }, p1/Z, [x12, x24, LSL #2]\n"
    "fmin z21.s, p3/M, z21.s, z28.s\n"
    "addvl x25, x25, #1\n"
    "ld1w { z14.s }, p1/Z, [x28]\n"
    "ld1w { z15.s }, p1/Z, [x28, x15, LSL #2]\n"
    "addvl x23, x23, #1\n"
    "ld1w { z16.s }, p1/Z, [x12, x10, LSL #2]\n"
    "st1w { z27.s }, p0, [x9]\n"
    "ld1w { z7.s }, p3/Z, [x11, #-8, MUL VL]\n"
    "st1w { z26.s }, p0, [x9, x14, LSL #2]\n"
    "addvl x9, x9, #1\n"
    "ld1w { z8.s }, p3/Z, [x11, #-7, MUL VL]\n"
    "addvl x11, x11, #-6\n"
    "st1w { z22.s }, p0, [x22]\n"
    "st1w { z21.s }, p0, [x22, x14, LSL #2]\n"
    "addvl x22, x22, #1\n"
    "blt 2b\n"
    "3:"  // Tile loop: Channel tail
    "movprfx z27, z30\n fmla z27.s, p3/M, z8.s, z9.s\n"
    "movprfx z26, z30\n fmla z26.s, p3/M, z6.s, z9.s\n"
    "ldr x16, [%x[params_struct], %[offsetof_args_tile_j]]\n"
    "ldr x11, [%x[params_struct], %[offsetof_args_tile_i]]\n"
    "fmla z27.s, p3/M, z0.s, z10.s\n"
    "fmla z26.s, p3/M, z1.s, z12.s\n"
    "ld1w { z20.s }, p2/Z, [x28, x24, LSL #2]\n"
    "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
    "fmla z27.s, p3/M, z1.s, z11.s\n"
    "fmla z26.s, p3/M, z2.s, z13.s\n"
    "ld1w { z17.s }, p2/Z, [x28, x26, LSL #2]\n"
    "ld1w { z19.s }, p2/Z, [x28, x10, LSL #2]\n"
    "fmla z27.s, p3/M, z3.s, z14.s\n"
    "fmla z26.s, p3/M, z0.s, z16.s\n"
    "ld1w { z18.s }, p2/Z, [x25]\n"
    "add x16, x16, #0x1\n"
    "fmla z27.s, p3/M, z4.s, z15.s\n"
    "fmla z26.s, p3/M, z4.s, z17.s\n"
    "ld1w { z25.s }, p2/Z, [x27]\n"
    "ld1w { z17.s }, p2/Z, [x25, x15, LSL #2]\n"
    "fmla z27.s, p3/M, z2.s, z16.s\n"
    "fmla z26.s, p3/M, z5.s, z20.s\n"
    "ld1w { z24.s }, p2/Z, [x27, x26, LSL #2]\n"
    "ld1w { z23.s }, p2/Z, [x27, x15, LSL #2]\n"
    "movprfx z22, z30\n fmla z22.s, p3/M, z2.s, z9.s\n"
    "movprfx z21, z30\n fmla z21.s, p3/M, z0.s, z9.s\n"
    "cmp x16, x20\n"
    "add x21, x11, #0x1\n"
    "fmla z27.s, p3/M, z5.s, z19.s\n"
    "fmla z26.s, p3/M, z3.s, z19.s\n"
    "ld1w { z16.s }, p2/Z, [x25, x26, LSL #2]\n"
    "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n"
    "fmla z22.s, p3/M, z3.s, z18.s\n"
    "fmla z21.s, p3/M, z4.s, z16.s\n"
    "ld1w { z16.s }, p2/Z, [x25, x24, LSL #2]\n"
    "ld1w { z20.s }, p2/Z, [x23, x15, LSL #2]\n"
    "fmla z22.s, p3/M, z0.s, z25.s\n"
    "fmla z21.s, p3/M, z1.s, z24.s\n"
    "csel x11, x11, x21, LT\n"
    "mov p0.b, p2.b\n"
    "fmla z22.s, p3/M, z4.s, z17.s\n"
    "fmla z21.s, p3/M, z5.s, z16.s\n"
    "ld1w { z19.s }, p2/Z, [x27, x24, LSL #2]\n"
    "ld1w { z18.s }, p2/Z, [x23, x26, LSL #2]\n"
    "fmla z27.s, p3/M, z6.s, z25.s\n"
    "fmla z22.s, p3/M, z1.s, z23.s\n"
    "ld1w { z17.s }, p2/Z, [x23]\n"
    "csel x16, x16, XZR, LT\n"
    "fmla z21.s, p3/M, z2.s, z19.s\n"
    "fmla z27.s, p3/M, z7.s, z23.s\n"
    "ld1w { z16.s }, p2/Z, [x25, x10, LSL #2]\n"
    "fmax z27.s, p3/M, z27.s, z29.s\n"
    "fmla z22.s, p3/M, z6.s, z17.s\n"
    "fmla z21.s, p3/M, z3.s, z16.s\n"
    "ld1w { z17.s }, p2/Z, [x23, x10, LSL #2]\n"
    "cmp x11, x20\n"
    "fmla z22.s, p3/M, z7.s, z20.s\n"
    "fmla z21.s, p3/M, z7.s, z18.s\n"
    "fmin z27.s, p3/M, z27.s, z28.s\n"
    "st1w { z27.s }, p0, [x9]\n"
    "fmla z26.s, p3/M, z7.s, z24.s\n"
    "fmla z22.s, p3/M, z5.s, z16.s\n"
    "fmla z21.s, p3/M, z6.s, z17.s\n"
    "fmla z26.s, p3/M, z8.s, z19.s\n"
    "ld1w { z16.s }, p2/Z, [x23, x24, LSL #2]\n"
    "fmax z26.s, p3/M, z26.s, z29.s\n"
    "fmla z22.s, p3/M, z8.s, z17.s\n"
    "fmla z21.s, p3/M, z8.s, z16.s\n"
    "fmax z22.s, p3/M, z22.s, z29.s\n"
    "fmax z21.s, p3/M, z21.s, z29.s\n"
    "fmin z26.s, p3/M, z26.s, z28.s\n"
    "fmin z22.s, p3/M, z22.s, z28.s\n"
    "st1w { z26.s }, p0, [x9, x14, LSL #2]\n"
    "fmin z21.s, p3/M, z21.s, z28.s\n"
    "st1w { z22.s }, p0, [x22]\n"
    "st1w { z21.s }, p0, [x22, x14, LSL #2]\n"
    "blt 1b\n"
    :
    : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (&params_struct)
    : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30"
  );
}

}  // namespace depthwise
}  // namespace arm_conv

#endif  // defined(ARM_COMPUTE_ENABLE_SVE)