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Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/a64fx.cpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/a64fx.cpp182
1 files changed, 93 insertions, 89 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/a64fx.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/a64fx.cpp
index a7ca48d87a..c668a7b746 100644
--- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/a64fx.cpp
+++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/a64fx.cpp
@@ -29,8 +29,12 @@
namespace arm_gemm {
void sve_interleaved_s8s32_dot_8x3VL_a64fx(
- const int8_t *Apanel, const int8_t *Bpanel,
- int32_t *Cpanel, int ablocks, int bblocks, int K) {
+ const int8_t *Apanel,
+ const int8_t *Bpanel,
+ int32_t *Cpanel,
+ int ablocks,
+ int bblocks,
+ int K) {
struct KernelArgs {
size_t K = {};
@@ -89,7 +93,7 @@ void sve_interleaved_s8s32_dot_8x3VL_a64fx(
"sdot z9.s, z1.b, z3.b\n"
"sub x20, x20, #0x2\n"
"sdot z10.s, z2.b, z3.b\n"
- "ld1rw { z3.s }, p0/Z, [%x[Apanel], #16]\n"
+ "ld1rw { z7.s }, p0/Z, [%x[Apanel], #16]\n"
"sdot z11.s, z0.b, z4.b\n"
"sdot z12.s, z1.b, z4.b\n"
"sdot z13.s, z2.b, z4.b\n"
@@ -98,63 +102,63 @@ void sve_interleaved_s8s32_dot_8x3VL_a64fx(
"sdot z15.s, z1.b, z5.b\n"
"cmp x20, #0x2\n"
"sdot z16.s, z2.b, z5.b\n"
- "ld1rw { z5.s }, p0/Z, [%x[Apanel], #24]\n"
+ "ld1rw { z3.s }, p0/Z, [%x[Apanel], #24]\n"
"sdot z17.s, z0.b, z6.b\n"
"sdot z18.s, z1.b, z6.b\n"
"sdot z19.s, z2.b, z6.b\n"
- "ld1rw { z6.s }, p0/Z, [%x[Apanel], #28]\n"
- "sdot z20.s, z0.b, z3.b\n"
- "sdot z21.s, z1.b, z3.b\n"
- "sdot z22.s, z2.b, z3.b\n"
- "ld1rw { z3.s }, p0/Z, [%x[Apanel], #32]\n"
+ "ld1rw { z5.s }, p0/Z, [%x[Apanel], #28]\n"
+ "sdot z20.s, z0.b, z7.b\n"
+ "sdot z21.s, z1.b, z7.b\n"
+ "sdot z22.s, z2.b, z7.b\n"
+ "ld1rw { z7.s }, p0/Z, [%x[Apanel], #32]\n"
"sdot z23.s, z0.b, z4.b\n"
"sdot z24.s, z1.b, z4.b\n"
"sdot z25.s, z2.b, z4.b\n"
"ld1rw { z4.s }, p0/Z, [%x[Apanel], #36]\n"
- "sdot z26.s, z0.b, z5.b\n"
- "sdot z27.s, z1.b, z5.b\n"
- "sdot z28.s, z2.b, z5.b\n"
- "ld1rw { z5.s }, p0/Z, [%x[Apanel], #40]\n"
- "sdot z29.s, z0.b, z6.b\n"
- "ld1b { z0.b }, p0/Z, [x22, #3, MUL VL]\n"
- "sdot z30.s, z1.b, z6.b\n"
- "sdot z31.s, z2.b, z6.b\n"
- "ld1b { z1.b }, p0/Z, [x22, #4, MUL VL]\n"
- "ld1b { z2.b }, p0/Z, [x22, #5, MUL VL]\n"
- "sdot z8.s, z0.b, z3.b\n"
- "ld1rw { z6.s }, p0/Z, [%x[Apanel], #44]\n"
- "sdot z9.s, z1.b, z3.b\n"
- "sdot z10.s, z2.b, z3.b\n"
- "sdot z11.s, z0.b, z4.b\n"
- "ld1rw { z3.s }, p0/Z, [%x[Apanel], #48]\n"
- "sdot z12.s, z1.b, z4.b\n"
- "sdot z13.s, z2.b, z4.b\n"
+ "sdot z26.s, z0.b, z3.b\n"
+ "sdot z27.s, z1.b, z3.b\n"
+ "sdot z28.s, z2.b, z3.b\n"
+ "ld1rw { z3.s }, p0/Z, [%x[Apanel], #40]\n"
+ "sdot z29.s, z0.b, z5.b\n"
+ "ld1b { z6.b }, p0/Z, [x22, #3, MUL VL]\n"
+ "sdot z30.s, z1.b, z5.b\n"
+ "sdot z31.s, z2.b, z5.b\n"
+ "ld1b { z2.b }, p0/Z, [x22, #4, MUL VL]\n"
+ "ld1b { z5.b }, p0/Z, [x22, #5, MUL VL]\n"
+ "sdot z8.s, z6.b, z7.b\n"
+ "ld1rw { z1.s }, p0/Z, [%x[Apanel], #44]\n"
+ "sdot z9.s, z2.b, z7.b\n"
+ "sdot z10.s, z5.b, z7.b\n"
+ "sdot z11.s, z6.b, z4.b\n"
+ "ld1rw { z7.s }, p0/Z, [%x[Apanel], #48]\n"
+ "sdot z12.s, z2.b, z4.b\n"
+ "sdot z13.s, z5.b, z4.b\n"
"ld1rw { z4.s }, p0/Z, [%x[Apanel], #52]\n"
- "sdot z14.s, z0.b, z5.b\n"
- "sdot z15.s, z1.b, z5.b\n"
+ "sdot z14.s, z6.b, z3.b\n"
+ "sdot z15.s, z2.b, z3.b\n"
"addvl x22, x22, #6\n"
- "sdot z16.s, z2.b, z5.b\n"
- "ld1rw { z5.s }, p0/Z, [%x[Apanel], #56]\n"
- "sdot z17.s, z0.b, z6.b\n"
- "sdot z18.s, z1.b, z6.b\n"
- "sdot z19.s, z2.b, z6.b\n"
- "ld1rw { z6.s }, p0/Z, [%x[Apanel], #60]\n"
+ "sdot z16.s, z5.b, z3.b\n"
+ "ld1rw { z0.s }, p0/Z, [%x[Apanel], #56]\n"
+ "sdot z17.s, z6.b, z1.b\n"
+ "sdot z18.s, z2.b, z1.b\n"
+ "sdot z19.s, z5.b, z1.b\n"
+ "ld1rw { z1.s }, p0/Z, [%x[Apanel], #60]\n"
"add %x[Apanel], %x[Apanel], #0x40\n"
- "sdot z20.s, z0.b, z3.b\n"
- "sdot z21.s, z1.b, z3.b\n"
- "sdot z22.s, z2.b, z3.b\n"
- "sdot z23.s, z0.b, z4.b\n"
+ "sdot z20.s, z6.b, z7.b\n"
+ "sdot z21.s, z2.b, z7.b\n"
+ "sdot z22.s, z5.b, z7.b\n"
+ "sdot z23.s, z6.b, z4.b\n"
"ld1rw { z3.s }, p0/Z, [%x[Apanel]]\n"
- "sdot z24.s, z1.b, z4.b\n"
- "sdot z25.s, z2.b, z4.b\n"
+ "sdot z24.s, z2.b, z4.b\n"
+ "sdot z25.s, z5.b, z4.b\n"
"ld1rw { z4.s }, p0/Z, [%x[Apanel], #4]\n"
- "sdot z26.s, z0.b, z5.b\n"
- "sdot z27.s, z1.b, z5.b\n"
- "sdot z28.s, z2.b, z5.b\n"
- "sdot z29.s, z0.b, z6.b\n"
+ "sdot z26.s, z6.b, z0.b\n"
+ "sdot z27.s, z2.b, z0.b\n"
+ "sdot z28.s, z5.b, z0.b\n"
+ "sdot z29.s, z6.b, z1.b\n"
"ld1b { z0.b }, p0/Z, [x22]\n"
- "sdot z30.s, z1.b, z6.b\n"
- "sdot z31.s, z2.b, z6.b\n"
+ "sdot z30.s, z2.b, z1.b\n"
+ "sdot z31.s, z5.b, z1.b\n"
"ld1b { z1.b }, p0/Z, [x22, #1, MUL VL]\n"
"ld1b { z2.b }, p0/Z, [x22, #2, MUL VL]\n"
"ld1rw { z5.s }, p0/Z, [%x[Apanel], #8]\n"
@@ -165,7 +169,7 @@ void sve_interleaved_s8s32_dot_8x3VL_a64fx(
"sdot z9.s, z1.b, z3.b\n"
"addvl x22, x22, #3\n"
"sdot z10.s, z2.b, z3.b\n"
- "ld1rw { z3.s }, p0/Z, [%x[Apanel], #16]\n"
+ "ld1rw { z7.s }, p0/Z, [%x[Apanel], #16]\n"
"sdot z11.s, z0.b, z4.b\n"
"sdot z12.s, z1.b, z4.b\n"
"sdot z13.s, z2.b, z4.b\n"
@@ -177,58 +181,58 @@ void sve_interleaved_s8s32_dot_8x3VL_a64fx(
"sdot z17.s, z0.b, z6.b\n"
"sdot z18.s, z1.b, z6.b\n"
"sdot z19.s, z2.b, z6.b\n"
- "ld1rw { z6.s }, p0/Z, [%x[Apanel], #28]\n"
- "sdot z20.s, z0.b, z3.b\n"
- "sdot z21.s, z1.b, z3.b\n"
+ "ld1rw { z3.s }, p0/Z, [%x[Apanel], #28]\n"
+ "sdot z20.s, z0.b, z7.b\n"
+ "sdot z21.s, z1.b, z7.b\n"
"add %x[Apanel], %x[Apanel], #0x20\n"
- "sdot z22.s, z2.b, z3.b\n"
+ "sdot z22.s, z2.b, z7.b\n"
"sdot z23.s, z0.b, z4.b\n"
"sdot z24.s, z1.b, z4.b\n"
"sdot z25.s, z2.b, z4.b\n"
"sdot z26.s, z0.b, z5.b\n"
"sdot z27.s, z1.b, z5.b\n"
"sdot z28.s, z2.b, z5.b\n"
- "sdot z29.s, z0.b, z6.b\n"
- "sdot z30.s, z1.b, z6.b\n"
- "sdot z31.s, z2.b, z6.b\n"
+ "sdot z29.s, z0.b, z3.b\n"
+ "sdot z30.s, z1.b, z3.b\n"
+ "sdot z31.s, z2.b, z3.b\n"
"cbz x20, 5f\n"
- "ld1b { z0.b }, p0/Z, [x22]\n"
- "ld1b { z1.b }, p0/Z, [x22, #1, MUL VL]\n"
- "ld1b { z2.b }, p0/Z, [x22, #2, MUL VL]\n"
+ "ld1b { z6.b }, p0/Z, [x22]\n"
+ "ld1b { z5.b }, p0/Z, [x22, #1, MUL VL]\n"
+ "ld1b { z4.b }, p0/Z, [x22, #2, MUL VL]\n"
"ld1rw { z3.s }, p0/Z, [%x[Apanel]]\n"
- "sdot z8.s, z0.b, z3.b\n"
- "ld1rw { z4.s }, p0/Z, [%x[Apanel], #4]\n"
- "ld1rw { z5.s }, p0/Z, [%x[Apanel], #8]\n"
- "sdot z9.s, z1.b, z3.b\n"
- "ld1rw { z6.s }, p0/Z, [%x[Apanel], #12]\n"
- "sdot z10.s, z2.b, z3.b\n"
- "sdot z11.s, z0.b, z4.b\n"
- "sdot z12.s, z1.b, z4.b\n"
- "sdot z13.s, z2.b, z4.b\n"
+ "sdot z8.s, z6.b, z3.b\n"
+ "ld1rw { z2.s }, p0/Z, [%x[Apanel], #4]\n"
+ "ld1rw { z1.s }, p0/Z, [%x[Apanel], #8]\n"
+ "sdot z9.s, z5.b, z3.b\n"
+ "ld1rw { z0.s }, p0/Z, [%x[Apanel], #12]\n"
+ "sdot z10.s, z4.b, z3.b\n"
+ "sdot z11.s, z6.b, z2.b\n"
+ "sdot z12.s, z5.b, z2.b\n"
+ "sdot z13.s, z4.b, z2.b\n"
"ld1rw { z3.s }, p0/Z, [%x[Apanel], #16]\n"
- "sdot z14.s, z0.b, z5.b\n"
- "sdot z15.s, z1.b, z5.b\n"
- "ld1rw { z4.s }, p0/Z, [%x[Apanel], #20]\n"
- "sdot z16.s, z2.b, z5.b\n"
- "sdot z17.s, z0.b, z6.b\n"
- "ld1rw { z5.s }, p0/Z, [%x[Apanel], #24]\n"
- "sdot z18.s, z1.b, z6.b\n"
- "sdot z19.s, z2.b, z6.b\n"
- "ld1rw { z6.s }, p0/Z, [%x[Apanel], #28]\n"
- "sdot z20.s, z0.b, z3.b\n"
- "sdot z21.s, z1.b, z3.b\n"
+ "sdot z14.s, z6.b, z1.b\n"
+ "sdot z15.s, z5.b, z1.b\n"
+ "ld1rw { z2.s }, p0/Z, [%x[Apanel], #20]\n"
+ "sdot z16.s, z4.b, z1.b\n"
+ "sdot z17.s, z6.b, z0.b\n"
+ "ld1rw { z1.s }, p0/Z, [%x[Apanel], #24]\n"
+ "sdot z18.s, z5.b, z0.b\n"
+ "sdot z19.s, z4.b, z0.b\n"
+ "ld1rw { z0.s }, p0/Z, [%x[Apanel], #28]\n"
+ "sdot z20.s, z6.b, z3.b\n"
+ "sdot z21.s, z5.b, z3.b\n"
"addvl x22, x22, #3\n"
- "sdot z22.s, z2.b, z3.b\n"
- "sdot z23.s, z0.b, z4.b\n"
+ "sdot z22.s, z4.b, z3.b\n"
+ "sdot z23.s, z6.b, z2.b\n"
"add %x[Apanel], %x[Apanel], #0x20\n"
- "sdot z24.s, z1.b, z4.b\n"
- "sdot z25.s, z2.b, z4.b\n"
- "sdot z26.s, z0.b, z5.b\n"
- "sdot z27.s, z1.b, z5.b\n"
- "sdot z28.s, z2.b, z5.b\n"
- "sdot z29.s, z0.b, z6.b\n"
- "sdot z30.s, z1.b, z6.b\n"
- "sdot z31.s, z2.b, z6.b\n"
+ "sdot z24.s, z5.b, z2.b\n"
+ "sdot z25.s, z4.b, z2.b\n"
+ "sdot z26.s, z6.b, z1.b\n"
+ "sdot z27.s, z5.b, z1.b\n"
+ "sdot z28.s, z4.b, z1.b\n"
+ "sdot z29.s, z6.b, z0.b\n"
+ "sdot z30.s, z5.b, z0.b\n"
+ "sdot z31.s, z4.b, z0.b\n"
"5:" // multiply loop done
"st1w { z8.s }, p0, [%x[Cpanel]]\n"
"subs x23, x23, #0x1\n"
@@ -262,7 +266,7 @@ void sve_interleaved_s8s32_dot_8x3VL_a64fx(
"bne 1b\n"
: [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks)
: [args_ptr] "r" (&ka), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_bblocks] "I" (offsetof(KernelArgs, bblocks))
- : "cc", "memory", "p0", "x20", "x21", "x22", "x23", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ : "cc", "memory", "p0", "x20", "x21", "x22", "x23", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
);
}
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-10 02:35:03 +0000