aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp81
1 files changed, 63 insertions, 18 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp
index 3e16915cd4..cf3069f828 100644
--- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp
+++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020 Arm Limited.
+ * Copyright (c) 2019-2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -22,52 +22,97 @@
* SOFTWARE.
*/
#pragma once
+#ifdef ARM_COMPUTE_ENABLE_SVE
-#ifdef __ARM_FEATURE_SVE
-
-#include <cstdint>
#include "../std_transforms_sve.hpp"
+#include "../performance_parameters.hpp"
-namespace arm_gemm {
+#define ARGLIST \
+ const int8_t *, const int8_t *, \
+ int32_t *, int, int, int
+namespace arm_gemm
+{
// Actual kernel implementations
-void sve_interleaved_s8s32_dot_8x3VL(const int8_t *, const int8_t *, int32_t *, int, int, int);
+void sve_interleaved_s8s32_dot_8x3VL( ARGLIST );
+void sve_interleaved_s8s32_dot_8x3VL_a64fx( ARGLIST );
-class cls_sve_interleaved_s8s32_dot_8x3VL {
+class cls_sve_interleaved_s8s32_dot_8x3VL
+{
public:
typedef int8_t operand_type;
typedef int32_t result_type;
- typedef void (*kern_type)(const int8_t *, const int8_t *, int32_t *, int, int, int);
+ typedef void (*kern_type)( ARGLIST );
/* Kernel blocking parameters */
- static unsigned int out_width()
+ static constexpr unsigned int out_height()
{
- return get_vector_length<int32_t>() * 3;
+ return 8;
}
- static unsigned int out_height()
+ static unsigned int out_width()
{
- return 8;
+ return get_vector_length<int32_t>() * 3;
}
- static unsigned int k_unroll()
+ static constexpr unsigned int k_unroll()
{
return 4;
}
- // Use the standard fixed size transforms.
+
StdTransformsSVE<operand_type, result_type, 8, 3, 4, 1> transforms = {};
StdTransformsSVE<operand_type, result_type, 8, 3, 4, 1, true> transforms_quantized = {};
+ template<typename T>
+ static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci)
+ {
- kern_type kernel=sve_interleaved_s8s32_dot_8x3VL;
+ if (std::is_same<T, int32_t>::value) {
+ switch (ci->get_cpu_model()) {
+ default:
+ return { 31.66, 4.10, 7.99 };
+ case CPUModel::V1:
+ return { 63.30, 4.97, 11.35 };
+ case CPUModel::A510:
+ return { 27.42, 3.47, 2.88 };
+ case CPUModel::A64FX:
+ return { 109.18, 3.88, 7.85 };
+ }
+ }
- cls_sve_interleaved_s8s32_dot_8x3VL(const CPUInfo *)
- {
+ if (std::is_same<T, int8_t>::value) {
+ switch (ci->get_cpu_model()) {
+ default:
+ return { 31.67, 3.57, 0.50 };
+ case CPUModel::V1:
+ return { 52.24, 7.49, 0.80 };
+ case CPUModel::A510:
+ return { 27.47, 1.70, 0.28 };
+ case CPUModel::A64FX:
+ return { 109.92, 2.36, 0.41 };
+ }
+ }
+
+ return { 1.0 };
+ }
+
+ // Default to the generic kernel
+ kern_type kernel=sve_interleaved_s8s32_dot_8x3VL;
+ cls_sve_interleaved_s8s32_dot_8x3VL(const CPUInfo *ci)
+ {
+ switch(ci->get_cpu_model()) {
+ default:
+ break;
+ case CPUModel::A64FX:
+ kernel=sve_interleaved_s8s32_dot_8x3VL_a64fx;
+ break;
+ }
}
};
} // namespace arm_gemm
-#endif // __ARM_FEATURE_SVE
+#undef ARGLIST
+#endif // ARM_COMPUTE_ENABLE_SVE