aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp515
1 files changed, 216 insertions, 299 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp
index 10feaa130b..e02db6ec48 100644
--- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp
+++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020 Arm Limited.
+ * Copyright (c) 2019-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -10,319 +10,236 @@
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
*/
#ifdef ARM_COMPUTE_ENABLE_SVE
-
-#include "../../asmlib.hpp"
+#include <cstddef>
namespace arm_gemm {
-void sve_interleaved_fp32_mla_8x3VL(const float *Apanel, const float *Bpanel, float *Cpanel, int ablocks, int bblocks, int K) {
- const float *a_ptr = Apanel;
- float *c_ptr = Cpanel;
-
- const long loops_count = (K / 2) - 1;
- const long tails_count = K % 2;
+void sve_interleaved_fp32_mla_8x3VL(
+ const float *Apanel, const float *Bpanel,
+ float *Cpanel, int ablocks, int bblocks, int K) {
- for (int yb=0; yb<ablocks; yb++) {
- const float *a_ptr0 = a_ptr;
- const float *b_ptr = Bpanel;
+ struct KernelArgs {
+ size_t bblocks = {};
+ size_t K = {};
+ const float *Bpanel = {};
+ } ka;
- for (int xb=0; xb<bblocks; xb++) {
- a_ptr = a_ptr0;
- long loops = loops_count;
- long tails = tails_count;
+ ka.bblocks = bblocks;
+ ka.K = (K/1) - 1;
+ ka.Bpanel = Bpanel;
- __asm __volatile (
- "mov z8.s, #0\n"
- "ptrue p0.s\n"
- "mov z9.s, #0\n"
- "mov z10.s, #0\n"
- "mov z11.s, #0\n"
- "ld1rqw z0.s, p0/z, [%[a_ptr]]\n"
- "mov z12.s, #0\n"
- "ld1w z4.s, p0/z, [%[b_ptr]]\n"
- "mov z13.s, #0\n"
- "ld1rqw z1.s, p0/z, [%[a_ptr], #0x10]\n"
- "mov z14.s, #0\n"
- "ld1w z5.s, p0/z, [%[b_ptr], #1, MUL VL]\n"
- "mov z15.s, #0\n"
- "ld1rqw z2.s, p0/z, [%[a_ptr], #0x20]\n"
- "mov z16.s, #0\n"
- "add %[a_ptr], %[a_ptr], #0x40\n"
- "mov z17.s, #0\n"
- "addvl %[b_ptr], %[b_ptr], #3\n"
- "mov z18.s, #0\n"
- "mov z19.s, #0\n"
- "mov z20.s, #0\n"
- "mov z21.s, #0\n"
- "mov z22.s, #0\n"
- "mov z23.s, #0\n"
- "mov z24.s, #0\n"
- "mov z25.s, #0\n"
- "mov z26.s, #0\n"
- "mov z27.s, #0\n"
- "mov z28.s, #0\n"
- "mov z29.s, #0\n"
- "mov z30.s, #0\n"
- "mov z31.s, #0\n"
- "cbz %[loops], 1f\n"
- "2:\n"
- "fmla z8.s, z4.s, z0.s[0]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #-1, MUL VL]\n"
- "fmla z9.s, z4.s, z0.s[1]\n"
- "ld1rqw z3.s, p0/z, [%[a_ptr], #-0x10]\n"
- "fmla z10.s, z4.s, z0.s[2]\n"
- "subs %[loops], %[loops], #0x1\n"
- "fmla z11.s, z4.s, z0.s[3]\n"
- "fmla z20.s, z4.s, z1.s[0]\n"
- "fmla z21.s, z4.s, z1.s[1]\n"
- "fmla z22.s, z4.s, z1.s[2]\n"
- "fmla z23.s, z4.s, z1.s[3]\n"
- "ld1w z4.s, p0/z, [%[b_ptr]]\n"
- "fmla z12.s, z5.s, z0.s[0]\n"
- "fmla z13.s, z5.s, z0.s[1]\n"
- "fmla z14.s, z5.s, z0.s[2]\n"
- "fmla z15.s, z5.s, z0.s[3]\n"
- "fmla z24.s, z5.s, z1.s[0]\n"
- "fmla z25.s, z5.s, z1.s[1]\n"
- "fmla z26.s, z5.s, z1.s[2]\n"
- "fmla z27.s, z5.s, z1.s[3]\n"
- "ld1w z5.s, p0/z, [%[b_ptr], #1, MUL VL]\n"
- "fmla z16.s, z6.s, z0.s[0]\n"
- "fmla z17.s, z6.s, z0.s[1]\n"
- "fmla z18.s, z6.s, z0.s[2]\n"
- "fmla z19.s, z6.s, z0.s[3]\n"
- "ld1rqw z0.s, p0/z, [%[a_ptr]]\n"
- "fmla z28.s, z6.s, z1.s[0]\n"
- "fmla z29.s, z6.s, z1.s[1]\n"
- "fmla z30.s, z6.s, z1.s[2]\n"
- "fmla z31.s, z6.s, z1.s[3]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #2, MUL VL]\n"
- "fmla z8.s, z4.s, z2.s[0]\n"
- "ld1rqw z1.s, p0/z, [%[a_ptr], #0x10]\n"
- "fmla z9.s, z4.s, z2.s[1]\n"
- "add %[a_ptr], %[a_ptr], #0x40\n"
- "fmla z10.s, z4.s, z2.s[2]\n"
- "addvl %[b_ptr], %[b_ptr], #6\n"
- "fmla z11.s, z4.s, z2.s[3]\n"
- "fmla z20.s, z4.s, z3.s[0]\n"
- "fmla z21.s, z4.s, z3.s[1]\n"
- "fmla z22.s, z4.s, z3.s[2]\n"
- "fmla z23.s, z4.s, z3.s[3]\n"
- "ld1w z4.s, p0/z, [%[b_ptr], #-3, MUL VL]\n"
- "fmla z12.s, z5.s, z2.s[0]\n"
- "fmla z13.s, z5.s, z2.s[1]\n"
- "fmla z14.s, z5.s, z2.s[2]\n"
- "fmla z15.s, z5.s, z2.s[3]\n"
- "fmla z24.s, z5.s, z3.s[0]\n"
- "fmla z25.s, z5.s, z3.s[1]\n"
- "fmla z26.s, z5.s, z3.s[2]\n"
- "fmla z27.s, z5.s, z3.s[3]\n"
- "ld1w z5.s, p0/z, [%[b_ptr], #-2, MUL VL]\n"
- "fmla z16.s, z6.s, z2.s[0]\n"
- "fmla z17.s, z6.s, z2.s[1]\n"
- "fmla z18.s, z6.s, z2.s[2]\n"
- "fmla z19.s, z6.s, z2.s[3]\n"
- "ld1rqw z2.s, p0/z, [%[a_ptr], #-0x20]\n"
- "fmla z28.s, z6.s, z3.s[0]\n"
- "fmla z29.s, z6.s, z3.s[1]\n"
- "fmla z30.s, z6.s, z3.s[2]\n"
- "fmla z31.s, z6.s, z3.s[3]\n"
- "b.ne 2b\n"
- "1:\n"
- "cbz %[tails], 3f\n"
- "fmla z8.s, z4.s, z0.s[0]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #-1, MUL VL]\n"
- "fmla z9.s, z4.s, z0.s[1]\n"
- "ld1rqw z3.s, p0/z, [%[a_ptr], #-0x10]\n"
- "fmla z10.s, z4.s, z0.s[2]\n"
- "fmla z11.s, z4.s, z0.s[3]\n"
- "fmla z20.s, z4.s, z1.s[0]\n"
- "fmla z21.s, z4.s, z1.s[1]\n"
- "fmla z22.s, z4.s, z1.s[2]\n"
- "fmla z23.s, z4.s, z1.s[3]\n"
- "ld1w z4.s, p0/z, [%[b_ptr]]\n"
- "fmla z12.s, z5.s, z0.s[0]\n"
- "fmla z13.s, z5.s, z0.s[1]\n"
- "fmla z14.s, z5.s, z0.s[2]\n"
- "fmla z15.s, z5.s, z0.s[3]\n"
- "fmla z24.s, z5.s, z1.s[0]\n"
- "fmla z25.s, z5.s, z1.s[1]\n"
- "fmla z26.s, z5.s, z1.s[2]\n"
- "fmla z27.s, z5.s, z1.s[3]\n"
- "ld1w z5.s, p0/z, [%[b_ptr], #1, MUL VL]\n"
- "fmla z16.s, z6.s, z0.s[0]\n"
- "fmla z17.s, z6.s, z0.s[1]\n"
- "fmla z18.s, z6.s, z0.s[2]\n"
- "fmla z19.s, z6.s, z0.s[3]\n"
- "ld1rqw z0.s, p0/z, [%[a_ptr]]\n"
- "fmla z28.s, z6.s, z1.s[0]\n"
- "fmla z29.s, z6.s, z1.s[1]\n"
- "fmla z30.s, z6.s, z1.s[2]\n"
- "fmla z31.s, z6.s, z1.s[3]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #2, MUL VL]\n"
- "fmla z8.s, z4.s, z2.s[0]\n"
- "ld1rqw z1.s, p0/z, [%[a_ptr], #0x10]\n"
- "fmla z9.s, z4.s, z2.s[1]\n"
- "add %[a_ptr], %[a_ptr], #0x20\n"
- "fmla z10.s, z4.s, z2.s[2]\n"
- "addvl %[b_ptr], %[b_ptr], #6\n"
- "fmla z11.s, z4.s, z2.s[3]\n"
- "fmla z20.s, z4.s, z3.s[0]\n"
- "fmla z21.s, z4.s, z3.s[1]\n"
- "fmla z22.s, z4.s, z3.s[2]\n"
- "fmla z23.s, z4.s, z3.s[3]\n"
- "ld1w z4.s, p0/z, [%[b_ptr], #-3, MUL VL]\n"
- "fmla z12.s, z5.s, z2.s[0]\n"
- "fmla z13.s, z5.s, z2.s[1]\n"
- "fmla z14.s, z5.s, z2.s[2]\n"
- "fmla z15.s, z5.s, z2.s[3]\n"
- "fmla z24.s, z5.s, z3.s[0]\n"
- "fmla z25.s, z5.s, z3.s[1]\n"
- "fmla z26.s, z5.s, z3.s[2]\n"
- "fmla z27.s, z5.s, z3.s[3]\n"
- "ld1w z5.s, p0/z, [%[b_ptr], #-2, MUL VL]\n"
- "fmla z16.s, z6.s, z2.s[0]\n"
- "fmla z17.s, z6.s, z2.s[1]\n"
- "fmla z18.s, z6.s, z2.s[2]\n"
- "fmla z19.s, z6.s, z2.s[3]\n"
- "fmla z28.s, z6.s, z3.s[0]\n"
- "fmla z29.s, z6.s, z3.s[1]\n"
- "fmla z30.s, z6.s, z3.s[2]\n"
- "fmla z31.s, z6.s, z3.s[3]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #-1, MUL VL]\n"
- "fmla z8.s, z4.s, z0.s[0]\n"
- "fmla z9.s, z4.s, z0.s[1]\n"
- "fmla z10.s, z4.s, z0.s[2]\n"
- "fmla z11.s, z4.s, z0.s[3]\n"
- "st1w z8.s, p0, [%[c_ptr]]\n"
- "fmla z20.s, z4.s, z1.s[0]\n"
- "fmla z21.s, z4.s, z1.s[1]\n"
- "fmla z22.s, z4.s, z1.s[2]\n"
- "fmla z23.s, z4.s, z1.s[3]\n"
- "fmla z12.s, z5.s, z0.s[0]\n"
- "fmla z13.s, z5.s, z0.s[1]\n"
- "fmla z14.s, z5.s, z0.s[2]\n"
- "fmla z15.s, z5.s, z0.s[3]\n"
- "st1w z12.s, p0, [%[c_ptr], #1, MUL VL]\n"
- "fmla z24.s, z5.s, z1.s[0]\n"
- "fmla z25.s, z5.s, z1.s[1]\n"
- "fmla z26.s, z5.s, z1.s[2]\n"
- "fmla z27.s, z5.s, z1.s[3]\n"
- "fmla z16.s, z6.s, z0.s[0]\n"
- "fmla z17.s, z6.s, z0.s[1]\n"
- "fmla z18.s, z6.s, z0.s[2]\n"
- "fmla z19.s, z6.s, z0.s[3]\n"
- "st1w z16.s, p0, [%[c_ptr], #2, MUL VL]\n"
- "fmla z28.s, z6.s, z1.s[0]\n"
- "fmla z29.s, z6.s, z1.s[1]\n"
- "fmla z30.s, z6.s, z1.s[2]\n"
- "st1w z9.s, p0, [%[c_ptr], #3, MUL VL]\n"
- "fmla z31.s, z6.s, z1.s[3]\n"
- "b 4f\n"
- "3:\n"
- "fmla z8.s, z4.s, z0.s[0]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #-1, MUL VL]\n"
- "fmla z9.s, z4.s, z0.s[1]\n"
- "ld1rqw z3.s, p0/z, [%[a_ptr], #-0x10]\n"
- "fmla z10.s, z4.s, z0.s[2]\n"
- "addvl %[b_ptr], %[b_ptr], #3\n"
- "fmla z11.s, z4.s, z0.s[3]\n"
- "fmla z20.s, z4.s, z1.s[0]\n"
- "fmla z21.s, z4.s, z1.s[1]\n"
- "fmla z22.s, z4.s, z1.s[2]\n"
- "fmla z23.s, z4.s, z1.s[3]\n"
- "ld1w z4.s, p0/z, [%[b_ptr], #-3, MUL VL]\n"
- "fmla z12.s, z5.s, z0.s[0]\n"
- "fmla z13.s, z5.s, z0.s[1]\n"
- "fmla z14.s, z5.s, z0.s[2]\n"
- "fmla z15.s, z5.s, z0.s[3]\n"
- "fmla z24.s, z5.s, z1.s[0]\n"
- "fmla z25.s, z5.s, z1.s[1]\n"
- "fmla z26.s, z5.s, z1.s[2]\n"
- "fmla z27.s, z5.s, z1.s[3]\n"
- "ld1w z5.s, p0/z, [%[b_ptr], #-2, MUL VL]\n"
- "fmla z16.s, z6.s, z0.s[0]\n"
- "fmla z17.s, z6.s, z0.s[1]\n"
- "fmla z18.s, z6.s, z0.s[2]\n"
- "fmla z19.s, z6.s, z0.s[3]\n"
- "fmla z28.s, z6.s, z1.s[0]\n"
- "fmla z29.s, z6.s, z1.s[1]\n"
- "fmla z30.s, z6.s, z1.s[2]\n"
- "fmla z31.s, z6.s, z1.s[3]\n"
- "ld1w z6.s, p0/z, [%[b_ptr], #-1, MUL VL]\n"
- "fmla z8.s, z4.s, z2.s[0]\n"
- "fmla z9.s, z4.s, z2.s[1]\n"
- "fmla z10.s, z4.s, z2.s[2]\n"
- "fmla z11.s, z4.s, z2.s[3]\n"
- "st1w z8.s, p0, [%[c_ptr]]\n"
- "fmla z20.s, z4.s, z3.s[0]\n"
- "fmla z21.s, z4.s, z3.s[1]\n"
- "fmla z22.s, z4.s, z3.s[2]\n"
- "fmla z23.s, z4.s, z3.s[3]\n"
- "fmla z12.s, z5.s, z2.s[0]\n"
- "fmla z13.s, z5.s, z2.s[1]\n"
- "fmla z14.s, z5.s, z2.s[2]\n"
- "fmla z15.s, z5.s, z2.s[3]\n"
- "st1w z12.s, p0, [%[c_ptr], #1, MUL VL]\n"
- "fmla z24.s, z5.s, z3.s[0]\n"
- "fmla z25.s, z5.s, z3.s[1]\n"
- "fmla z26.s, z5.s, z3.s[2]\n"
- "fmla z27.s, z5.s, z3.s[3]\n"
- "fmla z16.s, z6.s, z2.s[0]\n"
- "fmla z17.s, z6.s, z2.s[1]\n"
- "fmla z18.s, z6.s, z2.s[2]\n"
- "fmla z19.s, z6.s, z2.s[3]\n"
- "st1w z16.s, p0, [%[c_ptr], #2, MUL VL]\n"
- "fmla z28.s, z6.s, z3.s[0]\n"
- "fmla z29.s, z6.s, z3.s[1]\n"
- "fmla z30.s, z6.s, z3.s[2]\n"
- "st1w z9.s, p0, [%[c_ptr], #3, MUL VL]\n"
- "fmla z31.s, z6.s, z3.s[3]\n"
- "4:\n"
- "st1w z13.s, p0, [%[c_ptr], #4, MUL VL]\n"
- "st1w z17.s, p0, [%[c_ptr], #5, MUL VL]\n"
- "st1w z10.s, p0, [%[c_ptr], #6, MUL VL]\n"
- "st1w z14.s, p0, [%[c_ptr], #7, MUL VL]\n"
- "addvl %[c_ptr], %[c_ptr], #16\n"
- "st1w z18.s, p0, [%[c_ptr], #-8, MUL VL]\n"
- "st1w z11.s, p0, [%[c_ptr], #-7, MUL VL]\n"
- "st1w z15.s, p0, [%[c_ptr], #-6, MUL VL]\n"
- "st1w z19.s, p0, [%[c_ptr], #-5, MUL VL]\n"
- "st1w z20.s, p0, [%[c_ptr], #-4, MUL VL]\n"
- "st1w z24.s, p0, [%[c_ptr], #-3, MUL VL]\n"
- "st1w z28.s, p0, [%[c_ptr], #-2, MUL VL]\n"
- "st1w z21.s, p0, [%[c_ptr], #-1, MUL VL]\n"
- "st1w z25.s, p0, [%[c_ptr]]\n"
- "st1w z29.s, p0, [%[c_ptr], #1, MUL VL]\n"
- "st1w z22.s, p0, [%[c_ptr], #2, MUL VL]\n"
- "st1w z26.s, p0, [%[c_ptr], #3, MUL VL]\n"
- "st1w z30.s, p0, [%[c_ptr], #4, MUL VL]\n"
- "st1w z23.s, p0, [%[c_ptr], #5, MUL VL]\n"
- "st1w z27.s, p0, [%[c_ptr], #6, MUL VL]\n"
- "st1w z31.s, p0, [%[c_ptr], #7, MUL VL]\n"
- "addvl %[c_ptr], %[c_ptr], #8\n"
- : [a_ptr] "+r" (a_ptr), [b_ptr] "+r" (b_ptr), [c_ptr] "+r" (c_ptr),
- [loops] "+r" (loops), [tails] "+r" (tails)
- :
- : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31", "cc", "memory"
- );
- }
- }
+ __asm__ __volatile__(
+ "ptrue p0.b\n"
+ "1:" // Height loop
+ "ldr x22, [%x[args_ptr], %[offsetof_bblocks]]\n"
+ "mov x21, %x[Apanel]\n"
+ "ldr x20, [%x[args_ptr], %[offsetof_Bpanel]]\n"
+ "2:" // Width loop
+ "mov z8.b, #0x0\n"
+ "mov z9.b, #0x0\n"
+ "ldr x19, [%x[args_ptr], %[offsetof_K]]\n"
+ "mov z10.b, #0x0\n"
+ "mov z11.b, #0x0\n"
+ "ld1w { z4.s }, p0/Z, [x20]\n"
+ "mov z12.b, #0x0\n"
+ "mov z13.b, #0x0\n"
+ "mov %x[Apanel], x21\n"
+ "mov z14.b, #0x0\n"
+ "mov z15.b, #0x0\n"
+ "cmp x19, #0x2\n"
+ "mov z16.b, #0x0\n"
+ "mov z17.b, #0x0\n"
+ "mov z18.b, #0x0\n"
+ "mov z19.b, #0x0\n"
+ "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n"
+ "mov z20.b, #0x0\n"
+ "mov z21.b, #0x0\n"
+ "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n"
+ "mov z22.b, #0x0\n"
+ "mov z23.b, #0x0\n"
+ "mov z24.b, #0x0\n"
+ "mov z25.b, #0x0\n"
+ "mov z26.b, #0x0\n"
+ "mov z27.b, #0x0\n"
+ "mov z28.b, #0x0\n"
+ "mov z29.b, #0x0\n"
+ "mov z30.b, #0x0\n"
+ "mov z31.b, #0x0\n"
+ "blt 4f\n"
+ "3:" // main loop head
+ "fmla z8.s, z4.s, z0.s[0]\n"
+ "fmla z11.s, z4.s, z0.s[1]\n"
+ "ld1w { z5.s }, p0/Z, [x20, #1, MUL VL]\n"
+ "fmla z14.s, z4.s, z0.s[2]\n"
+ "fmla z17.s, z4.s, z0.s[3]\n"
+ "ld1w { z6.s }, p0/Z, [x20, #2, MUL VL]\n"
+ "fmla z20.s, z4.s, z1.s[0]\n"
+ "fmla z23.s, z4.s, z1.s[1]\n"
+ "ld1rqw { z2.s }, p0/Z, [%x[Apanel], #32]\n"
+ "fmla z26.s, z4.s, z1.s[2]\n"
+ "fmla z29.s, z4.s, z1.s[3]\n"
+ "ld1rqw { z3.s }, p0/Z, [%x[Apanel], #48]\n"
+ "fmla z9.s, z5.s, z0.s[0]\n"
+ "fmla z12.s, z5.s, z0.s[1]\n"
+ "ld1w { z4.s }, p0/Z, [x20, #3, MUL VL]\n"
+ "fmla z15.s, z5.s, z0.s[2]\n"
+ "fmla z18.s, z5.s, z0.s[3]\n"
+ "sub x19, x19, #0x2\n"
+ "fmla z21.s, z5.s, z1.s[0]\n"
+ "fmla z24.s, z5.s, z1.s[1]\n"
+ "cmp x19, #0x2\n"
+ "fmla z27.s, z5.s, z1.s[2]\n"
+ "fmla z30.s, z5.s, z1.s[3]\n"
+ "ld1w { z5.s }, p0/Z, [x20, #4, MUL VL]\n"
+ "fmla z10.s, z6.s, z0.s[0]\n"
+ "fmla z13.s, z6.s, z0.s[1]\n"
+ "add %x[Apanel], %x[Apanel], #0x40\n"
+ "fmla z16.s, z6.s, z0.s[2]\n"
+ "fmla z19.s, z6.s, z0.s[3]\n"
+ "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n"
+ "fmla z22.s, z6.s, z1.s[0]\n"
+ "fmla z25.s, z6.s, z1.s[1]\n"
+ "fmla z28.s, z6.s, z1.s[2]\n"
+ "fmla z31.s, z6.s, z1.s[3]\n"
+ "ld1w { z6.s }, p0/Z, [x20, #5, MUL VL]\n"
+ "fmla z8.s, z4.s, z2.s[0]\n"
+ "fmla z11.s, z4.s, z2.s[1]\n"
+ "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n"
+ "fmla z14.s, z4.s, z2.s[2]\n"
+ "fmla z17.s, z4.s, z2.s[3]\n"
+ "addvl x20, x20, #6\n"
+ "fmla z20.s, z4.s, z3.s[0]\n"
+ "fmla z23.s, z4.s, z3.s[1]\n"
+ "fmla z26.s, z4.s, z3.s[2]\n"
+ "fmla z29.s, z4.s, z3.s[3]\n"
+ "fmla z9.s, z5.s, z2.s[0]\n"
+ "fmla z12.s, z5.s, z2.s[1]\n"
+ "ld1w { z4.s }, p0/Z, [x20]\n"
+ "fmla z15.s, z5.s, z2.s[2]\n"
+ "fmla z18.s, z5.s, z2.s[3]\n"
+ "fmla z21.s, z5.s, z3.s[0]\n"
+ "fmla z24.s, z5.s, z3.s[1]\n"
+ "fmla z27.s, z5.s, z3.s[2]\n"
+ "fmla z30.s, z5.s, z3.s[3]\n"
+ "fmla z10.s, z6.s, z2.s[0]\n"
+ "fmla z13.s, z6.s, z2.s[1]\n"
+ "fmla z16.s, z6.s, z2.s[2]\n"
+ "fmla z19.s, z6.s, z2.s[3]\n"
+ "fmla z22.s, z6.s, z3.s[0]\n"
+ "fmla z25.s, z6.s, z3.s[1]\n"
+ "fmla z28.s, z6.s, z3.s[2]\n"
+ "fmla z31.s, z6.s, z3.s[3]\n"
+ "bge 3b\n"
+ "4:" // main loop skip
+ "fmla z8.s, z4.s, z0.s[0]\n"
+ "fmla z11.s, z4.s, z0.s[1]\n"
+ "ld1w { z5.s }, p0/Z, [x20, #1, MUL VL]\n"
+ "fmla z14.s, z4.s, z0.s[2]\n"
+ "fmla z17.s, z4.s, z0.s[3]\n"
+ "ld1w { z6.s }, p0/Z, [x20, #2, MUL VL]\n"
+ "fmla z20.s, z4.s, z1.s[0]\n"
+ "fmla z23.s, z4.s, z1.s[1]\n"
+ "add %x[Apanel], %x[Apanel], #0x20\n"
+ "fmla z26.s, z4.s, z1.s[2]\n"
+ "fmla z29.s, z4.s, z1.s[3]\n"
+ "addvl x20, x20, #3\n"
+ "fmla z9.s, z5.s, z0.s[0]\n"
+ "fmla z12.s, z5.s, z0.s[1]\n"
+ "fmla z15.s, z5.s, z0.s[2]\n"
+ "fmla z18.s, z5.s, z0.s[3]\n"
+ "fmla z21.s, z5.s, z1.s[0]\n"
+ "fmla z24.s, z5.s, z1.s[1]\n"
+ "fmla z27.s, z5.s, z1.s[2]\n"
+ "fmla z30.s, z5.s, z1.s[3]\n"
+ "fmla z10.s, z6.s, z0.s[0]\n"
+ "fmla z13.s, z6.s, z0.s[1]\n"
+ "fmla z16.s, z6.s, z0.s[2]\n"
+ "fmla z19.s, z6.s, z0.s[3]\n"
+ "fmla z22.s, z6.s, z1.s[0]\n"
+ "fmla z25.s, z6.s, z1.s[1]\n"
+ "fmla z28.s, z6.s, z1.s[2]\n"
+ "fmla z31.s, z6.s, z1.s[3]\n"
+ "cbz x19, 5f\n"
+ "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n"
+ "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n"
+ "add %x[Apanel], %x[Apanel], #0x20\n"
+ "ld1w { z7.s }, p0/Z, [x20]\n"
+ "ld1w { z4.s }, p0/Z, [x20, #1, MUL VL]\n"
+ "ld1w { z5.s }, p0/Z, [x20, #2, MUL VL]\n"
+ "addvl x20, x20, #3\n"
+ "fmla z8.s, z7.s, z0.s[0]\n"
+ "fmla z11.s, z7.s, z0.s[1]\n"
+ "fmla z14.s, z7.s, z0.s[2]\n"
+ "fmla z17.s, z7.s, z0.s[3]\n"
+ "fmla z20.s, z7.s, z1.s[0]\n"
+ "fmla z23.s, z7.s, z1.s[1]\n"
+ "fmla z26.s, z7.s, z1.s[2]\n"
+ "fmla z29.s, z7.s, z1.s[3]\n"
+ "fmla z9.s, z4.s, z0.s[0]\n"
+ "fmla z12.s, z4.s, z0.s[1]\n"
+ "fmla z15.s, z4.s, z0.s[2]\n"
+ "fmla z18.s, z4.s, z0.s[3]\n"
+ "fmla z21.s, z4.s, z1.s[0]\n"
+ "fmla z24.s, z4.s, z1.s[1]\n"
+ "fmla z27.s, z4.s, z1.s[2]\n"
+ "fmla z30.s, z4.s, z1.s[3]\n"
+ "fmla z10.s, z5.s, z0.s[0]\n"
+ "fmla z13.s, z5.s, z0.s[1]\n"
+ "fmla z16.s, z5.s, z0.s[2]\n"
+ "fmla z19.s, z5.s, z0.s[3]\n"
+ "fmla z22.s, z5.s, z1.s[0]\n"
+ "fmla z25.s, z5.s, z1.s[1]\n"
+ "fmla z28.s, z5.s, z1.s[2]\n"
+ "fmla z31.s, z5.s, z1.s[3]\n"
+ "5:" // multiply loop done
+ "st1w { z8.s }, p0, [%x[Cpanel]]\n"
+ "subs x22, x22, #0x1\n"
+ "st1w { z9.s }, p0, [%x[Cpanel], #1, MUL VL]\n"
+ "st1w { z10.s }, p0, [%x[Cpanel], #2, MUL VL]\n"
+ "st1w { z11.s }, p0, [%x[Cpanel], #3, MUL VL]\n"
+ "st1w { z12.s }, p0, [%x[Cpanel], #4, MUL VL]\n"
+ "st1w { z13.s }, p0, [%x[Cpanel], #5, MUL VL]\n"
+ "st1w { z14.s }, p0, [%x[Cpanel], #6, MUL VL]\n"
+ "st1w { z15.s }, p0, [%x[Cpanel], #7, MUL VL]\n"
+ "addvl %x[Cpanel], %x[Cpanel], #16\n"
+ "st1w { z16.s }, p0, [%x[Cpanel], #-8, MUL VL]\n"
+ "st1w { z17.s }, p0, [%x[Cpanel], #-7, MUL VL]\n"
+ "st1w { z18.s }, p0, [%x[Cpanel], #-6, MUL VL]\n"
+ "st1w { z19.s }, p0, [%x[Cpanel], #-5, MUL VL]\n"
+ "st1w { z20.s }, p0, [%x[Cpanel], #-4, MUL VL]\n"
+ "st1w { z21.s }, p0, [%x[Cpanel], #-3, MUL VL]\n"
+ "st1w { z22.s }, p0, [%x[Cpanel], #-2, MUL VL]\n"
+ "st1w { z23.s }, p0, [%x[Cpanel], #-1, MUL VL]\n"
+ "st1w { z24.s }, p0, [%x[Cpanel]]\n"
+ "st1w { z25.s }, p0, [%x[Cpanel], #1, MUL VL]\n"
+ "st1w { z26.s }, p0, [%x[Cpanel], #2, MUL VL]\n"
+ "st1w { z27.s }, p0, [%x[Cpanel], #3, MUL VL]\n"
+ "st1w { z28.s }, p0, [%x[Cpanel], #4, MUL VL]\n"
+ "st1w { z29.s }, p0, [%x[Cpanel], #5, MUL VL]\n"
+ "st1w { z30.s }, p0, [%x[Cpanel], #6, MUL VL]\n"
+ "st1w { z31.s }, p0, [%x[Cpanel], #7, MUL VL]\n"
+ "addvl %x[Cpanel], %x[Cpanel], #8\n"
+ "bgt 2b\n"
+ "subs %x[ablocks], %x[ablocks], #0x1\n"
+ "bne 1b\n"
+ : [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks)
+ : [args_ptr] "r" (&ka), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_bblocks] "I" (offsetof(KernelArgs, bblocks))
+ : "cc", "memory", "p0", "x19", "x20", "x21", "x22", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
}
} // namespace arm_gemm
-
#endif // ARM_COMPUTE_ENABLE_SVE
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-20 05:50:04 +0000