diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp | 65 |
1 files changed, 47 insertions, 18 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp index d717b745c9..f5fdf993aa 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,63 +10,92 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. */ #pragma once #ifdef ARM_COMPUTE_ENABLE_SVE - -#include "../bfloat.hpp" #include "../std_transforms_sve.hpp" +#include "../bfloat.hpp" +#include "../performance_parameters.hpp" -namespace arm_gemm { +#define ARGLIST \ + const bfloat16 *, const bfloat16 *, \ + float *, int, int, int +namespace arm_gemm +{ // Actual kernel implementations -void sve_interleaved_bf16fp32_dot_8x3VL(const bfloat16 *, const bfloat16 *, float *, int, int, int); +void sve_interleaved_bf16fp32_dot_8x3VL( ARGLIST ); -class cls_sve_interleaved_bf16fp32_dot_8x3VL { +class cls_sve_interleaved_bf16fp32_dot_8x3VL +{ public: typedef bfloat16 operand_type; typedef float result_type; - typedef void (*kern_type)(const bfloat16 *, const bfloat16 *, float *, int, int, int); + typedef void (*kern_type)( ARGLIST ); /* Kernel blocking parameters */ + static constexpr unsigned int out_height() + { + return 8; + } + static unsigned int out_width() { return get_vector_length<float>() * 3; } - static unsigned int out_height() + static unsigned int stripe_width() { - return 8; + return get_vector_length<float>(); } - static unsigned int k_unroll() + static constexpr unsigned int k_unroll() { return 2; } - // Use the standard fixed size transforms. + StdTransformsSVE<operand_type, result_type, 8, 3, 2, 1> transforms = {}; + StdTransformsSVE<operand_type, result_type, 8, 3, 2, 1, true> transforms_quantized = {}; + template<typename T> + static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci) + { - kern_type kernel=sve_interleaved_bf16fp32_dot_8x3VL; + if (std::is_same<T, bfloat16>::value) { + switch (ci->get_cpu_model()) { + default: + return { 15.92, 3.74, 7.14 }; + case CPUModel::A510: + return { 7.54, 3.77, 2.43 }; + case CPUModel::V1: + return { 31.82, 5.11, 11.20 }; + } + } + + return { 1.0 }; + } + // Default to the generic kernel + kern_type kernel=sve_interleaved_bf16fp32_dot_8x3VL; cls_sve_interleaved_bf16fp32_dot_8x3VL(const CPUInfo *) { - } }; } // namespace arm_gemm +#undef ARGLIST + #endif // ARM_COMPUTE_ENABLE_SVE |