diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_3VLx8/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_3VLx8/generic.cpp | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_3VLx8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_3VLx8/generic.cpp index 65841581aa..7e20ed0971 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_3VLx8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_3VLx8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 Arm Limited. + * Copyright (c) 2019-2020 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -61,13 +61,11 @@ void sve_interleaved_bf16fp32_dot_3VLx8(const bfloat16 *Apanel, const bfloat16 * "mov z15.s, #0\n" "ld1rqh z2.h, p0/z, [%[a_ptr], #0x20]\n" "mov z16.s, #0\n" - "ld1h z6.h, p0/z, [%[b_ptr], #2, MUL VL]\n" + "add %[a_ptr], %[a_ptr], #0x40\n" "mov z17.s, #0\n" - "ld1rqh z3.h, p0/z, [%[a_ptr], #0x30]\n" + "addvl %[b_ptr], %[b_ptr], #3\n" "mov z18.s, #0\n" - "add %[a_ptr], %[a_ptr], #0x40\n" "mov z19.s, #0\n" - "addvl %[b_ptr], %[b_ptr], #3\n" "mov z20.s, #0\n" "mov z21.s, #0\n" "mov z22.s, #0\n" @@ -83,9 +81,11 @@ void sve_interleaved_bf16fp32_dot_3VLx8(const bfloat16 *Apanel, const bfloat16 * "cbz %[loops], 1f\n" "2:\n" ".inst 0x64604088 // bfdot z8.s, z4.h, z0.h[0]\n" - "subs %[loops], %[loops], #0x1\n" + "ld1h z6.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" ".inst 0x64684089 // bfdot z9.s, z4.h, z0.h[1]\n" + "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" ".inst 0x6470408a // bfdot z10.s, z4.h, z0.h[2]\n" + "subs %[loops], %[loops], #0x1\n" ".inst 0x6478408b // bfdot z11.s, z4.h, z0.h[3]\n" ".inst 0x64614094 // bfdot z20.s, z4.h, z1.h[0]\n" ".inst 0x64694095 // bfdot z21.s, z4.h, z1.h[1]\n" @@ -141,13 +141,13 @@ void sve_interleaved_bf16fp32_dot_3VLx8(const bfloat16 *Apanel, const bfloat16 * ".inst 0x646b40dd // bfdot z29.s, z6.h, z3.h[1]\n" ".inst 0x647340de // bfdot z30.s, z6.h, z3.h[2]\n" ".inst 0x647b40df // bfdot z31.s, z6.h, z3.h[3]\n" - "ld1h z6.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" - "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" "b.ne 2b\n" "1:\n" "cbz %[tails], 3f\n" ".inst 0x64604088 // bfdot z8.s, z4.h, z0.h[0]\n" + "ld1h z6.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" ".inst 0x64684089 // bfdot z9.s, z4.h, z0.h[1]\n" + "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" ".inst 0x6470408a // bfdot z10.s, z4.h, z0.h[2]\n" ".inst 0x6478408b // bfdot z11.s, z4.h, z0.h[3]\n" ".inst 0x64614094 // bfdot z20.s, z4.h, z1.h[0]\n" @@ -235,9 +235,11 @@ void sve_interleaved_bf16fp32_dot_3VLx8(const bfloat16 *Apanel, const bfloat16 * "b 4f\n" "3:\n" ".inst 0x64604088 // bfdot z8.s, z4.h, z0.h[0]\n" - "addvl %[b_ptr], %[b_ptr], #3\n" + "ld1h z6.h, p0/z, [%[b_ptr], #-1, MUL VL]\n" ".inst 0x64684089 // bfdot z9.s, z4.h, z0.h[1]\n" + "ld1rqh z3.h, p0/z, [%[a_ptr], #-0x10]\n" ".inst 0x6470408a // bfdot z10.s, z4.h, z0.h[2]\n" + "addvl %[b_ptr], %[b_ptr], #3\n" ".inst 0x6478408b // bfdot z11.s, z4.h, z0.h[3]\n" ".inst 0x64614094 // bfdot z20.s, z4.h, z1.h[0]\n" ".inst 0x64694095 // bfdot z21.s, z4.h, z1.h[1]\n" |