diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp | 64 |
1 files changed, 45 insertions, 19 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp index f0cc70b76e..880f9d1a27 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021, 2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,40 +10,42 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" +#include "../performance_parameters.hpp" #define ARGLIST \ - unsigned int, const unsigned int *, \ - IndirectInputArg<float>, \ - size_t, size_t, \ - const float *, \ - IndirectOutputArg<float>, \ - const float *, Activation, bool + unsigned int, const unsigned int *, \ + IndirectInputArg<float>, \ + size_t, size_t, \ + const float *, \ + IndirectOutputArg<float>, \ + const float *, Activation, bool namespace arm_gemm { - // Actual kernel implementations void sve_hybrid_fp32_mla_6x4VL( ARGLIST ); +void sve_hybrid_fp32_mla_6x4VL_a64fx( ARGLIST ); class cls_sve_hybrid_fp32_mla_6x4VL { public: - typedef float operand_type; + typedef float lhs_operand_type; + typedef float rhs_operand_type; typedef float result_type; typedef void (*kern_type)( ARGLIST ); @@ -69,17 +71,41 @@ public: return true; } - StdTransformsSVE<operand_type, result_type, 6, 4, 1> transforms = {}; + StdTransformsSVE<rhs_operand_type, result_type, 6, 4, 1> transforms = {}; + template<typename T> + static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci) + { + if (std::is_same<T, float>::value) { + switch (ci->get_cpu_model()) { + default: + return { 6.667 }; + case CPUModel::A510: + return { 5.41 }; + case CPUModel::V1: + return { 15.65 }; + case CPUModel::A64FX: + return { 25.55 }; + } + } + + return { 1.0 }; + } // Default to the generic kernel kern_type kernel=sve_hybrid_fp32_mla_6x4VL; - - cls_sve_hybrid_fp32_mla_6x4VL(const CPUInfo *) + cls_sve_hybrid_fp32_mla_6x4VL(const CPUInfo *ci) { + switch(ci->get_cpu_model()) { + default: + break; + case CPUModel::A64FX: + kernel=sve_hybrid_fp32_mla_6x4VL_a64fx; + break; + } } }; } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE |