diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8qs_mmla_6x16/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8qs_mmla_6x16/generic.cpp | 3280 |
1 files changed, 1634 insertions, 1646 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8qs_mmla_6x16/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8qs_mmla_6x16/generic.cpp index 8924492e41..fc525531b2 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8qs_mmla_6x16/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8qs_mmla_6x16/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021, 2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,16 +10,16 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. */ #ifdef __aarch64__ @@ -95,12 +95,12 @@ void a64_hybrid_s8qs_mmla_6x16 ( "cmp %x[M], #0x2\n" "bgt 59f\n" "beq 30f\n" + "mov x14, %x[col_bias]\n" "ldr x13, [%x[args_ptr], %[offsetof_multiplier_ptr]]\n" "ldr x12, [%x[args_ptr], %[offsetof_shift_ptr]]\n" - "mov x11, %x[col_bias]\n" + "mov x11, %x[output_ptr]\n" "ldr x10, [%x[args_ptr], %[offsetof_N]]\n" - "mov x9, %x[output_ptr]\n" - "ldr x28, [%x[args_ptr], %[offsetof_B_ptr]]\n" + "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" "2:" // Height 1: Column loop "movi v8.4s, #0x0\n" "movi v9.4s, #0x0\n" @@ -111,196 +111,192 @@ void a64_hybrid_s8qs_mmla_6x16 ( "movi v14.4s, #0x0\n" "movi v15.4s, #0x0\n" "3:" // Height 1: setup done - "mov x27, #0x0\n" + "mov x28, #0x0\n" "4:" // Height 1: String loop "ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_offset]]\n" - "ldr w26, [x20, x27, LSL #0x2]\n" + "ldr w27, [x20, x28, LSL #0x2]\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 5f\n" - "ldr x20, [%x[input_ptr], x27, LSL #0x3]\n" - "add x20, x20, x19, LSL #3\n" - "ldr x25, [x20, #0x0]\n" - "cbnz x27, 6f\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_initial_col]]\n" - "add x25, x25, x19\n" + "ldr x21, [%x[input_ptr], x28, LSL #0x3]\n" + "add x21, x21, x20, LSL #3\n" + "ldr x26, [x21, #0x0]\n" + "cbnz x28, 6f\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n" + "add x26, x26, x20\n" "b 6f\n" "5:" // Height 1: setup direct input - "mov x25, %x[input_ptr]\n" + "mov x26, %x[input_ptr]\n" "6:" // Height 1: input setup done - "cmp x26, #0x10\n" + "cmp x27, #0x10\n" "blt 9f\n" - "ldr q1, [x25, #0x0]\n" - "cmp x26, #0x20\n" + "ldr q1, [x26, #0x0]\n" + "ldr q7, [x9, #0x0]\n" + "cmp x27, #0x20\n" + "ldr q6, [x9, #0x10]\n" "blt 8f\n" "7:" // Height 1: Multiply loop: Main loop head - "movi v2.16b, #0x0\n" - "ldr q7, [x28, #0x0]\n" - "add x25, x25, #0x10\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x10]\n" - "sub x26, x26, #0x10\n" - "trn2 v1.2d, v1.2d, v2.2d\n" - "prfm pldl1keep, [x25, #0x80]\n" - "cmp x26, #0x20\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" + "trn2 v1.2d, v1.2d, v2.2d\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "sub x27, x27, #0x10\n" + "add x26, x26, #0x10\n" + "cmp x27, #0x20\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" - "ldr q1, [x25, #0x0]\n" + "ldr q1, [x26, #0x0]\n" + "add x9, x9, #0x100\n" + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" + "prfm pldl1keep, [x26, #0x80]\n" "bge 7b\n" "8:" // Height 1: Multiply loop: Single iteration only - "movi v2.16b, #0x0\n" - "ldr q7, [x28, #0x0]\n" - "sub x26, x26, #0x10\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x25, x25, #0x10\n" - "trn2 v1.2d, v1.2d, v2.2d\n" - "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" + "trn2 v1.2d, v1.2d, v2.2d\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x26, x26, #0x10\n" + "sub x27, x27, #0x10\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" + "add x9, x9, #0x100\n" "9:" // Height 1: Multiply loop: Main loop skip - "cbz x26, 16f\n" - "cmp x26, #0x8\n" + "cbz x27, 16f\n" + "cmp x27, #0x8\n" "blt 11f\n" "10:" // Height 1: Multiply loop: Odd block loop - "movi v2.16b, #0x0\n" - "ldr d1, [x25], #0x8\n" - "sub x26, x26, #0x8\n" + "ldr d1, [x26], #0x8\n" + "ldr q6, [x9, #0x0]\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x0]\n" - "cmp x26, #0x8\n" + "ldr q7, [x9, #0x10]\n" ".inst 0x4e86a408 // smmla v8.4s, v0.16b, v6.16b\n" - "ldr q7, [x28, #0x10]\n" - "ldr q6, [x28, #0x20]\n" + "ldr q6, [x9, #0x20]\n" ".inst 0x4e87a40c // smmla v12.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x30]\n" + "ldr q7, [x9, #0x30]\n" ".inst 0x4e86a409 // smmla v9.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x40]\n" + "ldr q6, [x9, #0x40]\n" ".inst 0x4e87a40d // smmla v13.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x50]\n" + "ldr q7, [x9, #0x50]\n" ".inst 0x4e86a40a // smmla v10.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x60]\n" + "ldr q6, [x9, #0x60]\n" ".inst 0x4e87a40e // smmla v14.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q7, [x9, #0x70]\n" + "sub x27, x27, #0x8\n" + "cmp x27, #0x8\n" ".inst 0x4e86a40b // smmla v11.4s, v0.16b, v6.16b\n" ".inst 0x4e87a40f // smmla v15.4s, v0.16b, v7.16b\n" + "add x9, x9, #0x80\n" "bge 10b\n" - "cbz x26, 16f\n" "11:" // Height 1: Multiply loop: Skip odd blocks - "tbz x26, #2, 13f\n" - "ldr s1, [x25], #0x4\n" - "tbz x26, #1, 12f\n" - "ld1 { v1.h }[2], [x25], #0x2\n" - "tbz x26, #0, 15f\n" - "ld1 { v1.b }[6], [x25]\n" + "cbz x27, 16f\n" + "tbz x27, #2, 13f\n" + "ldr s1, [x26], #0x4\n" + "tbz x27, #1, 12f\n" + "ld1 { v1.h }[2], [x26], #0x2\n" + "tbz x27, #0, 15f\n" + "ld1 { v1.b }[6], [x26]\n" "b 15f\n" "12:" // Height 1: Multiply loop: Ragged operand read: partial_1_4 - "tbz x26, #0, 15f\n" - "ld1 { v1.b }[4], [x25]\n" + "tbz x27, #0, 15f\n" + "ld1 { v1.b }[4], [x26]\n" "b 15f\n" "13:" // Height 1: Multiply loop: Ragged operand read: partial_2_0 - "tbz x26, #1, 14f\n" - "ldr h1, [x25], #0x2\n" - "tbz x26, #0, 15f\n" - "ld1 { v1.b }[2], [x25]\n" + "tbz x27, #1, 14f\n" + "ldr h1, [x26], #0x2\n" + "tbz x27, #0, 15f\n" + "ld1 { v1.b }[2], [x26]\n" "b 15f\n" "14:" // Height 1: Multiply loop: Ragged operand read: partial_1_0 - "ldr b1, [x25, #0x0]\n" + "ldr b1, [x26, #0x0]\n" "15:" // Height 1: Multiply loop: Ragged operand read: Done - "movi v2.16b, #0x0\n" - "ldr q7, [x28, #0x0]\n" - "ldr q6, [x28, #0x10]\n" + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "trn1 v0.2d, v1.2d, v2.2d\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" + "add x9, x9, #0x80\n" "16:" // Height 1: Multiply loop: No odd multiplies - "ldr w19, [%x[args_ptr], %[offsetof_num_strings]]\n" - "add x27, x27, #0x1\n" - "cmp x27, x19\n" + "ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n" + "add x28, x28, #0x1\n" + "cmp x28, x20\n" "bne 4b\n" + "ldr q0, [x14, #0x0]\n" + "ldr q1, [x14, #0x10]\n" "uzp1 v8.2d, v8.2d, v12.2d\n" - "prfm pstl1keep, [x9, #0x0]\n" "uzp1 v9.2d, v9.2d, v13.2d\n" - "ldr q0, [x11, #0x0]\n" + "ldr q2, [x14, #0x20]\n" + "ldr q3, [x14, #0x30]\n" "uzp1 v10.2d, v10.2d, v14.2d\n" - "ldr q1, [x11, #0x10]\n" "uzp1 v11.2d, v11.2d, v15.2d\n" - "ldr q2, [x11, #0x20]\n" "mov v15.16b, v8.16b\n" - "ldr q3, [x11, #0x30]\n" - "add x11, x11, #0x40\n" + "prfm pstl1keep, [x11, #0x0]\n" "add v15.4s, v15.4s, v0.4s\n" + "add x14, x14, #0x40\n" "add v9.4s, v9.4s, v1.4s\n" "add v10.4s, v10.4s, v2.4s\n" "add v11.4s, v11.4s, v3.4s\n" @@ -312,20 +308,20 @@ void a64_hybrid_s8qs_mmla_6x16 ( "ldr q2, [x12, #0x20]\n" "ldr q6, [x13, #0x20]\n" "ldr q3, [x12, #0x30]\n" - "add x12, x12, #0x40\n" "ldr q7, [x13, #0x30]\n" + "add x12, x12, #0x40\n" "add x13, x13, #0x40\n" "b 18f\n" "17:" // Height 1: per layer parameters - "add x24, %x[qp], %[per_layer_right_shift]\n" - "ld1r { v0.4s }, [x24]\n" + "add x25, %x[qp], %[per_layer_right_shift]\n" + "ld1r { v0.4s }, [x25]\n" + "add x25, %x[qp], %[per_layer_mul]\n" + "ld1r { v4.4s }, [x25]\n" "mov v1.16b, v0.16b\n" - "add x24, %x[qp], %[per_layer_mul]\n" - "ld1r { v4.4s }, [x24]\n" - "mov v2.16b, v0.16b\n" - "mov v3.16b, v0.16b\n" "mov v5.16b, v4.16b\n" + "mov v2.16b, v0.16b\n" "mov v6.16b, v4.16b\n" + "mov v3.16b, v0.16b\n" "mov v7.16b, v4.16b\n" "18:" // Height 1: parameters loaded "sqrdmulh v15.4s, v15.4s, v4.4s\n" @@ -340,98 +336,98 @@ void a64_hybrid_s8qs_mmla_6x16 ( "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v15.4s, v15.4s, v4.4s\n" "sqadd v9.4s, v9.4s, v5.4s\n" "sqadd v10.4s, v10.4s, v6.4s\n" - "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v11.4s, v11.4s, v7.4s\n" "19:" // Height 1: no shift correction + "add x25, %x[qp], %[c_offset]\n" + "ld1r { v4.4s }, [x25]\n" "srshl v15.4s, v15.4s, v0.4s\n" - "add x24, %x[qp], %[c_offset]\n" - "ld1r { v4.4s }, [x24]\n" "srshl v9.4s, v9.4s, v1.4s\n" - "add x24, %x[qp], %[minval]\n" "srshl v10.4s, v10.4s, v2.4s\n" - "ld1r { v5.4s }, [x24]\n" - "add x24, %x[qp], %[maxval]\n" "srshl v11.4s, v11.4s, v3.4s\n" - "ld1r { v6.4s }, [x24]\n" - "cmp x10, #0x10\n" + "add x25, %x[qp], %[maxval]\n" + "ld1r { v6.4s }, [x25]\n" "add v15.4s, v15.4s, v4.4s\n" "add v9.4s, v9.4s, v4.4s\n" + "add x25, %x[qp], %[minval]\n" + "ld1r { v5.4s }, [x25]\n" "add v10.4s, v10.4s, v4.4s\n" "add v11.4s, v11.4s, v4.4s\n" + "cmp x10, #0x10\n" "smin v15.4s, v15.4s, v6.4s\n" "smin v9.4s, v9.4s, v6.4s\n" "smin v10.4s, v10.4s, v6.4s\n" + "smin v11.4s, v11.4s, v6.4s\n" "smax v15.4s, v15.4s, v5.4s\n" "smax v9.4s, v9.4s, v5.4s\n" "smax v10.4s, v10.4s, v5.4s\n" - "smin v11.4s, v11.4s, v6.4s\n" - "uzp1 v15.8h, v15.8h, v9.8h\n" "smax v11.4s, v11.4s, v5.4s\n" + "uzp1 v15.8h, v15.8h, v9.8h\n" "uzp1 v9.8h, v10.8h, v11.8h\n" "uzp1 v15.16b, v15.16b, v9.16b\n" "bge 28f\n" "tbz x10, #3, 23f\n" - "str d15, [x9], #0x8\n" + "str d15, [x11], #0x8\n" "tbz x10, #2, 21f\n" - "st1 { v15.s }[2], [x9], #0x4\n" + "st1 { v15.s }[2], [x11], #0x4\n" "tbz x10, #1, 20f\n" - "st1 { v15.h }[6], [x9], #0x2\n" + "st1 { v15.h }[6], [x11], #0x2\n" "tbz x10, #0, 27f\n" - "st1 { v15.b }[14], [x9]\n" + "st1 { v15.b }[14], [x11]\n" "b 27f\n" "20:" // Height 1: Partial direct writeback: partial_1_12 "tbz x10, #0, 27f\n" - "st1 { v15.b }[12], [x9]\n" + "st1 { v15.b }[12], [x11]\n" "b 27f\n" "21:" // Height 1: Partial direct writeback: partial_2_8 "tbz x10, #1, 22f\n" - "st1 { v15.h }[4], [x9], #0x2\n" + "st1 { v15.h }[4], [x11], #0x2\n" "tbz x10, #0, 27f\n" - "st1 { v15.b }[10], [x9]\n" + "st1 { v15.b }[10], [x11]\n" "b 27f\n" "22:" // Height 1: Partial direct writeback: partial_1_8 "tbz x10, #0, 27f\n" - "st1 { v15.b }[8], [x9]\n" + "st1 { v15.b }[8], [x11]\n" "b 27f\n" "23:" // Height 1: Partial direct writeback: partial_4_0 "tbz x10, #2, 25f\n" - "str s15, [x9], #0x4\n" + "str s15, [x11], #0x4\n" "tbz x10, #1, 24f\n" - "st1 { v15.h }[2], [x9], #0x2\n" + "st1 { v15.h }[2], [x11], #0x2\n" "tbz x10, #0, 27f\n" - "st1 { v15.b }[6], [x9]\n" + "st1 { v15.b }[6], [x11]\n" "b 27f\n" "24:" // Height 1: Partial direct writeback: partial_1_4 "tbz x10, #0, 27f\n" - "st1 { v15.b }[4], [x9]\n" + "st1 { v15.b }[4], [x11]\n" "b 27f\n" "25:" // Height 1: Partial direct writeback: partial_2_0 "tbz x10, #1, 26f\n" - "str h15, [x9], #0x2\n" + "str h15, [x11], #0x2\n" "tbz x10, #0, 27f\n" - "st1 { v15.b }[2], [x9]\n" + "st1 { v15.b }[2], [x11]\n" "b 27f\n" "26:" // Height 1: Partial direct writeback: partial_1_0 - "str b15, [x9, #0x0]\n" + "str b15, [x11, #0x0]\n" "27:" // Height 1: Partial direct writeback: Done "b 29f\n" "28:" // Height 1: Full writeback - "str q15, [x9, #0x0]\n" - "add x9, x9, #0x10\n" + "str q15, [x11, #0x0]\n" + "add x11, x11, #0x10\n" "29:" // Height 1: Writeback done "subs x10, x10, #0x10\n" "bgt 2b\n" "b 176f\n" "30:" // Height 2 + "mov x14, %x[col_bias]\n" "ldr x13, [%x[args_ptr], %[offsetof_multiplier_ptr]]\n" - "mov x11, %x[col_bias]\n" "ldr x12, [%x[args_ptr], %[offsetof_shift_ptr]]\n" - "mov x9, %x[output_ptr]\n" + "mov x11, %x[output_ptr]\n" "ldr x10, [%x[args_ptr], %[offsetof_N]]\n" - "ldr x28, [%x[args_ptr], %[offsetof_B_ptr]]\n" + "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" "31:" // Height 2: Column loop "movi v8.4s, #0x0\n" "movi v9.4s, #0x0\n" @@ -442,216 +438,216 @@ void a64_hybrid_s8qs_mmla_6x16 ( "movi v14.4s, #0x0\n" "movi v15.4s, #0x0\n" "32:" // Height 2: setup done - "mov x27, #0x0\n" + "mov x28, #0x0\n" "33:" // Height 2: String loop "ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_offset]]\n" - "ldr w26, [x20, x27, LSL #0x2]\n" + "ldr w27, [x20, x28, LSL #0x2]\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 34f\n" - "ldr x20, [%x[input_ptr], x27, LSL #0x3]\n" - "add x20, x20, x19, LSL #3\n" - "ldr x25, [x20, #0x0]\n" - "ldr x24, [x20, #0x8]\n" - "cbnz x27, 35f\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_initial_col]]\n" - "add x25, x25, x19\n" - "add x24, x24, x19\n" + "ldr x21, [%x[input_ptr], x28, LSL #0x3]\n" + "add x21, x21, x20, LSL #3\n" + "ldr x26, [x21, #0x0]\n" + "ldr x25, [x21, #0x8]\n" + "cbnz x28, 35f\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n" + "add x26, x26, x20\n" + "add x25, x25, x20\n" "b 35f\n" "34:" // Height 2: setup direct input - "mov x25, %x[input_ptr]\n" - "add x24, x25, x19\n" + "mov x26, %x[input_ptr]\n" + "add x25, x26, x20\n" "35:" // Height 2: input setup done - "cmp x26, #0x10\n" + "cmp x27, #0x10\n" "blt 38f\n" - "ldr q1, [x25, #0x0]\n" - "ldr q2, [x24, #0x0]\n" - "cmp x26, #0x20\n" + "ldr q1, [x26, #0x0]\n" + "ldr q2, [x25, #0x0]\n" + "cmp x27, #0x20\n" + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "blt 37f\n" "36:" // Height 2: Multiply loop: Main loop head "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x25, x25, #0x10\n" - "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x24, x24, #0x10\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "sub x26, x26, #0x10\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" - "cmp x26, #0x20\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" - "prfm pldl1keep, [x25, #0x80]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" - "prfm pldl1keep, [x24, #0x80]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" + "trn2 v1.2d, v1.2d, v2.2d\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" - "ldr q2, [x24, #0x0]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "sub x27, x27, #0x10\n" + "add x26, x26, #0x10\n" + "add x25, x25, #0x10\n" + "ldr q2, [x25, #0x0]\n" + "cmp x27, #0x20\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" + "add x9, x9, #0x100\n" + "ldr q7, [x9, #0x0]\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" - "ldr q1, [x25, #0x0]\n" + "ldr q1, [x26, #0x0]\n" + "ldr q6, [x9, #0x10]\n" + "prfm pldl1keep, [x26, #0x80]\n" + "prfm pldl1keep, [x25, #0x80]\n" "bge 36b\n" "37:" // Height 2: Multiply loop: Single iteration only "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" - "sub x26, x26, #0x10\n" - "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x25, x25, #0x10\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "add x24, x24, #0x10\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" - "prfm pldl1keep, [x25, #0x80]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" - "prfm pldl1keep, [x24, #0x80]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" + "trn2 v1.2d, v1.2d, v2.2d\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x26, x26, #0x10\n" + "add x25, x25, #0x10\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" + "sub x27, x27, #0x10\n" + "prfm pldl1keep, [x26, #0x80]\n" + "prfm pldl1keep, [x25, #0x80]\n" + "add x9, x9, #0x100\n" "38:" // Height 2: Multiply loop: Main loop skip - "cbz x26, 45f\n" - "cmp x26, #0x8\n" + "cbz x27, 45f\n" + "cmp x27, #0x8\n" "blt 40f\n" "39:" // Height 2: Multiply loop: Odd block loop - "ldr d1, [x25], #0x8\n" - "sub x26, x26, #0x8\n" - "ldr d2, [x24], #0x8\n" + "ldr d1, [x26], #0x8\n" + "ldr d2, [x25], #0x8\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x0]\n" - "cmp x26, #0x8\n" + "sub x27, x27, #0x8\n" + "ldr q6, [x9, #0x0]\n" + "ldr q7, [x9, #0x10]\n" ".inst 0x4e86a408 // smmla v8.4s, v0.16b, v6.16b\n" - "ldr q7, [x28, #0x10]\n" - "ldr q6, [x28, #0x20]\n" ".inst 0x4e87a40c // smmla v12.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x30]\n" + "ldr q6, [x9, #0x20]\n" + "ldr q7, [x9, #0x30]\n" ".inst 0x4e86a409 // smmla v9.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x40]\n" ".inst 0x4e87a40d // smmla v13.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x50]\n" + "ldr q6, [x9, #0x40]\n" + "ldr q7, [x9, #0x50]\n" ".inst 0x4e86a40a // smmla v10.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x60]\n" ".inst 0x4e87a40e // smmla v14.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x60]\n" + "ldr q7, [x9, #0x70]\n" + "cmp x27, #0x8\n" ".inst 0x4e86a40b // smmla v11.4s, v0.16b, v6.16b\n" ".inst 0x4e87a40f // smmla v15.4s, v0.16b, v7.16b\n" + "add x9, x9, #0x80\n" "bge 39b\n" - "cbz x26, 45f\n" "40:" // Height 2: Multiply loop: Skip odd blocks - "tbz x26, #2, 42f\n" - "ldr s1, [x25], #0x4\n" - "ldr s2, [x24], #0x4\n" - "tbz x26, #1, 41f\n" - "ld1 { v1.h }[2], [x25], #0x2\n" - "ld1 { v2.h }[2], [x24], #0x2\n" - "tbz x26, #0, 44f\n" - "ld1 { v1.b }[6], [x25]\n" - "ld1 { v2.b }[6], [x24]\n" + "cbz x27, 45f\n" + "tbz x27, #2, 42f\n" + "ldr s1, [x26], #0x4\n" + "ldr s2, [x25], #0x4\n" + "tbz x27, #1, 41f\n" + "ld1 { v1.h }[2], [x26], #0x2\n" + "ld1 { v2.h }[2], [x25], #0x2\n" + "tbz x27, #0, 44f\n" + "ld1 { v1.b }[6], [x26]\n" + "ld1 { v2.b }[6], [x25]\n" "b 44f\n" "41:" // Height 2: Multiply loop: Ragged operand read: partial_1_4 - "tbz x26, #0, 44f\n" - "ld1 { v1.b }[4], [x25]\n" - "ld1 { v2.b }[4], [x24]\n" + "tbz x27, #0, 44f\n" + "ld1 { v1.b }[4], [x26]\n" + "ld1 { v2.b }[4], [x25]\n" "b 44f\n" "42:" // Height 2: Multiply loop: Ragged operand read: partial_2_0 - "tbz x26, #1, 43f\n" - "ldr h1, [x25], #0x2\n" - "ldr h2, [x24], #0x2\n" - "tbz x26, #0, 44f\n" - "ld1 { v1.b }[2], [x25]\n" - "ld1 { v2.b }[2], [x24]\n" + "tbz x27, #1, 43f\n" + "ldr h1, [x26], #0x2\n" + "ldr h2, [x25], #0x2\n" + "tbz x27, #0, 44f\n" + "ld1 { v1.b }[2], [x26]\n" + "ld1 { v2.b }[2], [x25]\n" "b 44f\n" "43:" // Height 2: Multiply loop: Ragged operand read: partial_1_0 - "ldr b1, [x25, #0x0]\n" - "ldr b2, [x24, #0x0]\n" + "ldr b1, [x26, #0x0]\n" + "ldr b2, [x25, #0x0]\n" "44:" // Height 2: Multiply loop: Ragged operand read: Done + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" - "ldr q6, [x28, #0x10]\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" + "add x9, x9, #0x80\n" "45:" // Height 2: Multiply loop: No odd multiplies - "ldr w19, [%x[args_ptr], %[offsetof_num_strings]]\n" - "add x27, x27, #0x1\n" - "cmp x27, x19\n" + "ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n" + "add x28, x28, #0x1\n" + "cmp x28, x20\n" "bne 33b\n" + "ldr q0, [x14, #0x0]\n" + "ldr q1, [x14, #0x10]\n" "uzp1 v7.2d, v8.2d, v12.2d\n" - "ldr x19, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp2 v8.2d, v8.2d, v12.2d\n" - "prfm pstl1keep, [x9, #0x0]\n" - "add x23, x9, x19\n" + "ldr q2, [x14, #0x20]\n" + "ldr q3, [x14, #0x30]\n" "uzp1 v12.2d, v9.2d, v13.2d\n" - "ldr q0, [x11, #0x0]\n" "uzp2 v9.2d, v9.2d, v13.2d\n" - "prfm pstl1keep, [x23, #0x0]\n" + "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp1 v13.2d, v10.2d, v14.2d\n" - "ldr q1, [x11, #0x10]\n" "uzp2 v10.2d, v10.2d, v14.2d\n" - "ldr q2, [x11, #0x20]\n" + "add x24, x11, x20\n" "uzp1 v14.2d, v11.2d, v15.2d\n" - "ldr q3, [x11, #0x30]\n" - "add x11, x11, #0x40\n" "uzp2 v11.2d, v11.2d, v15.2d\n" + "prfm pstl1keep, [x11, #0x0]\n" + "prfm pstl1keep, [x24, #0x0]\n" "mov v15.16b, v7.16b\n" "add v15.4s, v15.4s, v0.4s\n" + "add x14, x14, #0x40\n" "add v12.4s, v12.4s, v1.4s\n" "add v13.4s, v13.4s, v2.4s\n" "add v14.4s, v14.4s, v3.4s\n" @@ -667,20 +663,20 @@ void a64_hybrid_s8qs_mmla_6x16 ( "ldr q2, [x12, #0x20]\n" "ldr q6, [x13, #0x20]\n" "ldr q3, [x12, #0x30]\n" - "add x12, x12, #0x40\n" "ldr q7, [x13, #0x30]\n" + "add x12, x12, #0x40\n" "add x13, x13, #0x40\n" "b 47f\n" "46:" // Height 2: per layer parameters - "add x24, %x[qp], %[per_layer_right_shift]\n" - "ld1r { v0.4s }, [x24]\n" + "add x25, %x[qp], %[per_layer_right_shift]\n" + "ld1r { v0.4s }, [x25]\n" + "add x25, %x[qp], %[per_layer_mul]\n" + "ld1r { v4.4s }, [x25]\n" "mov v1.16b, v0.16b\n" - "add x24, %x[qp], %[per_layer_mul]\n" - "ld1r { v4.4s }, [x24]\n" - "mov v2.16b, v0.16b\n" - "mov v3.16b, v0.16b\n" "mov v5.16b, v4.16b\n" + "mov v2.16b, v0.16b\n" "mov v6.16b, v4.16b\n" + "mov v3.16b, v0.16b\n" "mov v7.16b, v4.16b\n" "47:" // Height 2: parameters loaded "sqrdmulh v15.4s, v15.4s, v4.4s\n" @@ -695,149 +691,149 @@ void a64_hybrid_s8qs_mmla_6x16 ( "and v4.16b, v15.16b, v0.16b\n" "and v5.16b, v12.16b, v1.16b\n" "and v6.16b, v13.16b, v2.16b\n" + "and v7.16b, v14.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v15.4s, v15.4s, v4.4s\n" "sqadd v12.4s, v12.4s, v5.4s\n" "sqadd v13.4s, v13.4s, v6.4s\n" - "and v7.16b, v14.16b, v3.16b\n" + "sqadd v14.4s, v14.4s, v7.4s\n" "and v4.16b, v8.16b, v0.16b\n" "and v5.16b, v9.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v14.4s, v14.4s, v7.4s\n" - "sqadd v8.4s, v8.4s, v4.4s\n" - "sqadd v9.4s, v9.4s, v5.4s\n" "and v6.16b, v10.16b, v2.16b\n" "and v7.16b, v11.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v8.4s, v8.4s, v4.4s\n" + "sqadd v9.4s, v9.4s, v5.4s\n" "sqadd v10.4s, v10.4s, v6.4s\n" "sqadd v11.4s, v11.4s, v7.4s\n" "48:" // Height 2: no shift correction + "add x25, %x[qp], %[c_offset]\n" + "ld1r { v4.4s }, [x25]\n" "srshl v15.4s, v15.4s, v0.4s\n" - "add x24, %x[qp], %[c_offset]\n" - "ld1r { v4.4s }, [x24]\n" "srshl v12.4s, v12.4s, v1.4s\n" - "add x24, %x[qp], %[minval]\n" "srshl v13.4s, v13.4s, v2.4s\n" - "ld1r { v5.4s }, [x24]\n" - "add x24, %x[qp], %[maxval]\n" "srshl v14.4s, v14.4s, v3.4s\n" - "ld1r { v6.4s }, [x24]\n" - "cmp x10, #0x10\n" + "add x25, %x[qp], %[maxval]\n" + "ld1r { v6.4s }, [x25]\n" "srshl v8.4s, v8.4s, v0.4s\n" "srshl v9.4s, v9.4s, v1.4s\n" + "add x25, %x[qp], %[minval]\n" + "ld1r { v5.4s }, [x25]\n" + "srshl v10.4s, v10.4s, v2.4s\n" + "srshl v11.4s, v11.4s, v3.4s\n" + "cmp x10, #0x10\n" "add v15.4s, v15.4s, v4.4s\n" "add v12.4s, v12.4s, v4.4s\n" "add v13.4s, v13.4s, v4.4s\n" - "smin v15.4s, v15.4s, v6.4s\n" - "smin v12.4s, v12.4s, v6.4s\n" - "smin v13.4s, v13.4s, v6.4s\n" - "smax v15.4s, v15.4s, v5.4s\n" - "smax v12.4s, v12.4s, v5.4s\n" - "smax v13.4s, v13.4s, v5.4s\n" "add v14.4s, v14.4s, v4.4s\n" "add v8.4s, v8.4s, v4.4s\n" "add v9.4s, v9.4s, v4.4s\n" + "add v10.4s, v10.4s, v4.4s\n" + "add v11.4s, v11.4s, v4.4s\n" + "smin v15.4s, v15.4s, v6.4s\n" + "smin v12.4s, v12.4s, v6.4s\n" + "smin v13.4s, v13.4s, v6.4s\n" "smin v14.4s, v14.4s, v6.4s\n" "smin v8.4s, v8.4s, v6.4s\n" "smin v9.4s, v9.4s, v6.4s\n" + "smin v10.4s, v10.4s, v6.4s\n" + "smin v11.4s, v11.4s, v6.4s\n" + "smax v15.4s, v15.4s, v5.4s\n" + "smax v12.4s, v12.4s, v5.4s\n" + "smax v13.4s, v13.4s, v5.4s\n" "smax v14.4s, v14.4s, v5.4s\n" "smax v8.4s, v8.4s, v5.4s\n" "smax v9.4s, v9.4s, v5.4s\n" - "srshl v10.4s, v10.4s, v2.4s\n" - "srshl v11.4s, v11.4s, v3.4s\n" + "smax v10.4s, v10.4s, v5.4s\n" + "smax v11.4s, v11.4s, v5.4s\n" "uzp1 v15.8h, v15.8h, v12.8h\n" "uzp1 v12.8h, v13.8h, v14.8h\n" - "add v10.4s, v10.4s, v4.4s\n" - "add v11.4s, v11.4s, v4.4s\n" "uzp1 v8.8h, v8.8h, v9.8h\n" - "smin v10.4s, v10.4s, v6.4s\n" - "smin v11.4s, v11.4s, v6.4s\n" - "uzp1 v15.16b, v15.16b, v12.16b\n" - "smax v10.4s, v10.4s, v5.4s\n" - "smax v11.4s, v11.4s, v5.4s\n" "uzp1 v9.8h, v10.8h, v11.8h\n" + "uzp1 v15.16b, v15.16b, v12.16b\n" "uzp1 v8.16b, v8.16b, v9.16b\n" "bge 57f\n" "tbz x10, #3, 52f\n" - "str d15, [x9], #0x8\n" - "str d8, [x23], #0x8\n" + "str d15, [x11], #0x8\n" + "str d8, [x24], #0x8\n" "tbz x10, #2, 50f\n" - "st1 { v15.s }[2], [x9], #0x4\n" - "st1 { v8.s }[2], [x23], #0x4\n" + "st1 { v15.s }[2], [x11], #0x4\n" + "st1 { v8.s }[2], [x24], #0x4\n" "tbz x10, #1, 49f\n" - "st1 { v15.h }[6], [x9], #0x2\n" - "st1 { v8.h }[6], [x23], #0x2\n" + "st1 { v15.h }[6], [x11], #0x2\n" + "st1 { v8.h }[6], [x24], #0x2\n" "tbz x10, #0, 56f\n" - "st1 { v15.b }[14], [x9]\n" - "st1 { v8.b }[14], [x23]\n" + "st1 { v15.b }[14], [x11]\n" + "st1 { v8.b }[14], [x24]\n" "b 56f\n" "49:" // Height 2: Partial direct writeback: partial_1_12 "tbz x10, #0, 56f\n" - "st1 { v15.b }[12], [x9]\n" - "st1 { v8.b }[12], [x23]\n" + "st1 { v15.b }[12], [x11]\n" + "st1 { v8.b }[12], [x24]\n" "b 56f\n" "50:" // Height 2: Partial direct writeback: partial_2_8 "tbz x10, #1, 51f\n" - "st1 { v15.h }[4], [x9], #0x2\n" - "st1 { v8.h }[4], [x23], #0x2\n" + "st1 { v15.h }[4], [x11], #0x2\n" + "st1 { v8.h }[4], [x24], #0x2\n" "tbz x10, #0, 56f\n" - "st1 { v15.b }[10], [x9]\n" - "st1 { v8.b }[10], [x23]\n" + "st1 { v15.b }[10], [x11]\n" + "st1 { v8.b }[10], [x24]\n" "b 56f\n" "51:" // Height 2: Partial direct writeback: partial_1_8 "tbz x10, #0, 56f\n" - "st1 { v15.b }[8], [x9]\n" - "st1 { v8.b }[8], [x23]\n" + "st1 { v15.b }[8], [x11]\n" + "st1 { v8.b }[8], [x24]\n" "b 56f\n" "52:" // Height 2: Partial direct writeback: partial_4_0 "tbz x10, #2, 54f\n" - "str s15, [x9], #0x4\n" - "str s8, [x23], #0x4\n" + "str s15, [x11], #0x4\n" + "str s8, [x24], #0x4\n" "tbz x10, #1, 53f\n" - "st1 { v15.h }[2], [x9], #0x2\n" - "st1 { v8.h }[2], [x23], #0x2\n" + "st1 { v15.h }[2], [x11], #0x2\n" + "st1 { v8.h }[2], [x24], #0x2\n" "tbz x10, #0, 56f\n" - "st1 { v15.b }[6], [x9]\n" - "st1 { v8.b }[6], [x23]\n" + "st1 { v15.b }[6], [x11]\n" + "st1 { v8.b }[6], [x24]\n" "b 56f\n" "53:" // Height 2: Partial direct writeback: partial_1_4 "tbz x10, #0, 56f\n" - "st1 { v15.b }[4], [x9]\n" - "st1 { v8.b }[4], [x23]\n" + "st1 { v15.b }[4], [x11]\n" + "st1 { v8.b }[4], [x24]\n" "b 56f\n" "54:" // Height 2: Partial direct writeback: partial_2_0 "tbz x10, #1, 55f\n" - "str h15, [x9], #0x2\n" - "str h8, [x23], #0x2\n" + "str h15, [x11], #0x2\n" + "str h8, [x24], #0x2\n" "tbz x10, #0, 56f\n" - "st1 { v15.b }[2], [x9]\n" - "st1 { v8.b }[2], [x23]\n" + "st1 { v15.b }[2], [x11]\n" + "st1 { v8.b }[2], [x24]\n" "b 56f\n" "55:" // Height 2: Partial direct writeback: partial_1_0 - "str b15, [x9, #0x0]\n" - "str b8, [x23, #0x0]\n" + "str b15, [x11, #0x0]\n" + "str b8, [x24, #0x0]\n" "56:" // Height 2: Partial direct writeback: Done "b 58f\n" "57:" // Height 2: Full writeback - "str q15, [x9, #0x0]\n" - "add x9, x9, #0x10\n" - "str q8, [x23, #0x0]\n" + "str q15, [x11, #0x0]\n" + "add x11, x11, #0x10\n" + "str q8, [x24, #0x0]\n" "58:" // Height 2: Writeback done "subs x10, x10, #0x10\n" "bgt 31b\n" "b 176f\n" "59:" // Height 3 + "mov x14, %x[col_bias]\n" "ldr x13, [%x[args_ptr], %[offsetof_multiplier_ptr]]\n" - "mov x11, %x[col_bias]\n" "ldr x12, [%x[args_ptr], %[offsetof_shift_ptr]]\n" - "mov x9, %x[output_ptr]\n" + "mov x11, %x[output_ptr]\n" "ldr x10, [%x[args_ptr], %[offsetof_N]]\n" - "ldr x28, [%x[args_ptr], %[offsetof_B_ptr]]\n" + "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" "60:" // Height 3: Column loop "movi v8.4s, #0x0\n" "movi v9.4s, #0x0\n" @@ -856,295 +852,291 @@ void a64_hybrid_s8qs_mmla_6x16 ( "movi v22.4s, #0x0\n" "movi v23.4s, #0x0\n" "61:" // Height 3: setup done - "mov x27, #0x0\n" + "mov x28, #0x0\n" "62:" // Height 3: String loop "ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_offset]]\n" - "ldr w26, [x20, x27, LSL #0x2]\n" + "ldr w27, [x20, x28, LSL #0x2]\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 63f\n" - "ldr x20, [%x[input_ptr], x27, LSL #0x3]\n" - "add x20, x20, x19, LSL #3\n" - "ldr x25, [x20, #0x0]\n" - "ldr x24, [x20, #0x8]\n" - "ldr x23, [x20, #0x10]\n" - "cbnz x27, 64f\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_initial_col]]\n" - "add x25, x25, x19\n" - "add x24, x24, x19\n" - "add x23, x23, x19\n" + "ldr x21, [%x[input_ptr], x28, LSL #0x3]\n" + "add x21, x21, x20, LSL #3\n" + "ldr x26, [x21, #0x0]\n" + "ldr x25, [x21, #0x8]\n" + "ldr x24, [x21, #0x10]\n" + "cbnz x28, 64f\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n" + "add x26, x26, x20\n" + "add x25, x25, x20\n" + "add x24, x24, x20\n" "b 64f\n" "63:" // Height 3: setup direct input - "mov x25, %x[input_ptr]\n" - "add x24, x25, x19\n" - "add x23, x24, x19\n" + "mov x26, %x[input_ptr]\n" + "add x25, x26, x20\n" + "add x24, x25, x20\n" "64:" // Height 3: input setup done - "cmp x26, #0x10\n" + "cmp x27, #0x10\n" "blt 67f\n" - "ldr q1, [x25, #0x0]\n" - "cmp x26, #0x20\n" + "ldr q1, [x26, #0x0]\n" + "ldr q2, [x25, #0x0]\n" + "cmp x27, #0x20\n" + "ldr q3, [x24, #0x0]\n" + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "blt 66f\n" "65:" // Height 3: Multiply loop: Main loop head - "movi v4.16b, #0x0\n" - "ldr q2, [x24, #0x0]\n" - "add x25, x25, #0x10\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "add x24, x24, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x23, x23, #0x10\n" - "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x10]\n" - "sub x26, x26, #0x10\n" - "trn2 v3.2d, v3.2d, v4.2d\n" - "prfm pldl1keep, [x25, #0x80]\n" - "cmp x26, #0x20\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" + "trn1 v2.2d, v3.2d, v4.2d\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "prfm pldl1keep, [x23, #0x80]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" + "trn2 v3.2d, v3.2d, v4.2d\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" + "sub x27, x27, #0x10\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "add x26, x26, #0x10\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" + "add x25, x25, #0x10\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "add x24, x24, #0x10\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" + "cmp x27, #0x20\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" + "ldr q2, [x25, #0x0]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" + "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" + "ldr q7, [x9, #0x0]\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" - "ldr q1, [x25, #0x0]\n" + "ldr q1, [x26, #0x0]\n" ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" + "ldr q3, [x24, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "bge 65b\n" "66:" // Height 3: Multiply loop: Single iteration only - "movi v4.16b, #0x0\n" - "ldr q2, [x24, #0x0]\n" - "sub x26, x26, #0x10\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "add x25, x25, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x24, x24, #0x10\n" - "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x23, x23, #0x10\n" - "trn2 v3.2d, v3.2d, v4.2d\n" - "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" + "trn1 v2.2d, v3.2d, v4.2d\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "prfm pldl1keep, [x23, #0x80]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" + "trn2 v3.2d, v3.2d, v4.2d\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" + "add x26, x26, #0x10\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "add x25, x25, #0x10\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" + "add x24, x24, #0x10\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "sub x27, x27, #0x10\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" + "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" "67:" // Height 3: Multiply loop: Main loop skip - "cbz x26, 74f\n" - "cmp x26, #0x8\n" + "cbz x27, 74f\n" + "cmp x27, #0x8\n" "blt 69f\n" "68:" // Height 3: Multiply loop: Odd block loop - "movi v4.16b, #0x0\n" - "ldr d1, [x25], #0x8\n" - "sub x26, x26, #0x8\n" - "ldr d2, [x24], #0x8\n" + "ldr d1, [x26], #0x8\n" + "ldr d2, [x25], #0x8\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr d3, [x23], #0x8\n" - "cmp x26, #0x8\n" + "ldr d3, [x24], #0x8\n" + "ldr q6, [x9, #0x0]\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x0]\n" - "ldr q7, [x28, #0x10]\n" ".inst 0x4e86a408 // smmla v8.4s, v0.16b, v6.16b\n" + "ldr q7, [x9, #0x10]\n" ".inst 0x4e86a450 // smmla v16.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x20]\n" + "ldr q6, [x9, #0x20]\n" ".inst 0x4e87a40c // smmla v12.4s, v0.16b, v7.16b\n" ".inst 0x4e87a454 // smmla v20.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x30]\n" + "ldr q7, [x9, #0x30]\n" ".inst 0x4e86a409 // smmla v9.4s, v0.16b, v6.16b\n" + "sub x27, x27, #0x8\n" ".inst 0x4e86a451 // smmla v17.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x40]\n" + "ldr q6, [x9, #0x40]\n" ".inst 0x4e87a40d // smmla v13.4s, v0.16b, v7.16b\n" + "cmp x27, #0x8\n" ".inst 0x4e87a455 // smmla v21.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x50]\n" + "ldr q7, [x9, #0x50]\n" ".inst 0x4e86a40a // smmla v10.4s, v0.16b, v6.16b\n" ".inst 0x4e86a452 // smmla v18.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x60]\n" + "ldr q6, [x9, #0x60]\n" ".inst 0x4e87a40e // smmla v14.4s, v0.16b, v7.16b\n" ".inst 0x4e87a456 // smmla v22.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q7, [x9, #0x70]\n" ".inst 0x4e86a40b // smmla v11.4s, v0.16b, v6.16b\n" + "add x9, x9, #0x80\n" ".inst 0x4e86a453 // smmla v19.4s, v2.16b, v6.16b\n" ".inst 0x4e87a40f // smmla v15.4s, v0.16b, v7.16b\n" ".inst 0x4e87a457 // smmla v23.4s, v2.16b, v7.16b\n" "bge 68b\n" - "cbz x26, 74f\n" "69:" // Height 3: Multiply loop: Skip odd blocks - "tbz x26, #2, 71f\n" - "ldr s1, [x25], #0x4\n" - "ldr s2, [x24], #0x4\n" - "ldr s3, [x23], #0x4\n" - "tbz x26, #1, 70f\n" - "ld1 { v1.h }[2], [x25], #0x2\n" - "ld1 { v2.h }[2], [x24], #0x2\n" - "ld1 { v3.h }[2], [x23], #0x2\n" - "tbz x26, #0, 73f\n" - "ld1 { v1.b }[6], [x25]\n" - "ld1 { v2.b }[6], [x24]\n" - "ld1 { v3.b }[6], [x23]\n" + "cbz x27, 74f\n" + "tbz x27, #2, 71f\n" + "ldr s1, [x26], #0x4\n" + "ldr s2, [x25], #0x4\n" + "ldr s3, [x24], #0x4\n" + "tbz x27, #1, 70f\n" + "ld1 { v1.h }[2], [x26], #0x2\n" + "ld1 { v2.h }[2], [x25], #0x2\n" + "ld1 { v3.h }[2], [x24], #0x2\n" + "tbz x27, #0, 73f\n" + "ld1 { v1.b }[6], [x26]\n" + "ld1 { v2.b }[6], [x25]\n" + "ld1 { v3.b }[6], [x24]\n" "b 73f\n" "70:" // Height 3: Multiply loop: Ragged operand read: partial_1_4 - "tbz x26, #0, 73f\n" - "ld1 { v1.b }[4], [x25]\n" - "ld1 { v2.b }[4], [x24]\n" - "ld1 { v3.b }[4], [x23]\n" + "tbz x27, #0, 73f\n" + "ld1 { v1.b }[4], [x26]\n" + "ld1 { v2.b }[4], [x25]\n" + "ld1 { v3.b }[4], [x24]\n" "b 73f\n" "71:" // Height 3: Multiply loop: Ragged operand read: partial_2_0 - "tbz x26, #1, 72f\n" - "ldr h1, [x25], #0x2\n" - "ldr h2, [x24], #0x2\n" - "ldr h3, [x23], #0x2\n" - "tbz x26, #0, 73f\n" - "ld1 { v1.b }[2], [x25]\n" - "ld1 { v2.b }[2], [x24]\n" - "ld1 { v3.b }[2], [x23]\n" + "tbz x27, #1, 72f\n" + "ldr h1, [x26], #0x2\n" + "ldr h2, [x25], #0x2\n" + "ldr h3, [x24], #0x2\n" + "tbz x27, #0, 73f\n" + "ld1 { v1.b }[2], [x26]\n" + "ld1 { v2.b }[2], [x25]\n" + "ld1 { v3.b }[2], [x24]\n" "b 73f\n" "72:" // Height 3: Multiply loop: Ragged operand read: partial_1_0 - "ldr b1, [x25, #0x0]\n" - "ldr b2, [x24, #0x0]\n" - "ldr b3, [x23, #0x0]\n" + "ldr b1, [x26, #0x0]\n" + "ldr b2, [x25, #0x0]\n" + "ldr b3, [x24, #0x0]\n" "73:" // Height 3: Multiply loop: Ragged operand read: Done - "movi v4.16b, #0x0\n" - "ldr q7, [x28, #0x0]\n" + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q6, [x28, #0x10]\n" "trn1 v2.2d, v3.2d, v4.2d\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x70]\n" + "add x9, x9, #0x80\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" "74:" // Height 3: Multiply loop: No odd multiplies - "ldr w19, [%x[args_ptr], %[offsetof_num_strings]]\n" - "add x27, x27, #0x1\n" - "cmp x27, x19\n" + "ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n" + "add x28, x28, #0x1\n" + "cmp x28, x20\n" "bne 62b\n" + "ldr q0, [x14, #0x0]\n" + "ldr q1, [x14, #0x10]\n" "uzp1 v7.2d, v8.2d, v12.2d\n" - "ldr x19, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp2 v8.2d, v8.2d, v12.2d\n" - "prfm pstl1keep, [x9, #0x0]\n" - "add x23, x9, x19\n" + "ldr q2, [x14, #0x20]\n" + "ldr q3, [x14, #0x30]\n" "uzp1 v12.2d, v9.2d, v13.2d\n" - "ldr q0, [x11, #0x0]\n" "uzp2 v9.2d, v9.2d, v13.2d\n" - "prfm pstl1keep, [x23, #0x0]\n" - "add x22, x23, x19\n" + "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp1 v13.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x22, #0x0]\n" "uzp2 v10.2d, v10.2d, v14.2d\n" - "ldr q1, [x11, #0x10]\n" + "add x24, x11, x20\n" "uzp1 v14.2d, v11.2d, v15.2d\n" - "ldr q2, [x11, #0x20]\n" "uzp2 v11.2d, v11.2d, v15.2d\n" - "ldr q3, [x11, #0x30]\n" - "add x11, x11, #0x40\n" + "add x23, x24, x20\n" + "prfm pstl1keep, [x11, #0x0]\n" "uzp1 v16.2d, v16.2d, v20.2d\n" "uzp1 v17.2d, v17.2d, v21.2d\n" + "prfm pstl1keep, [x24, #0x0]\n" + "prfm pstl1keep, [x23, #0x0]\n" "uzp1 v18.2d, v18.2d, v22.2d\n" "uzp1 v19.2d, v19.2d, v23.2d\n" + "add x14, x14, #0x40\n" "mov v23.16b, v7.16b\n" "add v23.4s, v23.4s, v0.4s\n" "add v12.4s, v12.4s, v1.4s\n" @@ -1166,20 +1158,20 @@ void a64_hybrid_s8qs_mmla_6x16 ( "ldr q2, [x12, #0x20]\n" "ldr q6, [x13, #0x20]\n" "ldr q3, [x12, #0x30]\n" - "add x12, x12, #0x40\n" "ldr q7, [x13, #0x30]\n" + "add x12, x12, #0x40\n" "add x13, x13, #0x40\n" "b 76f\n" "75:" // Height 3: per layer parameters - "add x24, %x[qp], %[per_layer_right_shift]\n" - "ld1r { v0.4s }, [x24]\n" + "add x25, %x[qp], %[per_layer_right_shift]\n" + "ld1r { v0.4s }, [x25]\n" + "add x25, %x[qp], %[per_layer_mul]\n" + "ld1r { v4.4s }, [x25]\n" "mov v1.16b, v0.16b\n" - "add x24, %x[qp], %[per_layer_mul]\n" - "ld1r { v4.4s }, [x24]\n" - "mov v2.16b, v0.16b\n" - "mov v3.16b, v0.16b\n" "mov v5.16b, v4.16b\n" + "mov v2.16b, v0.16b\n" "mov v6.16b, v4.16b\n" + "mov v3.16b, v0.16b\n" "mov v7.16b, v4.16b\n" "76:" // Height 3: parameters loaded "sqrdmulh v23.4s, v23.4s, v4.4s\n" @@ -1198,98 +1190,98 @@ void a64_hybrid_s8qs_mmla_6x16 ( "and v4.16b, v23.16b, v0.16b\n" "and v5.16b, v12.16b, v1.16b\n" "and v6.16b, v13.16b, v2.16b\n" + "and v7.16b, v14.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v23.4s, v23.4s, v4.4s\n" "sqadd v12.4s, v12.4s, v5.4s\n" "sqadd v13.4s, v13.4s, v6.4s\n" - "and v7.16b, v14.16b, v3.16b\n" + "sqadd v14.4s, v14.4s, v7.4s\n" "and v4.16b, v8.16b, v0.16b\n" "and v5.16b, v9.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v14.4s, v14.4s, v7.4s\n" - "sqadd v8.4s, v8.4s, v4.4s\n" - "sqadd v9.4s, v9.4s, v5.4s\n" "and v6.16b, v10.16b, v2.16b\n" "and v7.16b, v11.16b, v3.16b\n" - "and v4.16b, v16.16b, v0.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" + "sqadd v8.4s, v8.4s, v4.4s\n" + "sqadd v9.4s, v9.4s, v5.4s\n" "sqadd v10.4s, v10.4s, v6.4s\n" "sqadd v11.4s, v11.4s, v7.4s\n" - "sqadd v16.4s, v16.4s, v4.4s\n" + "and v4.16b, v16.16b, v0.16b\n" "and v5.16b, v17.16b, v1.16b\n" "and v6.16b, v18.16b, v2.16b\n" "and v7.16b, v19.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v16.4s, v16.4s, v4.4s\n" "sqadd v17.4s, v17.4s, v5.4s\n" "sqadd v18.4s, v18.4s, v6.4s\n" "sqadd v19.4s, v19.4s, v7.4s\n" "77:" // Height 3: no shift correction + "add x25, %x[qp], %[c_offset]\n" + "ld1r { v4.4s }, [x25]\n" "srshl v23.4s, v23.4s, v0.4s\n" - "add x24, %x[qp], %[c_offset]\n" - "ld1r { v4.4s }, [x24]\n" "srshl v12.4s, v12.4s, v1.4s\n" - "add x24, %x[qp], %[minval]\n" "srshl v13.4s, v13.4s, v2.4s\n" - "ld1r { v5.4s }, [x24]\n" - "add x24, %x[qp], %[maxval]\n" "srshl v14.4s, v14.4s, v3.4s\n" - "ld1r { v6.4s }, [x24]\n" - "cmp x10, #0x10\n" + "add x25, %x[qp], %[maxval]\n" + "ld1r { v6.4s }, [x25]\n" "srshl v8.4s, v8.4s, v0.4s\n" "srshl v9.4s, v9.4s, v1.4s\n" + "add x25, %x[qp], %[minval]\n" + "ld1r { v5.4s }, [x25]\n" + "srshl v10.4s, v10.4s, v2.4s\n" + "srshl v11.4s, v11.4s, v3.4s\n" + "cmp x10, #0x10\n" + "srshl v16.4s, v16.4s, v0.4s\n" + "srshl v17.4s, v17.4s, v1.4s\n" + "srshl v18.4s, v18.4s, v2.4s\n" + "srshl v19.4s, v19.4s, v3.4s\n" "add v23.4s, v23.4s, v4.4s\n" "add v12.4s, v12.4s, v4.4s\n" "add v13.4s, v13.4s, v4.4s\n" - "smin v23.4s, v23.4s, v6.4s\n" - "smin v12.4s, v12.4s, v6.4s\n" - "smin v13.4s, v13.4s, v6.4s\n" - "smax v23.4s, v23.4s, v5.4s\n" - "smax v12.4s, v12.4s, v5.4s\n" - "smax v13.4s, v13.4s, v5.4s\n" "add v14.4s, v14.4s, v4.4s\n" "add v8.4s, v8.4s, v4.4s\n" "add v9.4s, v9.4s, v4.4s\n" - "smin v14.4s, v14.4s, v6.4s\n" - "smin v8.4s, v8.4s, v6.4s\n" - "smin v9.4s, v9.4s, v6.4s\n" - "smax v14.4s, v14.4s, v5.4s\n" - "smax v8.4s, v8.4s, v5.4s\n" - "smax v9.4s, v9.4s, v5.4s\n" - "srshl v10.4s, v10.4s, v2.4s\n" - "srshl v11.4s, v11.4s, v3.4s\n" - "srshl v16.4s, v16.4s, v0.4s\n" - "srshl v17.4s, v17.4s, v1.4s\n" "add v10.4s, v10.4s, v4.4s\n" "add v11.4s, v11.4s, v4.4s\n" "add v16.4s, v16.4s, v4.4s\n" + "add v17.4s, v17.4s, v4.4s\n" + "add v18.4s, v18.4s, v4.4s\n" + "add v19.4s, v19.4s, v4.4s\n" + "smin v23.4s, v23.4s, v6.4s\n" + "smin v12.4s, v12.4s, v6.4s\n" + "smin v13.4s, v13.4s, v6.4s\n" + "smin v14.4s, v14.4s, v6.4s\n" + "smin v8.4s, v8.4s, v6.4s\n" + "smin v9.4s, v9.4s, v6.4s\n" "smin v10.4s, v10.4s, v6.4s\n" "smin v11.4s, v11.4s, v6.4s\n" "smin v16.4s, v16.4s, v6.4s\n" + "smin v17.4s, v17.4s, v6.4s\n" + "smin v18.4s, v18.4s, v6.4s\n" + "smin v19.4s, v19.4s, v6.4s\n" + "smax v23.4s, v23.4s, v5.4s\n" + "smax v12.4s, v12.4s, v5.4s\n" + "smax v13.4s, v13.4s, v5.4s\n" + "smax v14.4s, v14.4s, v5.4s\n" + "smax v8.4s, v8.4s, v5.4s\n" + "smax v9.4s, v9.4s, v5.4s\n" "smax v10.4s, v10.4s, v5.4s\n" "smax v11.4s, v11.4s, v5.4s\n" "smax v16.4s, v16.4s, v5.4s\n" - "add v17.4s, v17.4s, v4.4s\n" - "srshl v18.4s, v18.4s, v2.4s\n" - "srshl v19.4s, v19.4s, v3.4s\n" - "smin v17.4s, v17.4s, v6.4s\n" - "uzp1 v23.8h, v23.8h, v12.8h\n" - "add v18.4s, v18.4s, v4.4s\n" "smax v17.4s, v17.4s, v5.4s\n" - "add v19.4s, v19.4s, v4.4s\n" - "smin v18.4s, v18.4s, v6.4s\n" - "uzp1 v12.8h, v13.8h, v14.8h\n" - "smin v19.4s, v19.4s, v6.4s\n" "smax v18.4s, v18.4s, v5.4s\n" - "uzp1 v8.8h, v8.8h, v9.8h\n" "smax v19.4s, v19.4s, v5.4s\n" + "uzp1 v23.8h, v23.8h, v12.8h\n" + "uzp1 v12.8h, v13.8h, v14.8h\n" + "uzp1 v8.8h, v8.8h, v9.8h\n" "uzp1 v9.8h, v10.8h, v11.8h\n" "uzp1 v16.8h, v16.8h, v17.8h\n" "uzp1 v17.8h, v18.8h, v19.8h\n" @@ -1298,96 +1290,96 @@ void a64_hybrid_s8qs_mmla_6x16 ( "uzp1 v16.16b, v16.16b, v17.16b\n" "bge 86f\n" "tbz x10, #3, 81f\n" - "str d23, [x9], #0x8\n" - "str d8, [x23], #0x8\n" - "str d16, [x22], #0x8\n" + "str d23, [x11], #0x8\n" + "str d8, [x24], #0x8\n" + "str d16, [x23], #0x8\n" "tbz x10, #2, 79f\n" - "st1 { v23.s }[2], [x9], #0x4\n" - "st1 { v8.s }[2], [x23], #0x4\n" - "st1 { v16.s }[2], [x22], #0x4\n" + "st1 { v23.s }[2], [x11], #0x4\n" + "st1 { v8.s }[2], [x24], #0x4\n" + "st1 { v16.s }[2], [x23], #0x4\n" "tbz x10, #1, 78f\n" - "st1 { v23.h }[6], [x9], #0x2\n" - "st1 { v8.h }[6], [x23], #0x2\n" - "st1 { v16.h }[6], [x22], #0x2\n" + "st1 { v23.h }[6], [x11], #0x2\n" + "st1 { v8.h }[6], [x24], #0x2\n" + "st1 { v16.h }[6], [x23], #0x2\n" "tbz x10, #0, 85f\n" - "st1 { v23.b }[14], [x9]\n" - "st1 { v8.b }[14], [x23]\n" - "st1 { v16.b }[14], [x22]\n" + "st1 { v23.b }[14], [x11]\n" + "st1 { v8.b }[14], [x24]\n" + "st1 { v16.b }[14], [x23]\n" "b 85f\n" "78:" // Height 3: Partial direct writeback: partial_1_12 "tbz x10, #0, 85f\n" - "st1 { v23.b }[12], [x9]\n" - "st1 { v8.b }[12], [x23]\n" - "st1 { v16.b }[12], [x22]\n" + "st1 { v23.b }[12], [x11]\n" + "st1 { v8.b }[12], [x24]\n" + "st1 { v16.b }[12], [x23]\n" "b 85f\n" "79:" // Height 3: Partial direct writeback: partial_2_8 "tbz x10, #1, 80f\n" - "st1 { v23.h }[4], [x9], #0x2\n" - "st1 { v8.h }[4], [x23], #0x2\n" - "st1 { v16.h }[4], [x22], #0x2\n" + "st1 { v23.h }[4], [x11], #0x2\n" + "st1 { v8.h }[4], [x24], #0x2\n" + "st1 { v16.h }[4], [x23], #0x2\n" "tbz x10, #0, 85f\n" - "st1 { v23.b }[10], [x9]\n" - "st1 { v8.b }[10], [x23]\n" - "st1 { v16.b }[10], [x22]\n" + "st1 { v23.b }[10], [x11]\n" + "st1 { v8.b }[10], [x24]\n" + "st1 { v16.b }[10], [x23]\n" "b 85f\n" "80:" // Height 3: Partial direct writeback: partial_1_8 "tbz x10, #0, 85f\n" - "st1 { v23.b }[8], [x9]\n" - "st1 { v8.b }[8], [x23]\n" - "st1 { v16.b }[8], [x22]\n" + "st1 { v23.b }[8], [x11]\n" + "st1 { v8.b }[8], [x24]\n" + "st1 { v16.b }[8], [x23]\n" "b 85f\n" "81:" // Height 3: Partial direct writeback: partial_4_0 "tbz x10, #2, 83f\n" - "str s23, [x9], #0x4\n" - "str s8, [x23], #0x4\n" - "str s16, [x22], #0x4\n" + "str s23, [x11], #0x4\n" + "str s8, [x24], #0x4\n" + "str s16, [x23], #0x4\n" "tbz x10, #1, 82f\n" - "st1 { v23.h }[2], [x9], #0x2\n" - "st1 { v8.h }[2], [x23], #0x2\n" - "st1 { v16.h }[2], [x22], #0x2\n" + "st1 { v23.h }[2], [x11], #0x2\n" + "st1 { v8.h }[2], [x24], #0x2\n" + "st1 { v16.h }[2], [x23], #0x2\n" "tbz x10, #0, 85f\n" - "st1 { v23.b }[6], [x9]\n" - "st1 { v8.b }[6], [x23]\n" - "st1 { v16.b }[6], [x22]\n" + "st1 { v23.b }[6], [x11]\n" + "st1 { v8.b }[6], [x24]\n" + "st1 { v16.b }[6], [x23]\n" "b 85f\n" "82:" // Height 3: Partial direct writeback: partial_1_4 "tbz x10, #0, 85f\n" - "st1 { v23.b }[4], [x9]\n" - "st1 { v8.b }[4], [x23]\n" - "st1 { v16.b }[4], [x22]\n" + "st1 { v23.b }[4], [x11]\n" + "st1 { v8.b }[4], [x24]\n" + "st1 { v16.b }[4], [x23]\n" "b 85f\n" "83:" // Height 3: Partial direct writeback: partial_2_0 "tbz x10, #1, 84f\n" - "str h23, [x9], #0x2\n" - "str h8, [x23], #0x2\n" - "str h16, [x22], #0x2\n" + "str h23, [x11], #0x2\n" + "str h8, [x24], #0x2\n" + "str h16, [x23], #0x2\n" "tbz x10, #0, 85f\n" - "st1 { v23.b }[2], [x9]\n" - "st1 { v8.b }[2], [x23]\n" - "st1 { v16.b }[2], [x22]\n" + "st1 { v23.b }[2], [x11]\n" + "st1 { v8.b }[2], [x24]\n" + "st1 { v16.b }[2], [x23]\n" "b 85f\n" "84:" // Height 3: Partial direct writeback: partial_1_0 - "str b23, [x9, #0x0]\n" - "str b8, [x23, #0x0]\n" - "str b16, [x22, #0x0]\n" + "str b23, [x11, #0x0]\n" + "str b8, [x24, #0x0]\n" + "str b16, [x23, #0x0]\n" "85:" // Height 3: Partial direct writeback: Done "b 87f\n" "86:" // Height 3: Full writeback - "str q23, [x9, #0x0]\n" - "add x9, x9, #0x10\n" - "str q8, [x23, #0x0]\n" - "str q16, [x22, #0x0]\n" + "str q23, [x11, #0x0]\n" + "add x11, x11, #0x10\n" + "str q8, [x24, #0x0]\n" + "str q16, [x23, #0x0]\n" "87:" // Height 3: Writeback done "subs x10, x10, #0x10\n" "bgt 60b\n" "b 176f\n" "88:" // Height 4 + "mov x14, %x[col_bias]\n" "ldr x13, [%x[args_ptr], %[offsetof_multiplier_ptr]]\n" - "mov x11, %x[col_bias]\n" "ldr x12, [%x[args_ptr], %[offsetof_shift_ptr]]\n" - "mov x9, %x[output_ptr]\n" + "mov x11, %x[output_ptr]\n" "ldr x10, [%x[args_ptr], %[offsetof_N]]\n" - "ldr x28, [%x[args_ptr], %[offsetof_B_ptr]]\n" + "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" "89:" // Height 4: Column loop "movi v8.4s, #0x0\n" "movi v9.4s, #0x0\n" @@ -1406,312 +1398,312 @@ void a64_hybrid_s8qs_mmla_6x16 ( "movi v22.4s, #0x0\n" "movi v23.4s, #0x0\n" "90:" // Height 4: setup done - "mov x27, #0x0\n" + "mov x28, #0x0\n" "91:" // Height 4: String loop "ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_offset]]\n" - "ldr w26, [x20, x27, LSL #0x2]\n" + "ldr w27, [x20, x28, LSL #0x2]\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 92f\n" - "ldr x20, [%x[input_ptr], x27, LSL #0x3]\n" - "add x20, x20, x19, LSL #3\n" - "ldr x25, [x20, #0x0]\n" - "ldr x24, [x20, #0x8]\n" - "ldr x23, [x20, #0x10]\n" - "ldr x22, [x20, #0x18]\n" - "cbnz x27, 93f\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_initial_col]]\n" - "add x25, x25, x19\n" - "add x24, x24, x19\n" - "add x23, x23, x19\n" - "add x22, x22, x19\n" + "ldr x21, [%x[input_ptr], x28, LSL #0x3]\n" + "add x21, x21, x20, LSL #3\n" + "ldr x26, [x21, #0x0]\n" + "ldr x25, [x21, #0x8]\n" + "ldr x24, [x21, #0x10]\n" + "ldr x23, [x21, #0x18]\n" + "cbnz x28, 93f\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n" + "add x26, x26, x20\n" + "add x25, x25, x20\n" + "add x24, x24, x20\n" + "add x23, x23, x20\n" "b 93f\n" "92:" // Height 4: setup direct input - "mov x25, %x[input_ptr]\n" - "add x24, x25, x19\n" - "add x23, x24, x19\n" - "add x22, x23, x19\n" + "mov x26, %x[input_ptr]\n" + "add x25, x26, x20\n" + "add x24, x25, x20\n" + "add x23, x24, x20\n" "93:" // Height 4: input setup done - "cmp x26, #0x10\n" + "cmp x27, #0x10\n" "blt 96f\n" - "ldr q1, [x25, #0x0]\n" - "ldr q2, [x24, #0x0]\n" - "cmp x26, #0x20\n" + "ldr q1, [x26, #0x0]\n" + "ldr q2, [x25, #0x0]\n" + "cmp x27, #0x20\n" + "ldr q3, [x24, #0x0]\n" + "ldr q4, [x23, #0x0]\n" + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "blt 95f\n" "94:" // Height 4: Multiply loop: Main loop head "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "add x25, x25, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q4, [x22, #0x0]\n" - "add x24, x24, #0x10\n" - "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x23, x23, #0x10\n" - "trn2 v3.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x22, x22, #0x10\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x25, #0x80]\n" - "sub x26, x26, #0x10\n" + "sub x27, x27, #0x10\n" + "trn1 v2.2d, v3.2d, v4.2d\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "cmp x26, #0x20\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" - "prfm pldl1keep, [x23, #0x80]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x22, #0x80]\n" + "trn2 v3.2d, v3.2d, v4.2d\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" + "add x26, x26, #0x10\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "add x25, x25, #0x10\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" + "add x24, x24, #0x10\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "add x23, x23, #0x10\n" + "ldr q4, [x23, #0x0]\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" - "ldr q2, [x24, #0x0]\n" + "ldr q6, [x9, #0x90]\n" + "ldr q2, [x25, #0x0]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" + "cmp x27, #0x20\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" + "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" + "ldr q7, [x9, #0x0]\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" - "ldr q1, [x25, #0x0]\n" + "ldr q1, [x26, #0x0]\n" ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" + "ldr q3, [x24, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "bge 94b\n" "95:" // Height 4: Multiply loop: Single iteration only "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "sub x26, x26, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q4, [x22, #0x0]\n" - "add x25, x25, #0x10\n" - "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x24, x24, #0x10\n" - "trn2 v3.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x23, x23, #0x10\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x25, #0x80]\n" - "add x22, x22, #0x10\n" + "add x26, x26, #0x10\n" + "trn1 v2.2d, v3.2d, v4.2d\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" - "prfm pldl1keep, [x23, #0x80]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x22, #0x80]\n" + "trn2 v3.2d, v3.2d, v4.2d\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" + "add x25, x25, #0x10\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "add x24, x24, #0x10\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" + "add x23, x23, #0x10\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "sub x27, x27, #0x10\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" + "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" + "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" + "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" "96:" // Height 4: Multiply loop: Main loop skip - "cbz x26, 103f\n" - "cmp x26, #0x8\n" + "cbz x27, 103f\n" + "cmp x27, #0x8\n" "blt 98f\n" "97:" // Height 4: Multiply loop: Odd block loop - "ldr d1, [x25], #0x8\n" - "sub x26, x26, #0x8\n" - "ldr d2, [x24], #0x8\n" + "ldr d1, [x26], #0x8\n" + "ldr d2, [x25], #0x8\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr d3, [x23], #0x8\n" - "cmp x26, #0x8\n" - "ldr d4, [x22], #0x8\n" + "sub x27, x27, #0x8\n" + "ldr d3, [x24], #0x8\n" + "ldr d4, [x23], #0x8\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x0]\n" - "ldr q7, [x28, #0x10]\n" + "cmp x27, #0x8\n" + "ldr q6, [x9, #0x0]\n" + "ldr q7, [x9, #0x10]\n" ".inst 0x4e86a408 // smmla v8.4s, v0.16b, v6.16b\n" ".inst 0x4e86a450 // smmla v16.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x20]\n" + "ldr q6, [x9, #0x20]\n" ".inst 0x4e87a40c // smmla v12.4s, v0.16b, v7.16b\n" ".inst 0x4e87a454 // smmla v20.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x30]\n" + "ldr q7, [x9, #0x30]\n" ".inst 0x4e86a409 // smmla v9.4s, v0.16b, v6.16b\n" ".inst 0x4e86a451 // smmla v17.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x40]\n" + "ldr q6, [x9, #0x40]\n" ".inst 0x4e87a40d // smmla v13.4s, v0.16b, v7.16b\n" ".inst 0x4e87a455 // smmla v21.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x50]\n" + "ldr q7, [x9, #0x50]\n" ".inst 0x4e86a40a // smmla v10.4s, v0.16b, v6.16b\n" ".inst 0x4e86a452 // smmla v18.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x60]\n" + "ldr q6, [x9, #0x60]\n" ".inst 0x4e87a40e // smmla v14.4s, v0.16b, v7.16b\n" ".inst 0x4e87a456 // smmla v22.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q7, [x9, #0x70]\n" + "add x9, x9, #0x80\n" ".inst 0x4e86a40b // smmla v11.4s, v0.16b, v6.16b\n" ".inst 0x4e86a453 // smmla v19.4s, v2.16b, v6.16b\n" ".inst 0x4e87a40f // smmla v15.4s, v0.16b, v7.16b\n" ".inst 0x4e87a457 // smmla v23.4s, v2.16b, v7.16b\n" "bge 97b\n" - "cbz x26, 103f\n" "98:" // Height 4: Multiply loop: Skip odd blocks - "tbz x26, #2, 100f\n" - "ldr s1, [x25], #0x4\n" - "ldr s2, [x24], #0x4\n" - "ldr s3, [x23], #0x4\n" - "ldr s4, [x22], #0x4\n" - "tbz x26, #1, 99f\n" - "ld1 { v1.h }[2], [x25], #0x2\n" - "ld1 { v2.h }[2], [x24], #0x2\n" - "ld1 { v3.h }[2], [x23], #0x2\n" - "ld1 { v4.h }[2], [x22], #0x2\n" - "tbz x26, #0, 102f\n" - "ld1 { v1.b }[6], [x25]\n" - "ld1 { v2.b }[6], [x24]\n" - "ld1 { v3.b }[6], [x23]\n" - "ld1 { v4.b }[6], [x22]\n" + "cbz x27, 103f\n" + "tbz x27, #2, 100f\n" + "ldr s1, [x26], #0x4\n" + "ldr s2, [x25], #0x4\n" + "ldr s3, [x24], #0x4\n" + "ldr s4, [x23], #0x4\n" + "tbz x27, #1, 99f\n" + "ld1 { v1.h }[2], [x26], #0x2\n" + "ld1 { v2.h }[2], [x25], #0x2\n" + "ld1 { v3.h }[2], [x24], #0x2\n" + "ld1 { v4.h }[2], [x23], #0x2\n" + "tbz x27, #0, 102f\n" + "ld1 { v1.b }[6], [x26]\n" + "ld1 { v2.b }[6], [x25]\n" + "ld1 { v3.b }[6], [x24]\n" + "ld1 { v4.b }[6], [x23]\n" "b 102f\n" "99:" // Height 4: Multiply loop: Ragged operand read: partial_1_4 - "tbz x26, #0, 102f\n" - "ld1 { v1.b }[4], [x25]\n" - "ld1 { v2.b }[4], [x24]\n" - "ld1 { v3.b }[4], [x23]\n" - "ld1 { v4.b }[4], [x22]\n" + "tbz x27, #0, 102f\n" + "ld1 { v1.b }[4], [x26]\n" + "ld1 { v2.b }[4], [x25]\n" + "ld1 { v3.b }[4], [x24]\n" + "ld1 { v4.b }[4], [x23]\n" "b 102f\n" "100:" // Height 4: Multiply loop: Ragged operand read: partial_2_0 - "tbz x26, #1, 101f\n" - "ldr h1, [x25], #0x2\n" - "ldr h2, [x24], #0x2\n" - "ldr h3, [x23], #0x2\n" - "ldr h4, [x22], #0x2\n" - "tbz x26, #0, 102f\n" - "ld1 { v1.b }[2], [x25]\n" - "ld1 { v2.b }[2], [x24]\n" - "ld1 { v3.b }[2], [x23]\n" - "ld1 { v4.b }[2], [x22]\n" + "tbz x27, #1, 101f\n" + "ldr h1, [x26], #0x2\n" + "ldr h2, [x25], #0x2\n" + "ldr h3, [x24], #0x2\n" + "ldr h4, [x23], #0x2\n" + "tbz x27, #0, 102f\n" + "ld1 { v1.b }[2], [x26]\n" + "ld1 { v2.b }[2], [x25]\n" + "ld1 { v3.b }[2], [x24]\n" + "ld1 { v4.b }[2], [x23]\n" "b 102f\n" "101:" // Height 4: Multiply loop: Ragged operand read: partial_1_0 - "ldr b1, [x25, #0x0]\n" - "ldr b2, [x24, #0x0]\n" - "ldr b3, [x23, #0x0]\n" - "ldr b4, [x22, #0x0]\n" + "ldr b1, [x26, #0x0]\n" + "ldr b2, [x25, #0x0]\n" + "ldr b3, [x24, #0x0]\n" + "ldr b4, [x23, #0x0]\n" "102:" // Height 4: Multiply loop: Ragged operand read: Done + "ldr q7, [x9, #0x0]\n" + "ldr q6, [x9, #0x10]\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q6, [x28, #0x10]\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x70]\n" + "add x9, x9, #0x80\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" "103:" // Height 4: Multiply loop: No odd multiplies - "ldr w19, [%x[args_ptr], %[offsetof_num_strings]]\n" - "add x27, x27, #0x1\n" - "cmp x27, x19\n" + "ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n" + "add x28, x28, #0x1\n" + "cmp x28, x20\n" "bne 91b\n" + "ldr q0, [x14, #0x0]\n" + "ldr q1, [x14, #0x10]\n" "uzp1 v7.2d, v8.2d, v12.2d\n" - "ldr x19, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp2 v8.2d, v8.2d, v12.2d\n" - "prfm pstl1keep, [x9, #0x0]\n" - "add x23, x9, x19\n" + "ldr q2, [x14, #0x20]\n" + "ldr q3, [x14, #0x30]\n" "uzp1 v12.2d, v9.2d, v13.2d\n" - "ldr q0, [x11, #0x0]\n" "uzp2 v9.2d, v9.2d, v13.2d\n" - "prfm pstl1keep, [x23, #0x0]\n" - "add x22, x23, x19\n" + "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp1 v13.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x22, #0x0]\n" - "add x21, x22, x19\n" "uzp2 v10.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x21, #0x0]\n" + "add x24, x11, x20\n" "uzp1 v14.2d, v11.2d, v15.2d\n" - "ldr q1, [x11, #0x10]\n" "uzp2 v11.2d, v11.2d, v15.2d\n" - "ldr q2, [x11, #0x20]\n" + "add x23, x24, x20\n" + "add x22, x23, x20\n" "uzp1 v15.2d, v16.2d, v20.2d\n" - "ldr q3, [x11, #0x30]\n" - "add x11, x11, #0x40\n" "uzp2 v16.2d, v16.2d, v20.2d\n" + "prfm pstl1keep, [x11, #0x0]\n" + "prfm pstl1keep, [x24, #0x0]\n" "uzp1 v20.2d, v17.2d, v21.2d\n" "uzp2 v17.2d, v17.2d, v21.2d\n" + "prfm pstl1keep, [x23, #0x0]\n" + "prfm pstl1keep, [x22, #0x0]\n" "uzp1 v21.2d, v18.2d, v22.2d\n" "uzp2 v18.2d, v18.2d, v22.2d\n" + "add x14, x14, #0x40\n" "uzp1 v22.2d, v19.2d, v23.2d\n" "uzp2 v19.2d, v19.2d, v23.2d\n" "mov v23.16b, v7.16b\n" @@ -1739,20 +1731,20 @@ void a64_hybrid_s8qs_mmla_6x16 ( "ldr q2, [x12, #0x20]\n" "ldr q6, [x13, #0x20]\n" "ldr q3, [x12, #0x30]\n" - "add x12, x12, #0x40\n" "ldr q7, [x13, #0x30]\n" + "add x12, x12, #0x40\n" "add x13, x13, #0x40\n" "b 105f\n" "104:" // Height 4: per layer parameters - "add x24, %x[qp], %[per_layer_right_shift]\n" - "ld1r { v0.4s }, [x24]\n" + "add x25, %x[qp], %[per_layer_right_shift]\n" + "ld1r { v0.4s }, [x25]\n" + "add x25, %x[qp], %[per_layer_mul]\n" + "ld1r { v4.4s }, [x25]\n" "mov v1.16b, v0.16b\n" - "add x24, %x[qp], %[per_layer_mul]\n" - "ld1r { v4.4s }, [x24]\n" - "mov v2.16b, v0.16b\n" - "mov v3.16b, v0.16b\n" "mov v5.16b, v4.16b\n" + "mov v2.16b, v0.16b\n" "mov v6.16b, v4.16b\n" + "mov v3.16b, v0.16b\n" "mov v7.16b, v4.16b\n" "105:" // Height 4: parameters loaded "sqrdmulh v23.4s, v23.4s, v4.4s\n" @@ -1775,125 +1767,125 @@ void a64_hybrid_s8qs_mmla_6x16 ( "and v4.16b, v23.16b, v0.16b\n" "and v5.16b, v12.16b, v1.16b\n" "and v6.16b, v13.16b, v2.16b\n" + "and v7.16b, v14.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v23.4s, v23.4s, v4.4s\n" "sqadd v12.4s, v12.4s, v5.4s\n" "sqadd v13.4s, v13.4s, v6.4s\n" - "and v7.16b, v14.16b, v3.16b\n" + "sqadd v14.4s, v14.4s, v7.4s\n" "and v4.16b, v8.16b, v0.16b\n" "and v5.16b, v9.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v14.4s, v14.4s, v7.4s\n" - "sqadd v8.4s, v8.4s, v4.4s\n" - "sqadd v9.4s, v9.4s, v5.4s\n" "and v6.16b, v10.16b, v2.16b\n" "and v7.16b, v11.16b, v3.16b\n" - "and v4.16b, v15.16b, v0.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" + "sqadd v8.4s, v8.4s, v4.4s\n" + "sqadd v9.4s, v9.4s, v5.4s\n" "sqadd v10.4s, v10.4s, v6.4s\n" "sqadd v11.4s, v11.4s, v7.4s\n" - "sqadd v15.4s, v15.4s, v4.4s\n" + "and v4.16b, v15.16b, v0.16b\n" "and v5.16b, v20.16b, v1.16b\n" "and v6.16b, v21.16b, v2.16b\n" "and v7.16b, v22.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v15.4s, v15.4s, v4.4s\n" "sqadd v20.4s, v20.4s, v5.4s\n" "sqadd v21.4s, v21.4s, v6.4s\n" "sqadd v22.4s, v22.4s, v7.4s\n" "and v4.16b, v16.16b, v0.16b\n" "and v5.16b, v17.16b, v1.16b\n" "and v6.16b, v18.16b, v2.16b\n" + "and v7.16b, v19.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v16.4s, v16.4s, v4.4s\n" "sqadd v17.4s, v17.4s, v5.4s\n" "sqadd v18.4s, v18.4s, v6.4s\n" - "and v7.16b, v19.16b, v3.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v19.4s, v19.4s, v7.4s\n" "106:" // Height 4: no shift correction + "add x25, %x[qp], %[c_offset]\n" + "ld1r { v4.4s }, [x25]\n" "srshl v23.4s, v23.4s, v0.4s\n" - "add x24, %x[qp], %[c_offset]\n" - "ld1r { v4.4s }, [x24]\n" "srshl v12.4s, v12.4s, v1.4s\n" - "add x24, %x[qp], %[minval]\n" "srshl v13.4s, v13.4s, v2.4s\n" - "ld1r { v5.4s }, [x24]\n" - "add x24, %x[qp], %[maxval]\n" "srshl v14.4s, v14.4s, v3.4s\n" - "ld1r { v6.4s }, [x24]\n" - "cmp x10, #0x10\n" + "add x25, %x[qp], %[maxval]\n" + "ld1r { v6.4s }, [x25]\n" "srshl v8.4s, v8.4s, v0.4s\n" "srshl v9.4s, v9.4s, v1.4s\n" + "add x25, %x[qp], %[minval]\n" + "ld1r { v5.4s }, [x25]\n" + "srshl v10.4s, v10.4s, v2.4s\n" + "srshl v11.4s, v11.4s, v3.4s\n" + "cmp x10, #0x10\n" + "srshl v15.4s, v15.4s, v0.4s\n" + "srshl v20.4s, v20.4s, v1.4s\n" + "srshl v21.4s, v21.4s, v2.4s\n" + "srshl v22.4s, v22.4s, v3.4s\n" + "srshl v16.4s, v16.4s, v0.4s\n" + "srshl v17.4s, v17.4s, v1.4s\n" + "srshl v18.4s, v18.4s, v2.4s\n" + "srshl v19.4s, v19.4s, v3.4s\n" "add v23.4s, v23.4s, v4.4s\n" "add v12.4s, v12.4s, v4.4s\n" "add v13.4s, v13.4s, v4.4s\n" - "smin v23.4s, v23.4s, v6.4s\n" - "smin v12.4s, v12.4s, v6.4s\n" - "smin v13.4s, v13.4s, v6.4s\n" - "smax v23.4s, v23.4s, v5.4s\n" - "smax v12.4s, v12.4s, v5.4s\n" - "smax v13.4s, v13.4s, v5.4s\n" "add v14.4s, v14.4s, v4.4s\n" "add v8.4s, v8.4s, v4.4s\n" "add v9.4s, v9.4s, v4.4s\n" - "smin v14.4s, v14.4s, v6.4s\n" - "smin v8.4s, v8.4s, v6.4s\n" - "smin v9.4s, v9.4s, v6.4s\n" - "smax v14.4s, v14.4s, v5.4s\n" - "smax v8.4s, v8.4s, v5.4s\n" - "smax v9.4s, v9.4s, v5.4s\n" - "srshl v10.4s, v10.4s, v2.4s\n" - "srshl v11.4s, v11.4s, v3.4s\n" - "srshl v15.4s, v15.4s, v0.4s\n" - "srshl v20.4s, v20.4s, v1.4s\n" "add v10.4s, v10.4s, v4.4s\n" "add v11.4s, v11.4s, v4.4s\n" "add v15.4s, v15.4s, v4.4s\n" + "add v20.4s, v20.4s, v4.4s\n" + "add v21.4s, v21.4s, v4.4s\n" + "add v22.4s, v22.4s, v4.4s\n" + "add v16.4s, v16.4s, v4.4s\n" + "add v17.4s, v17.4s, v4.4s\n" + "add v18.4s, v18.4s, v4.4s\n" + "add v19.4s, v19.4s, v4.4s\n" + "smin v23.4s, v23.4s, v6.4s\n" + "smin v12.4s, v12.4s, v6.4s\n" + "smin v13.4s, v13.4s, v6.4s\n" + "smin v14.4s, v14.4s, v6.4s\n" + "smin v8.4s, v8.4s, v6.4s\n" + "smin v9.4s, v9.4s, v6.4s\n" "smin v10.4s, v10.4s, v6.4s\n" "smin v11.4s, v11.4s, v6.4s\n" "smin v15.4s, v15.4s, v6.4s\n" + "smin v20.4s, v20.4s, v6.4s\n" + "smin v21.4s, v21.4s, v6.4s\n" + "smin v22.4s, v22.4s, v6.4s\n" + "smin v16.4s, v16.4s, v6.4s\n" + "smin v17.4s, v17.4s, v6.4s\n" + "smin v18.4s, v18.4s, v6.4s\n" + "smin v19.4s, v19.4s, v6.4s\n" + "smax v23.4s, v23.4s, v5.4s\n" + "smax v12.4s, v12.4s, v5.4s\n" + "smax v13.4s, v13.4s, v5.4s\n" + "smax v14.4s, v14.4s, v5.4s\n" + "smax v8.4s, v8.4s, v5.4s\n" + "smax v9.4s, v9.4s, v5.4s\n" "smax v10.4s, v10.4s, v5.4s\n" "smax v11.4s, v11.4s, v5.4s\n" "smax v15.4s, v15.4s, v5.4s\n" - "add v20.4s, v20.4s, v4.4s\n" - "srshl v21.4s, v21.4s, v2.4s\n" - "srshl v22.4s, v22.4s, v3.4s\n" - "smin v20.4s, v20.4s, v6.4s\n" - "srshl v16.4s, v16.4s, v0.4s\n" - "add v21.4s, v21.4s, v4.4s\n" "smax v20.4s, v20.4s, v5.4s\n" - "add v22.4s, v22.4s, v4.4s\n" - "smin v21.4s, v21.4s, v6.4s\n" - "add v16.4s, v16.4s, v4.4s\n" - "smin v22.4s, v22.4s, v6.4s\n" "smax v21.4s, v21.4s, v5.4s\n" - "smin v16.4s, v16.4s, v6.4s\n" "smax v22.4s, v22.4s, v5.4s\n" - "srshl v17.4s, v17.4s, v1.4s\n" "smax v16.4s, v16.4s, v5.4s\n" - "srshl v18.4s, v18.4s, v2.4s\n" - "srshl v19.4s, v19.4s, v3.4s\n" - "add v17.4s, v17.4s, v4.4s\n" - "uzp1 v23.8h, v23.8h, v12.8h\n" - "add v18.4s, v18.4s, v4.4s\n" - "smin v17.4s, v17.4s, v6.4s\n" - "add v19.4s, v19.4s, v4.4s\n" - "smin v18.4s, v18.4s, v6.4s\n" "smax v17.4s, v17.4s, v5.4s\n" - "smin v19.4s, v19.4s, v6.4s\n" "smax v18.4s, v18.4s, v5.4s\n" - "uzp1 v12.8h, v13.8h, v14.8h\n" "smax v19.4s, v19.4s, v5.4s\n" + "uzp1 v23.8h, v23.8h, v12.8h\n" + "uzp1 v12.8h, v13.8h, v14.8h\n" "uzp1 v8.8h, v8.8h, v9.8h\n" "uzp1 v9.8h, v10.8h, v11.8h\n" "uzp1 v15.8h, v15.8h, v20.8h\n" @@ -1906,112 +1898,112 @@ void a64_hybrid_s8qs_mmla_6x16 ( "uzp1 v16.16b, v16.16b, v17.16b\n" "bge 115f\n" "tbz x10, #3, 110f\n" - "str d23, [x9], #0x8\n" - "str d8, [x23], #0x8\n" - "str d15, [x22], #0x8\n" - "str d16, [x21], #0x8\n" + "str d23, [x11], #0x8\n" + "str d8, [x24], #0x8\n" + "str d15, [x23], #0x8\n" + "str d16, [x22], #0x8\n" "tbz x10, #2, 108f\n" - "st1 { v23.s }[2], [x9], #0x4\n" - "st1 { v8.s }[2], [x23], #0x4\n" - "st1 { v15.s }[2], [x22], #0x4\n" - "st1 { v16.s }[2], [x21], #0x4\n" + "st1 { v23.s }[2], [x11], #0x4\n" + "st1 { v8.s }[2], [x24], #0x4\n" + "st1 { v15.s }[2], [x23], #0x4\n" + "st1 { v16.s }[2], [x22], #0x4\n" "tbz x10, #1, 107f\n" - "st1 { v23.h }[6], [x9], #0x2\n" - "st1 { v8.h }[6], [x23], #0x2\n" - "st1 { v15.h }[6], [x22], #0x2\n" - "st1 { v16.h }[6], [x21], #0x2\n" + "st1 { v23.h }[6], [x11], #0x2\n" + "st1 { v8.h }[6], [x24], #0x2\n" + "st1 { v15.h }[6], [x23], #0x2\n" + "st1 { v16.h }[6], [x22], #0x2\n" "tbz x10, #0, 114f\n" - "st1 { v23.b }[14], [x9]\n" - "st1 { v8.b }[14], [x23]\n" - "st1 { v15.b }[14], [x22]\n" - "st1 { v16.b }[14], [x21]\n" + "st1 { v23.b }[14], [x11]\n" + "st1 { v8.b }[14], [x24]\n" + "st1 { v15.b }[14], [x23]\n" + "st1 { v16.b }[14], [x22]\n" "b 114f\n" "107:" // Height 4: Partial direct writeback: partial_1_12 "tbz x10, #0, 114f\n" - "st1 { v23.b }[12], [x9]\n" - "st1 { v8.b }[12], [x23]\n" - "st1 { v15.b }[12], [x22]\n" - "st1 { v16.b }[12], [x21]\n" + "st1 { v23.b }[12], [x11]\n" + "st1 { v8.b }[12], [x24]\n" + "st1 { v15.b }[12], [x23]\n" + "st1 { v16.b }[12], [x22]\n" "b 114f\n" "108:" // Height 4: Partial direct writeback: partial_2_8 "tbz x10, #1, 109f\n" - "st1 { v23.h }[4], [x9], #0x2\n" - "st1 { v8.h }[4], [x23], #0x2\n" - "st1 { v15.h }[4], [x22], #0x2\n" - "st1 { v16.h }[4], [x21], #0x2\n" + "st1 { v23.h }[4], [x11], #0x2\n" + "st1 { v8.h }[4], [x24], #0x2\n" + "st1 { v15.h }[4], [x23], #0x2\n" + "st1 { v16.h }[4], [x22], #0x2\n" "tbz x10, #0, 114f\n" - "st1 { v23.b }[10], [x9]\n" - "st1 { v8.b }[10], [x23]\n" - "st1 { v15.b }[10], [x22]\n" - "st1 { v16.b }[10], [x21]\n" + "st1 { v23.b }[10], [x11]\n" + "st1 { v8.b }[10], [x24]\n" + "st1 { v15.b }[10], [x23]\n" + "st1 { v16.b }[10], [x22]\n" "b 114f\n" "109:" // Height 4: Partial direct writeback: partial_1_8 "tbz x10, #0, 114f\n" - "st1 { v23.b }[8], [x9]\n" - "st1 { v8.b }[8], [x23]\n" - "st1 { v15.b }[8], [x22]\n" - "st1 { v16.b }[8], [x21]\n" + "st1 { v23.b }[8], [x11]\n" + "st1 { v8.b }[8], [x24]\n" + "st1 { v15.b }[8], [x23]\n" + "st1 { v16.b }[8], [x22]\n" "b 114f\n" "110:" // Height 4: Partial direct writeback: partial_4_0 "tbz x10, #2, 112f\n" - "str s23, [x9], #0x4\n" - "str s8, [x23], #0x4\n" - "str s15, [x22], #0x4\n" - "str s16, [x21], #0x4\n" + "str s23, [x11], #0x4\n" + "str s8, [x24], #0x4\n" + "str s15, [x23], #0x4\n" + "str s16, [x22], #0x4\n" "tbz x10, #1, 111f\n" - "st1 { v23.h }[2], [x9], #0x2\n" - "st1 { v8.h }[2], [x23], #0x2\n" - "st1 { v15.h }[2], [x22], #0x2\n" - "st1 { v16.h }[2], [x21], #0x2\n" + "st1 { v23.h }[2], [x11], #0x2\n" + "st1 { v8.h }[2], [x24], #0x2\n" + "st1 { v15.h }[2], [x23], #0x2\n" + "st1 { v16.h }[2], [x22], #0x2\n" "tbz x10, #0, 114f\n" - "st1 { v23.b }[6], [x9]\n" - "st1 { v8.b }[6], [x23]\n" - "st1 { v15.b }[6], [x22]\n" - "st1 { v16.b }[6], [x21]\n" + "st1 { v23.b }[6], [x11]\n" + "st1 { v8.b }[6], [x24]\n" + "st1 { v15.b }[6], [x23]\n" + "st1 { v16.b }[6], [x22]\n" "b 114f\n" "111:" // Height 4: Partial direct writeback: partial_1_4 "tbz x10, #0, 114f\n" - "st1 { v23.b }[4], [x9]\n" - "st1 { v8.b }[4], [x23]\n" - "st1 { v15.b }[4], [x22]\n" - "st1 { v16.b }[4], [x21]\n" + "st1 { v23.b }[4], [x11]\n" + "st1 { v8.b }[4], [x24]\n" + "st1 { v15.b }[4], [x23]\n" + "st1 { v16.b }[4], [x22]\n" "b 114f\n" "112:" // Height 4: Partial direct writeback: partial_2_0 "tbz x10, #1, 113f\n" - "str h23, [x9], #0x2\n" - "str h8, [x23], #0x2\n" - "str h15, [x22], #0x2\n" - "str h16, [x21], #0x2\n" + "str h23, [x11], #0x2\n" + "str h8, [x24], #0x2\n" + "str h15, [x23], #0x2\n" + "str h16, [x22], #0x2\n" "tbz x10, #0, 114f\n" - "st1 { v23.b }[2], [x9]\n" - "st1 { v8.b }[2], [x23]\n" - "st1 { v15.b }[2], [x22]\n" - "st1 { v16.b }[2], [x21]\n" + "st1 { v23.b }[2], [x11]\n" + "st1 { v8.b }[2], [x24]\n" + "st1 { v15.b }[2], [x23]\n" + "st1 { v16.b }[2], [x22]\n" "b 114f\n" "113:" // Height 4: Partial direct writeback: partial_1_0 - "str b23, [x9, #0x0]\n" - "str b8, [x23, #0x0]\n" - "str b15, [x22, #0x0]\n" - "str b16, [x21, #0x0]\n" + "str b23, [x11, #0x0]\n" + "str b8, [x24, #0x0]\n" + "str b15, [x23, #0x0]\n" + "str b16, [x22, #0x0]\n" "114:" // Height 4: Partial direct writeback: Done "b 116f\n" "115:" // Height 4: Full writeback - "str q23, [x9, #0x0]\n" - "add x9, x9, #0x10\n" - "str q8, [x23, #0x0]\n" - "str q15, [x22, #0x0]\n" - "str q16, [x21, #0x0]\n" + "str q23, [x11, #0x0]\n" + "add x11, x11, #0x10\n" + "str q8, [x24, #0x0]\n" + "str q15, [x23, #0x0]\n" + "str q16, [x22, #0x0]\n" "116:" // Height 4: Writeback done "subs x10, x10, #0x10\n" "bgt 89b\n" "b 176f\n" "117:" // Height 5 + "mov x14, %x[col_bias]\n" "ldr x13, [%x[args_ptr], %[offsetof_multiplier_ptr]]\n" - "mov x11, %x[col_bias]\n" "ldr x12, [%x[args_ptr], %[offsetof_shift_ptr]]\n" - "mov x9, %x[output_ptr]\n" + "mov x11, %x[output_ptr]\n" "ldr x10, [%x[args_ptr], %[offsetof_N]]\n" - "ldr x28, [%x[args_ptr], %[offsetof_B_ptr]]\n" + "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" "118:" // Height 5: Column loop "movi v8.4s, #0x0\n" "movi v9.4s, #0x0\n" @@ -2038,212 +2030,210 @@ void a64_hybrid_s8qs_mmla_6x16 ( "movi v30.4s, #0x0\n" "movi v31.4s, #0x0\n" "119:" // Height 5: setup done - "mov x27, #0x0\n" + "mov x28, #0x0\n" "120:" // Height 5: String loop "ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_offset]]\n" - "ldr w26, [x20, x27, LSL #0x2]\n" + "ldr w27, [x20, x28, LSL #0x2]\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 121f\n" - "ldr x20, [%x[input_ptr], x27, LSL #0x3]\n" - "add x20, x20, x19, LSL #3\n" - "ldr x25, [x20, #0x0]\n" - "ldr x24, [x20, #0x8]\n" - "ldr x23, [x20, #0x10]\n" - "ldr x22, [x20, #0x18]\n" - "ldr x21, [x20, #0x20]\n" - "cbnz x27, 122f\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_initial_col]]\n" - "add x25, x25, x19\n" - "add x24, x24, x19\n" - "add x23, x23, x19\n" - "add x22, x22, x19\n" - "add x21, x21, x19\n" + "ldr x21, [%x[input_ptr], x28, LSL #0x3]\n" + "add x21, x21, x20, LSL #3\n" + "ldr x26, [x21, #0x0]\n" + "ldr x25, [x21, #0x8]\n" + "ldr x24, [x21, #0x10]\n" + "ldr x23, [x21, #0x18]\n" + "ldr x22, [x21, #0x20]\n" + "cbnz x28, 122f\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n" + "add x26, x26, x20\n" + "add x25, x25, x20\n" + "add x24, x24, x20\n" + "add x23, x23, x20\n" + "add x22, x22, x20\n" "b 122f\n" "121:" // Height 5: setup direct input - "mov x25, %x[input_ptr]\n" - "add x24, x25, x19\n" - "add x23, x24, x19\n" - "add x22, x23, x19\n" - "add x21, x22, x19\n" + "mov x26, %x[input_ptr]\n" + "add x25, x26, x20\n" + "add x24, x25, x20\n" + "add x23, x24, x20\n" + "add x22, x23, x20\n" "122:" // Height 5: input setup done - "cmp x26, #0x10\n" + "cmp x27, #0x10\n" "blt 125f\n" - "ldr q1, [x25, #0x0]\n" - "cmp x26, #0x20\n" + "ldr q1, [x26, #0x0]\n" + "ldr q2, [x25, #0x0]\n" + "cmp x27, #0x20\n" + "ldr q3, [x24, #0x0]\n" + "ldr q4, [x23, #0x0]\n" + "ldr q5, [x22, #0x0]\n" + "ldr q7, [x9, #0x0]\n" "blt 124f\n" "123:" // Height 5: Multiply loop: Main loop head - "movi v6.16b, #0x0\n" - "ldr q2, [x24, #0x0]\n" - "add x25, x25, #0x10\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "add x24, x24, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q4, [x22, #0x0]\n" - "add x23, x23, #0x10\n" + ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q5, [x21, #0x0]\n" - "add x22, x22, #0x10\n" "trn2 v3.2d, v3.2d, v4.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x21, x21, #0x10\n" + ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" + "sub x27, x27, #0x10\n" "trn1 v4.2d, v5.2d, v6.2d\n" - "prfm pldl1keep, [x25, #0x80]\n" - "sub x26, x26, #0x10\n" "trn2 v5.2d, v5.2d, v6.2d\n" - "ldr q6, [x28, #0x10]\n" - "cmp x26, #0x20\n" - ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" - ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "prfm pldl1keep, [x23, #0x80]\n" + "ldr q6, [x9, #0x10]\n" ".inst 0x4e87a498 // smmla v24.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "prfm pldl1keep, [x22, #0x80]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "prfm pldl1keep, [x21, #0x80]\n" + "add x26, x26, #0x10\n" ".inst 0x4e86a49c // smmla v28.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" + "add x25, x25, #0x10\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" ".inst 0x4e87a499 // smmla v25.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" + "add x24, x24, #0x10\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" + "add x23, x23, #0x10\n" + "add x22, x22, #0x10\n" ".inst 0x4e86a49d // smmla v29.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "cmp x27, #0x20\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49a // smmla v26.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" + "prfm pldl1keep, [x25, #0x80]\n" + "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a49e // smmla v30.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49b // smmla v27.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" + "prfm pldl1keep, [x22, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" + "ldr q2, [x25, #0x0]\n" ".inst 0x4e86a49f // smmla v31.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" + "ldr q4, [x23, #0x0]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b8 // smmla v24.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bc // smmla v28.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b9 // smmla v25.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bd // smmla v29.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4ba // smmla v26.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4be // smmla v30.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4bb // smmla v27.4s, v5.16b, v7.16b\n" + "ldr q7, [x9, #0x0]\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" - "ldr q1, [x25, #0x0]\n" + "ldr q1, [x26, #0x0]\n" ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" + "ldr q3, [x24, #0x0]\n" ".inst 0x4e86a4bf // smmla v31.4s, v5.16b, v6.16b\n" + "ldr q5, [x22, #0x0]\n" "bge 123b\n" "124:" // Height 5: Multiply loop: Single iteration only - "movi v6.16b, #0x0\n" - "ldr q2, [x24, #0x0]\n" - "sub x26, x26, #0x10\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "add x25, x25, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q4, [x22, #0x0]\n" - "add x24, x24, #0x10\n" + ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q5, [x21, #0x0]\n" - "add x23, x23, #0x10\n" "trn2 v3.2d, v3.2d, v4.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x22, x22, #0x10\n" + ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" + "add x26, x26, #0x10\n" "trn1 v4.2d, v5.2d, v6.2d\n" - "prfm pldl1keep, [x25, #0x80]\n" - "add x21, x21, #0x10\n" "trn2 v5.2d, v5.2d, v6.2d\n" - "ldr q6, [x28, #0x10]\n" - ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" - ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "prfm pldl1keep, [x23, #0x80]\n" + "ldr q6, [x9, #0x10]\n" ".inst 0x4e87a498 // smmla v24.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" - "prfm pldl1keep, [x22, #0x80]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "prfm pldl1keep, [x21, #0x80]\n" + "add x25, x25, #0x10\n" ".inst 0x4e86a49c // smmla v28.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" + "add x24, x24, #0x10\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" ".inst 0x4e87a499 // smmla v25.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" + "add x23, x23, #0x10\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" + "add x22, x22, #0x10\n" + "sub x27, x27, #0x10\n" ".inst 0x4e86a49d // smmla v29.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49a // smmla v26.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" + "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" + "prfm pldl1keep, [x24, #0x80]\n" + "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e86a49e // smmla v30.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "prfm pldl1keep, [x22, #0x80]\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49b // smmla v27.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49f // smmla v31.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b8 // smmla v24.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bc // smmla v28.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b9 // smmla v25.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bd // smmla v29.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4ba // smmla v26.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4be // smmla v30.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4bb // smmla v27.4s, v5.16b, v7.16b\n" @@ -2251,136 +2241,134 @@ void a64_hybrid_s8qs_mmla_6x16 ( ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bf // smmla v31.4s, v5.16b, v6.16b\n" "125:" // Height 5: Multiply loop: Main loop skip - "cbz x26, 132f\n" - "cmp x26, #0x8\n" + "cbz x27, 132f\n" + "cmp x27, #0x8\n" "blt 127f\n" "126:" // Height 5: Multiply loop: Odd block loop - "movi v7.4s, #0x0\n" - "ldr d1, [x25], #0x8\n" - "sub x26, x26, #0x8\n" - "ldr d2, [x24], #0x8\n" + "ldr d1, [x26], #0x8\n" + "ldr d2, [x25], #0x8\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr d3, [x23], #0x8\n" - "cmp x26, #0x8\n" - "ldr d4, [x22], #0x8\n" + "ldr d3, [x24], #0x8\n" + "ldr d4, [x23], #0x8\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr d5, [x21], #0x8\n" - "ldr q6, [x28, #0x0]\n" + "sub x27, x27, #0x8\n" + "ldr d5, [x22], #0x8\n" + "ldr q6, [x9, #0x0]\n" "trn1 v4.2d, v5.2d, v7.2d\n" - "ldr q7, [x28, #0x10]\n" ".inst 0x4e86a408 // smmla v8.4s, v0.16b, v6.16b\n" + "ldr q7, [x9, #0x10]\n" ".inst 0x4e86a450 // smmla v16.4s, v2.16b, v6.16b\n" ".inst 0x4e86a498 // smmla v24.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x20]\n" + "ldr q6, [x9, #0x20]\n" ".inst 0x4e87a40c // smmla v12.4s, v0.16b, v7.16b\n" ".inst 0x4e87a454 // smmla v20.4s, v2.16b, v7.16b\n" + "cmp x27, #0x8\n" ".inst 0x4e87a49c // smmla v28.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x30]\n" + "ldr q7, [x9, #0x30]\n" ".inst 0x4e86a409 // smmla v9.4s, v0.16b, v6.16b\n" ".inst 0x4e86a451 // smmla v17.4s, v2.16b, v6.16b\n" ".inst 0x4e86a499 // smmla v25.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x40]\n" + "ldr q6, [x9, #0x40]\n" ".inst 0x4e87a40d // smmla v13.4s, v0.16b, v7.16b\n" ".inst 0x4e87a455 // smmla v21.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49d // smmla v29.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x50]\n" + "ldr q7, [x9, #0x50]\n" ".inst 0x4e86a40a // smmla v10.4s, v0.16b, v6.16b\n" ".inst 0x4e86a452 // smmla v18.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49a // smmla v26.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x60]\n" + "ldr q6, [x9, #0x60]\n" ".inst 0x4e87a40e // smmla v14.4s, v0.16b, v7.16b\n" ".inst 0x4e87a456 // smmla v22.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49e // smmla v30.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q7, [x9, #0x70]\n" ".inst 0x4e86a40b // smmla v11.4s, v0.16b, v6.16b\n" + "add x9, x9, #0x80\n" ".inst 0x4e86a453 // smmla v19.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49b // smmla v27.4s, v4.16b, v6.16b\n" ".inst 0x4e87a40f // smmla v15.4s, v0.16b, v7.16b\n" ".inst 0x4e87a457 // smmla v23.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49f // smmla v31.4s, v4.16b, v7.16b\n" "bge 126b\n" - "cbz x26, 132f\n" "127:" // Height 5: Multiply loop: Skip odd blocks - "tbz x26, #2, 129f\n" - "ldr s1, [x25], #0x4\n" - "ldr s2, [x24], #0x4\n" - "ldr s3, [x23], #0x4\n" - "ldr s4, [x22], #0x4\n" - "ldr s5, [x21], #0x4\n" - "tbz x26, #1, 128f\n" - "ld1 { v1.h }[2], [x25], #0x2\n" - "ld1 { v2.h }[2], [x24], #0x2\n" - "ld1 { v3.h }[2], [x23], #0x2\n" - "ld1 { v4.h }[2], [x22], #0x2\n" - "ld1 { v5.h }[2], [x21], #0x2\n" - "tbz x26, #0, 131f\n" - "ld1 { v1.b }[6], [x25]\n" - "ld1 { v2.b }[6], [x24]\n" - "ld1 { v3.b }[6], [x23]\n" - "ld1 { v4.b }[6], [x22]\n" - "ld1 { v5.b }[6], [x21]\n" + "cbz x27, 132f\n" + "tbz x27, #2, 129f\n" + "ldr s1, [x26], #0x4\n" + "ldr s2, [x25], #0x4\n" + "ldr s3, [x24], #0x4\n" + "ldr s4, [x23], #0x4\n" + "ldr s5, [x22], #0x4\n" + "tbz x27, #1, 128f\n" + "ld1 { v1.h }[2], [x26], #0x2\n" + "ld1 { v2.h }[2], [x25], #0x2\n" + "ld1 { v3.h }[2], [x24], #0x2\n" + "ld1 { v4.h }[2], [x23], #0x2\n" + "ld1 { v5.h }[2], [x22], #0x2\n" + "tbz x27, #0, 131f\n" + "ld1 { v1.b }[6], [x26]\n" + "ld1 { v2.b }[6], [x25]\n" + "ld1 { v3.b }[6], [x24]\n" + "ld1 { v4.b }[6], [x23]\n" + "ld1 { v5.b }[6], [x22]\n" "b 131f\n" "128:" // Height 5: Multiply loop: Ragged operand read: partial_1_4 - "tbz x26, #0, 131f\n" - "ld1 { v1.b }[4], [x25]\n" - "ld1 { v2.b }[4], [x24]\n" - "ld1 { v3.b }[4], [x23]\n" - "ld1 { v4.b }[4], [x22]\n" - "ld1 { v5.b }[4], [x21]\n" + "tbz x27, #0, 131f\n" + "ld1 { v1.b }[4], [x26]\n" + "ld1 { v2.b }[4], [x25]\n" + "ld1 { v3.b }[4], [x24]\n" + "ld1 { v4.b }[4], [x23]\n" + "ld1 { v5.b }[4], [x22]\n" "b 131f\n" "129:" // Height 5: Multiply loop: Ragged operand read: partial_2_0 - "tbz x26, #1, 130f\n" - "ldr h1, [x25], #0x2\n" - "ldr h2, [x24], #0x2\n" - "ldr h3, [x23], #0x2\n" - "ldr h4, [x22], #0x2\n" - "ldr h5, [x21], #0x2\n" - "tbz x26, #0, 131f\n" - "ld1 { v1.b }[2], [x25]\n" - "ld1 { v2.b }[2], [x24]\n" - "ld1 { v3.b }[2], [x23]\n" - "ld1 { v4.b }[2], [x22]\n" - "ld1 { v5.b }[2], [x21]\n" + "tbz x27, #1, 130f\n" + "ldr h1, [x26], #0x2\n" + "ldr h2, [x25], #0x2\n" + "ldr h3, [x24], #0x2\n" + "ldr h4, [x23], #0x2\n" + "ldr h5, [x22], #0x2\n" + "tbz x27, #0, 131f\n" + "ld1 { v1.b }[2], [x26]\n" + "ld1 { v2.b }[2], [x25]\n" + "ld1 { v3.b }[2], [x24]\n" + "ld1 { v4.b }[2], [x23]\n" + "ld1 { v5.b }[2], [x22]\n" "b 131f\n" "130:" // Height 5: Multiply loop: Ragged operand read: partial_1_0 - "ldr b1, [x25, #0x0]\n" - "ldr b2, [x24, #0x0]\n" - "ldr b3, [x23, #0x0]\n" - "ldr b4, [x22, #0x0]\n" - "ldr b5, [x21, #0x0]\n" + "ldr b1, [x26, #0x0]\n" + "ldr b2, [x25, #0x0]\n" + "ldr b3, [x24, #0x0]\n" + "ldr b4, [x23, #0x0]\n" + "ldr b5, [x22, #0x0]\n" "131:" // Height 5: Multiply loop: Ragged operand read: Done - "movi v6.4s, #0x0\n" - "ldr q7, [x28, #0x0]\n" + "ldr q7, [x9, #0x0]\n" "trn1 v0.2d, v1.2d, v2.2d\n" "trn1 v2.2d, v3.2d, v4.2d\n" "trn1 v4.2d, v5.2d, v6.2d\n" - "ldr q6, [x28, #0x10]\n" + "ldr q6, [x9, #0x10]\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" ".inst 0x4e87a498 // smmla v24.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49c // smmla v28.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" ".inst 0x4e87a499 // smmla v25.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49d // smmla v29.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49a // smmla v26.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49e // smmla v30.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x70]\n" + "add x9, x9, #0x80\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49b // smmla v27.4s, v4.16b, v7.16b\n" @@ -2388,41 +2376,41 @@ void a64_hybrid_s8qs_mmla_6x16 ( ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49f // smmla v31.4s, v4.16b, v6.16b\n" "132:" // Height 5: Multiply loop: No odd multiplies - "ldr w19, [%x[args_ptr], %[offsetof_num_strings]]\n" - "add x27, x27, #0x1\n" - "cmp x27, x19\n" + "ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n" + "add x28, x28, #0x1\n" + "cmp x28, x20\n" "bne 120b\n" + "ldr q0, [x14, #0x0]\n" + "ldr q1, [x14, #0x10]\n" "uzp1 v7.2d, v8.2d, v12.2d\n" - "ldr x19, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp2 v8.2d, v8.2d, v12.2d\n" - "prfm pstl1keep, [x9, #0x0]\n" - "add x23, x9, x19\n" + "ldr q2, [x14, #0x20]\n" + "ldr q3, [x14, #0x30]\n" "uzp1 v12.2d, v9.2d, v13.2d\n" - "ldr q0, [x11, #0x0]\n" "uzp2 v9.2d, v9.2d, v13.2d\n" - "prfm pstl1keep, [x23, #0x0]\n" - "add x22, x23, x19\n" + "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n" + "add x24, x11, x20\n" "uzp1 v13.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x22, #0x0]\n" - "add x21, x22, x19\n" "uzp2 v10.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x21, #0x0]\n" - "add x20, x21, x19\n" "uzp1 v14.2d, v11.2d, v15.2d\n" - "prfm pstl1keep, [x20, #0x0]\n" "uzp2 v11.2d, v11.2d, v15.2d\n" - "ldr q1, [x11, #0x10]\n" + "add x23, x24, x20\n" + "add x22, x23, x20\n" "uzp1 v15.2d, v16.2d, v20.2d\n" - "ldr q2, [x11, #0x20]\n" "uzp2 v16.2d, v16.2d, v20.2d\n" - "ldr q3, [x11, #0x30]\n" - "add x11, x11, #0x40\n" + "add x21, x22, x20\n" + "prfm pstl1keep, [x11, #0x0]\n" "uzp1 v20.2d, v17.2d, v21.2d\n" "uzp2 v17.2d, v17.2d, v21.2d\n" + "prfm pstl1keep, [x24, #0x0]\n" + "prfm pstl1keep, [x23, #0x0]\n" "uzp1 v21.2d, v18.2d, v22.2d\n" "uzp2 v18.2d, v18.2d, v22.2d\n" + "prfm pstl1keep, [x22, #0x0]\n" + "prfm pstl1keep, [x21, #0x0]\n" "uzp1 v22.2d, v19.2d, v23.2d\n" "uzp2 v19.2d, v19.2d, v23.2d\n" + "add x14, x14, #0x40\n" "uzp1 v24.2d, v24.2d, v28.2d\n" "uzp1 v25.2d, v25.2d, v29.2d\n" "uzp1 v26.2d, v26.2d, v30.2d\n" @@ -2456,20 +2444,20 @@ void a64_hybrid_s8qs_mmla_6x16 ( "ldr q2, [x12, #0x20]\n" "ldr q6, [x13, #0x20]\n" "ldr q3, [x12, #0x30]\n" - "add x12, x12, #0x40\n" "ldr q7, [x13, #0x30]\n" + "add x12, x12, #0x40\n" "add x13, x13, #0x40\n" "b 134f\n" "133:" // Height 5: per layer parameters - "add x24, %x[qp], %[per_layer_right_shift]\n" - "ld1r { v0.4s }, [x24]\n" + "add x25, %x[qp], %[per_layer_right_shift]\n" + "ld1r { v0.4s }, [x25]\n" + "add x25, %x[qp], %[per_layer_mul]\n" + "ld1r { v4.4s }, [x25]\n" "mov v1.16b, v0.16b\n" - "add x24, %x[qp], %[per_layer_mul]\n" - "ld1r { v4.4s }, [x24]\n" - "mov v2.16b, v0.16b\n" - "mov v3.16b, v0.16b\n" "mov v5.16b, v4.16b\n" + "mov v2.16b, v0.16b\n" "mov v6.16b, v4.16b\n" + "mov v3.16b, v0.16b\n" "mov v7.16b, v4.16b\n" "134:" // Height 5: parameters loaded "sqrdmulh v31.4s, v31.4s, v4.4s\n" @@ -2496,148 +2484,148 @@ void a64_hybrid_s8qs_mmla_6x16 ( "and v4.16b, v31.16b, v0.16b\n" "and v5.16b, v12.16b, v1.16b\n" "and v6.16b, v13.16b, v2.16b\n" + "and v7.16b, v14.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v31.4s, v31.4s, v4.4s\n" "sqadd v12.4s, v12.4s, v5.4s\n" "sqadd v13.4s, v13.4s, v6.4s\n" - "and v7.16b, v14.16b, v3.16b\n" + "sqadd v14.4s, v14.4s, v7.4s\n" "and v4.16b, v8.16b, v0.16b\n" "and v5.16b, v9.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v14.4s, v14.4s, v7.4s\n" - "sqadd v8.4s, v8.4s, v4.4s\n" - "sqadd v9.4s, v9.4s, v5.4s\n" "and v6.16b, v10.16b, v2.16b\n" "and v7.16b, v11.16b, v3.16b\n" - "and v4.16b, v15.16b, v0.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" + "sqadd v8.4s, v8.4s, v4.4s\n" + "sqadd v9.4s, v9.4s, v5.4s\n" "sqadd v10.4s, v10.4s, v6.4s\n" "sqadd v11.4s, v11.4s, v7.4s\n" - "sqadd v15.4s, v15.4s, v4.4s\n" + "and v4.16b, v15.16b, v0.16b\n" "and v5.16b, v20.16b, v1.16b\n" "and v6.16b, v21.16b, v2.16b\n" "and v7.16b, v22.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v15.4s, v15.4s, v4.4s\n" "sqadd v20.4s, v20.4s, v5.4s\n" "sqadd v21.4s, v21.4s, v6.4s\n" "sqadd v22.4s, v22.4s, v7.4s\n" "and v4.16b, v16.16b, v0.16b\n" "and v5.16b, v17.16b, v1.16b\n" "and v6.16b, v18.16b, v2.16b\n" + "and v7.16b, v19.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v16.4s, v16.4s, v4.4s\n" "sqadd v17.4s, v17.4s, v5.4s\n" "sqadd v18.4s, v18.4s, v6.4s\n" - "and v7.16b, v19.16b, v3.16b\n" + "sqadd v19.4s, v19.4s, v7.4s\n" "and v4.16b, v24.16b, v0.16b\n" "and v5.16b, v25.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v19.4s, v19.4s, v7.4s\n" - "sqadd v24.4s, v24.4s, v4.4s\n" - "sqadd v25.4s, v25.4s, v5.4s\n" "and v6.16b, v26.16b, v2.16b\n" "and v7.16b, v27.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v24.4s, v24.4s, v4.4s\n" + "sqadd v25.4s, v25.4s, v5.4s\n" "sqadd v26.4s, v26.4s, v6.4s\n" "sqadd v27.4s, v27.4s, v7.4s\n" "135:" // Height 5: no shift correction + "add x25, %x[qp], %[c_offset]\n" + "ld1r { v4.4s }, [x25]\n" "srshl v31.4s, v31.4s, v0.4s\n" - "add x24, %x[qp], %[c_offset]\n" - "ld1r { v4.4s }, [x24]\n" "srshl v12.4s, v12.4s, v1.4s\n" - "add x24, %x[qp], %[minval]\n" "srshl v13.4s, v13.4s, v2.4s\n" - "ld1r { v5.4s }, [x24]\n" - "add x24, %x[qp], %[maxval]\n" "srshl v14.4s, v14.4s, v3.4s\n" - "ld1r { v6.4s }, [x24]\n" - "cmp x10, #0x10\n" + "add x25, %x[qp], %[maxval]\n" + "ld1r { v6.4s }, [x25]\n" "srshl v8.4s, v8.4s, v0.4s\n" "srshl v9.4s, v9.4s, v1.4s\n" + "add x25, %x[qp], %[minval]\n" + "ld1r { v5.4s }, [x25]\n" + "srshl v10.4s, v10.4s, v2.4s\n" + "srshl v11.4s, v11.4s, v3.4s\n" + "cmp x10, #0x10\n" + "srshl v15.4s, v15.4s, v0.4s\n" + "srshl v20.4s, v20.4s, v1.4s\n" + "srshl v21.4s, v21.4s, v2.4s\n" + "srshl v22.4s, v22.4s, v3.4s\n" + "srshl v16.4s, v16.4s, v0.4s\n" + "srshl v17.4s, v17.4s, v1.4s\n" + "srshl v18.4s, v18.4s, v2.4s\n" + "srshl v19.4s, v19.4s, v3.4s\n" + "srshl v24.4s, v24.4s, v0.4s\n" + "srshl v25.4s, v25.4s, v1.4s\n" + "srshl v26.4s, v26.4s, v2.4s\n" + "srshl v27.4s, v27.4s, v3.4s\n" "add v31.4s, v31.4s, v4.4s\n" "add v12.4s, v12.4s, v4.4s\n" "add v13.4s, v13.4s, v4.4s\n" - "smin v31.4s, v31.4s, v6.4s\n" - "smin v12.4s, v12.4s, v6.4s\n" - "smin v13.4s, v13.4s, v6.4s\n" - "smax v31.4s, v31.4s, v5.4s\n" - "smax v12.4s, v12.4s, v5.4s\n" - "smax v13.4s, v13.4s, v5.4s\n" "add v14.4s, v14.4s, v4.4s\n" "add v8.4s, v8.4s, v4.4s\n" "add v9.4s, v9.4s, v4.4s\n" - "smin v14.4s, v14.4s, v6.4s\n" - "smin v8.4s, v8.4s, v6.4s\n" - "smin v9.4s, v9.4s, v6.4s\n" - "smax v14.4s, v14.4s, v5.4s\n" - "smax v8.4s, v8.4s, v5.4s\n" - "smax v9.4s, v9.4s, v5.4s\n" - "srshl v10.4s, v10.4s, v2.4s\n" - "srshl v11.4s, v11.4s, v3.4s\n" - "srshl v15.4s, v15.4s, v0.4s\n" - "srshl v20.4s, v20.4s, v1.4s\n" "add v10.4s, v10.4s, v4.4s\n" "add v11.4s, v11.4s, v4.4s\n" "add v15.4s, v15.4s, v4.4s\n" - "smin v10.4s, v10.4s, v6.4s\n" - "smin v11.4s, v11.4s, v6.4s\n" - "smin v15.4s, v15.4s, v6.4s\n" - "smax v10.4s, v10.4s, v5.4s\n" - "smax v11.4s, v11.4s, v5.4s\n" - "smax v15.4s, v15.4s, v5.4s\n" "add v20.4s, v20.4s, v4.4s\n" - "srshl v21.4s, v21.4s, v2.4s\n" - "srshl v22.4s, v22.4s, v3.4s\n" - "smin v20.4s, v20.4s, v6.4s\n" - "srshl v16.4s, v16.4s, v0.4s\n" "add v21.4s, v21.4s, v4.4s\n" - "smax v20.4s, v20.4s, v5.4s\n" "add v22.4s, v22.4s, v4.4s\n" - "smin v21.4s, v21.4s, v6.4s\n" "add v16.4s, v16.4s, v4.4s\n" - "smin v22.4s, v22.4s, v6.4s\n" - "smax v21.4s, v21.4s, v5.4s\n" - "smin v16.4s, v16.4s, v6.4s\n" - "smax v22.4s, v22.4s, v5.4s\n" - "srshl v17.4s, v17.4s, v1.4s\n" - "smax v16.4s, v16.4s, v5.4s\n" - "srshl v18.4s, v18.4s, v2.4s\n" - "srshl v19.4s, v19.4s, v3.4s\n" "add v17.4s, v17.4s, v4.4s\n" - "srshl v24.4s, v24.4s, v0.4s\n" "add v18.4s, v18.4s, v4.4s\n" - "smin v17.4s, v17.4s, v6.4s\n" "add v19.4s, v19.4s, v4.4s\n" - "smin v18.4s, v18.4s, v6.4s\n" - "smax v17.4s, v17.4s, v5.4s\n" - "smin v19.4s, v19.4s, v6.4s\n" - "smax v18.4s, v18.4s, v5.4s\n" "add v24.4s, v24.4s, v4.4s\n" - "smax v19.4s, v19.4s, v5.4s\n" - "srshl v25.4s, v25.4s, v1.4s\n" - "smin v24.4s, v24.4s, v6.4s\n" - "srshl v26.4s, v26.4s, v2.4s\n" - "srshl v27.4s, v27.4s, v3.4s\n" - "smax v24.4s, v24.4s, v5.4s\n" "add v25.4s, v25.4s, v4.4s\n" "add v26.4s, v26.4s, v4.4s\n" "add v27.4s, v27.4s, v4.4s\n" + "smin v31.4s, v31.4s, v6.4s\n" + "smin v12.4s, v12.4s, v6.4s\n" + "smin v13.4s, v13.4s, v6.4s\n" + "smin v14.4s, v14.4s, v6.4s\n" + "smin v8.4s, v8.4s, v6.4s\n" + "smin v9.4s, v9.4s, v6.4s\n" + "smin v10.4s, v10.4s, v6.4s\n" + "smin v11.4s, v11.4s, v6.4s\n" + "smin v15.4s, v15.4s, v6.4s\n" + "smin v20.4s, v20.4s, v6.4s\n" + "smin v21.4s, v21.4s, v6.4s\n" + "smin v22.4s, v22.4s, v6.4s\n" + "smin v16.4s, v16.4s, v6.4s\n" + "smin v17.4s, v17.4s, v6.4s\n" + "smin v18.4s, v18.4s, v6.4s\n" + "smin v19.4s, v19.4s, v6.4s\n" + "smin v24.4s, v24.4s, v6.4s\n" "smin v25.4s, v25.4s, v6.4s\n" "smin v26.4s, v26.4s, v6.4s\n" "smin v27.4s, v27.4s, v6.4s\n" + "smax v31.4s, v31.4s, v5.4s\n" + "smax v12.4s, v12.4s, v5.4s\n" + "smax v13.4s, v13.4s, v5.4s\n" + "smax v14.4s, v14.4s, v5.4s\n" + "smax v8.4s, v8.4s, v5.4s\n" + "smax v9.4s, v9.4s, v5.4s\n" + "smax v10.4s, v10.4s, v5.4s\n" + "smax v11.4s, v11.4s, v5.4s\n" + "smax v15.4s, v15.4s, v5.4s\n" + "smax v20.4s, v20.4s, v5.4s\n" + "smax v21.4s, v21.4s, v5.4s\n" + "smax v22.4s, v22.4s, v5.4s\n" + "smax v16.4s, v16.4s, v5.4s\n" + "smax v17.4s, v17.4s, v5.4s\n" + "smax v18.4s, v18.4s, v5.4s\n" + "smax v19.4s, v19.4s, v5.4s\n" + "smax v24.4s, v24.4s, v5.4s\n" "smax v25.4s, v25.4s, v5.4s\n" "smax v26.4s, v26.4s, v5.4s\n" "smax v27.4s, v27.4s, v5.4s\n" @@ -2658,131 +2646,131 @@ void a64_hybrid_s8qs_mmla_6x16 ( "uzp1 v24.16b, v24.16b, v25.16b\n" "bge 144f\n" "tbz x10, #3, 139f\n" - "str d31, [x9], #0x8\n" - "str d8, [x23], #0x8\n" - "str d15, [x22], #0x8\n" - "str d16, [x21], #0x8\n" - "str d24, [x20], #0x8\n" + "str d31, [x11], #0x8\n" + "str d8, [x24], #0x8\n" + "str d15, [x23], #0x8\n" + "str d16, [x22], #0x8\n" + "str d24, [x21], #0x8\n" "tbz x10, #2, 137f\n" - "st1 { v31.s }[2], [x9], #0x4\n" - "st1 { v8.s }[2], [x23], #0x4\n" - "st1 { v15.s }[2], [x22], #0x4\n" - "st1 { v16.s }[2], [x21], #0x4\n" - "st1 { v24.s }[2], [x20], #0x4\n" + "st1 { v31.s }[2], [x11], #0x4\n" + "st1 { v8.s }[2], [x24], #0x4\n" + "st1 { v15.s }[2], [x23], #0x4\n" + "st1 { v16.s }[2], [x22], #0x4\n" + "st1 { v24.s }[2], [x21], #0x4\n" "tbz x10, #1, 136f\n" - "st1 { v31.h }[6], [x9], #0x2\n" - "st1 { v8.h }[6], [x23], #0x2\n" - "st1 { v15.h }[6], [x22], #0x2\n" - "st1 { v16.h }[6], [x21], #0x2\n" - "st1 { v24.h }[6], [x20], #0x2\n" + "st1 { v31.h }[6], [x11], #0x2\n" + "st1 { v8.h }[6], [x24], #0x2\n" + "st1 { v15.h }[6], [x23], #0x2\n" + "st1 { v16.h }[6], [x22], #0x2\n" + "st1 { v24.h }[6], [x21], #0x2\n" "tbz x10, #0, 143f\n" - "st1 { v31.b }[14], [x9]\n" - "st1 { v8.b }[14], [x23]\n" - "st1 { v15.b }[14], [x22]\n" - "st1 { v16.b }[14], [x21]\n" - "st1 { v24.b }[14], [x20]\n" + "st1 { v31.b }[14], [x11]\n" + "st1 { v8.b }[14], [x24]\n" + "st1 { v15.b }[14], [x23]\n" + "st1 { v16.b }[14], [x22]\n" + "st1 { v24.b }[14], [x21]\n" "b 143f\n" "136:" // Height 5: Partial direct writeback: partial_1_12 "tbz x10, #0, 143f\n" - "st1 { v31.b }[12], [x9]\n" - "st1 { v8.b }[12], [x23]\n" - "st1 { v15.b }[12], [x22]\n" - "st1 { v16.b }[12], [x21]\n" - "st1 { v24.b }[12], [x20]\n" + "st1 { v31.b }[12], [x11]\n" + "st1 { v8.b }[12], [x24]\n" + "st1 { v15.b }[12], [x23]\n" + "st1 { v16.b }[12], [x22]\n" + "st1 { v24.b }[12], [x21]\n" "b 143f\n" "137:" // Height 5: Partial direct writeback: partial_2_8 "tbz x10, #1, 138f\n" - "st1 { v31.h }[4], [x9], #0x2\n" - "st1 { v8.h }[4], [x23], #0x2\n" - "st1 { v15.h }[4], [x22], #0x2\n" - "st1 { v16.h }[4], [x21], #0x2\n" - "st1 { v24.h }[4], [x20], #0x2\n" + "st1 { v31.h }[4], [x11], #0x2\n" + "st1 { v8.h }[4], [x24], #0x2\n" + "st1 { v15.h }[4], [x23], #0x2\n" + "st1 { v16.h }[4], [x22], #0x2\n" + "st1 { v24.h }[4], [x21], #0x2\n" "tbz x10, #0, 143f\n" - "st1 { v31.b }[10], [x9]\n" - "st1 { v8.b }[10], [x23]\n" - "st1 { v15.b }[10], [x22]\n" - "st1 { v16.b }[10], [x21]\n" - "st1 { v24.b }[10], [x20]\n" + "st1 { v31.b }[10], [x11]\n" + "st1 { v8.b }[10], [x24]\n" + "st1 { v15.b }[10], [x23]\n" + "st1 { v16.b }[10], [x22]\n" + "st1 { v24.b }[10], [x21]\n" "b 143f\n" "138:" // Height 5: Partial direct writeback: partial_1_8 "tbz x10, #0, 143f\n" - "st1 { v31.b }[8], [x9]\n" - "st1 { v8.b }[8], [x23]\n" - "st1 { v15.b }[8], [x22]\n" - "st1 { v16.b }[8], [x21]\n" - "st1 { v24.b }[8], [x20]\n" + "st1 { v31.b }[8], [x11]\n" + "st1 { v8.b }[8], [x24]\n" + "st1 { v15.b }[8], [x23]\n" + "st1 { v16.b }[8], [x22]\n" + "st1 { v24.b }[8], [x21]\n" "b 143f\n" "139:" // Height 5: Partial direct writeback: partial_4_0 "tbz x10, #2, 141f\n" - "str s31, [x9], #0x4\n" - "str s8, [x23], #0x4\n" - "str s15, [x22], #0x4\n" - "str s16, [x21], #0x4\n" - "str s24, [x20], #0x4\n" + "str s31, [x11], #0x4\n" + "str s8, [x24], #0x4\n" + "str s15, [x23], #0x4\n" + "str s16, [x22], #0x4\n" + "str s24, [x21], #0x4\n" "tbz x10, #1, 140f\n" - "st1 { v31.h }[2], [x9], #0x2\n" - "st1 { v8.h }[2], [x23], #0x2\n" - "st1 { v15.h }[2], [x22], #0x2\n" - "st1 { v16.h }[2], [x21], #0x2\n" - "st1 { v24.h }[2], [x20], #0x2\n" + "st1 { v31.h }[2], [x11], #0x2\n" + "st1 { v8.h }[2], [x24], #0x2\n" + "st1 { v15.h }[2], [x23], #0x2\n" + "st1 { v16.h }[2], [x22], #0x2\n" + "st1 { v24.h }[2], [x21], #0x2\n" "tbz x10, #0, 143f\n" - "st1 { v31.b }[6], [x9]\n" - "st1 { v8.b }[6], [x23]\n" - "st1 { v15.b }[6], [x22]\n" - "st1 { v16.b }[6], [x21]\n" - "st1 { v24.b }[6], [x20]\n" + "st1 { v31.b }[6], [x11]\n" + "st1 { v8.b }[6], [x24]\n" + "st1 { v15.b }[6], [x23]\n" + "st1 { v16.b }[6], [x22]\n" + "st1 { v24.b }[6], [x21]\n" "b 143f\n" "140:" // Height 5: Partial direct writeback: partial_1_4 "tbz x10, #0, 143f\n" - "st1 { v31.b }[4], [x9]\n" - "st1 { v8.b }[4], [x23]\n" - "st1 { v15.b }[4], [x22]\n" - "st1 { v16.b }[4], [x21]\n" - "st1 { v24.b }[4], [x20]\n" + "st1 { v31.b }[4], [x11]\n" + "st1 { v8.b }[4], [x24]\n" + "st1 { v15.b }[4], [x23]\n" + "st1 { v16.b }[4], [x22]\n" + "st1 { v24.b }[4], [x21]\n" "b 143f\n" "141:" // Height 5: Partial direct writeback: partial_2_0 "tbz x10, #1, 142f\n" - "str h31, [x9], #0x2\n" - "str h8, [x23], #0x2\n" - "str h15, [x22], #0x2\n" - "str h16, [x21], #0x2\n" - "str h24, [x20], #0x2\n" + "str h31, [x11], #0x2\n" + "str h8, [x24], #0x2\n" + "str h15, [x23], #0x2\n" + "str h16, [x22], #0x2\n" + "str h24, [x21], #0x2\n" "tbz x10, #0, 143f\n" - "st1 { v31.b }[2], [x9]\n" - "st1 { v8.b }[2], [x23]\n" - "st1 { v15.b }[2], [x22]\n" - "st1 { v16.b }[2], [x21]\n" - "st1 { v24.b }[2], [x20]\n" + "st1 { v31.b }[2], [x11]\n" + "st1 { v8.b }[2], [x24]\n" + "st1 { v15.b }[2], [x23]\n" + "st1 { v16.b }[2], [x22]\n" + "st1 { v24.b }[2], [x21]\n" "b 143f\n" "142:" // Height 5: Partial direct writeback: partial_1_0 - "str b31, [x9, #0x0]\n" - "str b8, [x23, #0x0]\n" - "str b15, [x22, #0x0]\n" - "str b16, [x21, #0x0]\n" - "str b24, [x20, #0x0]\n" + "str b31, [x11, #0x0]\n" + "str b8, [x24, #0x0]\n" + "str b15, [x23, #0x0]\n" + "str b16, [x22, #0x0]\n" + "str b24, [x21, #0x0]\n" "143:" // Height 5: Partial direct writeback: Done "b 145f\n" "144:" // Height 5: Full writeback - "str q31, [x9, #0x0]\n" - "add x9, x9, #0x10\n" - "str q8, [x23, #0x0]\n" - "str q15, [x22, #0x0]\n" - "str q16, [x21, #0x0]\n" - "str q24, [x20, #0x0]\n" + "str q31, [x11, #0x0]\n" + "add x11, x11, #0x10\n" + "str q8, [x24, #0x0]\n" + "str q15, [x23, #0x0]\n" + "str q16, [x22, #0x0]\n" + "str q24, [x21, #0x0]\n" "145:" // Height 5: Writeback done "subs x10, x10, #0x10\n" "bgt 118b\n" "b 176f\n" "146:" // Height 6 + "ldr x21, [%x[args_ptr], %[offsetof_output_offset]]\n" + "mov x20, #0x6\n" + "mov x14, %x[col_bias]\n" "ldr x13, [%x[args_ptr], %[offsetof_multiplier_ptr]]\n" - "mov x11, %x[col_bias]\n" "ldr x12, [%x[args_ptr], %[offsetof_shift_ptr]]\n" - "mov x9, %x[output_ptr]\n" "ldr x10, [%x[args_ptr], %[offsetof_N]]\n" - "mov x20, #0x6\n" - "ldr x28, [%x[args_ptr], %[offsetof_B_ptr]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_output_offset]]\n" - "madd %x[output_ptr], x19, x20, %x[output_ptr]\n" + "mov x11, %x[output_ptr]\n" + "madd %x[output_ptr], x21, x20, %x[output_ptr]\n" + "ldr x9, [%x[args_ptr], %[offsetof_B_ptr]]\n" "147:" // Height 6: Column loop "movi v8.4s, #0x0\n" "movi v9.4s, #0x0\n" @@ -2809,219 +2797,219 @@ void a64_hybrid_s8qs_mmla_6x16 ( "movi v30.4s, #0x0\n" "movi v31.4s, #0x0\n" "148:" // Height 6: setup done - "mov x27, #0x0\n" + "mov x28, #0x0\n" "149:" // Height 6: String loop "ldr x20, [%x[args_ptr], %[offsetof_string_lengths]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_offset]]\n" - "ldr w26, [x20, x27, LSL #0x2]\n" + "ldr w27, [x20, x28, LSL #0x2]\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 150f\n" - "ldr x20, [%x[input_ptr], x27, LSL #0x3]\n" - "add x20, x20, x19, LSL #3\n" - "ldr x25, [x20, #0x0]\n" - "ldr x24, [x20, #0x8]\n" - "ldr x23, [x20, #0x10]\n" - "ldr x22, [x20, #0x18]\n" - "ldr x21, [x20, #0x20]\n" - "ldr x20, [x20, #0x28]\n" - "cbnz x27, 151f\n" - "ldr x19, [%x[args_ptr], %[offsetof_input_initial_col]]\n" - "add x25, x25, x19\n" - "add x24, x24, x19\n" - "add x23, x23, x19\n" - "add x22, x22, x19\n" - "add x21, x21, x19\n" - "add x20, x20, x19\n" + "ldr x21, [%x[input_ptr], x28, LSL #0x3]\n" + "add x21, x21, x20, LSL #3\n" + "ldr x26, [x21, #0x0]\n" + "ldr x25, [x21, #0x8]\n" + "ldr x24, [x21, #0x10]\n" + "ldr x23, [x21, #0x18]\n" + "ldr x22, [x21, #0x20]\n" + "ldr x21, [x21, #0x28]\n" + "cbnz x28, 151f\n" + "ldr x20, [%x[args_ptr], %[offsetof_input_initial_col]]\n" + "add x26, x26, x20\n" + "add x25, x25, x20\n" + "add x24, x24, x20\n" + "add x23, x23, x20\n" + "add x22, x22, x20\n" + "add x21, x21, x20\n" "b 151f\n" "150:" // Height 6: setup direct input - "mov x25, %x[input_ptr]\n" - "add x24, x25, x19\n" - "add x23, x24, x19\n" - "add x22, x23, x19\n" - "add x21, x22, x19\n" - "add x20, x21, x19\n" + "mov x26, %x[input_ptr]\n" + "add x25, x26, x20\n" + "add x24, x25, x20\n" + "add x23, x24, x20\n" + "add x22, x23, x20\n" + "add x21, x22, x20\n" "151:" // Height 6: input setup done - "cmp x26, #0x10\n" + "cmp x27, #0x10\n" "blt 154f\n" - "ldr q1, [x25, #0x0]\n" - "ldr q2, [x24, #0x0]\n" - "cmp x26, #0x20\n" + "ldr q1, [x26, #0x0]\n" + "ldr q2, [x25, #0x0]\n" + "cmp x27, #0x20\n" + "ldr q3, [x24, #0x0]\n" + "ldr q4, [x23, #0x0]\n" + "ldr q5, [x22, #0x0]\n" + "ldr q6, [x21, #0x0]\n" + "ldr q7, [x9, #0x0]\n" "blt 153f\n" "152:" // Height 6: Multiply loop: Main loop head "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "add x25, x25, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q4, [x22, #0x0]\n" - "add x24, x24, #0x10\n" + ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" + "sub x27, x27, #0x10\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q5, [x21, #0x0]\n" - "add x23, x23, #0x10\n" "trn2 v3.2d, v3.2d, v4.2d\n" - "ldr q6, [x20, #0x0]\n" - "add x22, x22, #0x10\n" + ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" + "add x26, x26, #0x10\n" "trn1 v4.2d, v5.2d, v6.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x21, x21, #0x10\n" "trn2 v5.2d, v5.2d, v6.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x20, x20, #0x10\n" - ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x25, #0x80]\n" - "sub x26, x26, #0x10\n" - ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" - "cmp x26, #0x20\n" + "ldr q6, [x9, #0x10]\n" ".inst 0x4e87a498 // smmla v24.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "prfm pldl1keep, [x22, #0x80]\n" + "add x25, x25, #0x10\n" ".inst 0x4e86a49c // smmla v28.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" - "prfm pldl1keep, [x21, #0x80]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" + "add x24, x24, #0x10\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "prfm pldl1keep, [x20, #0x80]\n" ".inst 0x4e87a499 // smmla v25.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" + "add x23, x23, #0x10\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" + "add x22, x22, #0x10\n" + "add x21, x21, #0x10\n" ".inst 0x4e86a49d // smmla v29.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "cmp x27, #0x20\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49a // smmla v26.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" + "prfm pldl1keep, [x25, #0x80]\n" + "prfm pldl1keep, [x24, #0x80]\n" ".inst 0x4e86a49e // smmla v30.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49b // smmla v27.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" + "prfm pldl1keep, [x22, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" - "ldr q2, [x24, #0x0]\n" + "ldr q2, [x25, #0x0]\n" + "prfm pldl1keep, [x21, #0x80]\n" ".inst 0x4e86a49f // smmla v31.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" + "ldr q4, [x23, #0x0]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b8 // smmla v24.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bc // smmla v28.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b9 // smmla v25.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bd // smmla v29.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4ba // smmla v26.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4be // smmla v30.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4bb // smmla v27.4s, v5.16b, v7.16b\n" + "ldr q7, [x9, #0x0]\n" ".inst 0x4e86a42f // smmla v15.4s, v1.16b, v6.16b\n" - "ldr q1, [x25, #0x0]\n" + "ldr q1, [x26, #0x0]\n" ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" + "ldr q3, [x24, #0x0]\n" ".inst 0x4e86a4bf // smmla v31.4s, v5.16b, v6.16b\n" + "ldr q5, [x22, #0x0]\n" + "ldr q6, [x21, #0x0]\n" "bge 152b\n" "153:" // Height 6: Multiply loop: Single iteration only "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q3, [x23, #0x0]\n" - "sub x26, x26, #0x10\n" "trn2 v1.2d, v1.2d, v2.2d\n" - "ldr q4, [x22, #0x0]\n" - "add x25, x25, #0x10\n" + ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" + "add x26, x26, #0x10\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr q5, [x21, #0x0]\n" - "add x24, x24, #0x10\n" "trn2 v3.2d, v3.2d, v4.2d\n" - "ldr q6, [x20, #0x0]\n" - "add x23, x23, #0x10\n" + ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" + "add x25, x25, #0x10\n" "trn1 v4.2d, v5.2d, v6.2d\n" - "ldr q7, [x28, #0x0]\n" - "add x22, x22, #0x10\n" "trn2 v5.2d, v5.2d, v6.2d\n" - "ldr q6, [x28, #0x10]\n" - "add x21, x21, #0x10\n" - ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" - "prfm pldl1keep, [x25, #0x80]\n" - "add x20, x20, #0x10\n" - ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" - "prfm pldl1keep, [x24, #0x80]\n" + "ldr q6, [x9, #0x10]\n" ".inst 0x4e87a498 // smmla v24.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" - "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" - "prfm pldl1keep, [x22, #0x80]\n" + "add x24, x24, #0x10\n" ".inst 0x4e86a49c // smmla v28.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" - "prfm pldl1keep, [x21, #0x80]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" + "add x23, x23, #0x10\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" - "prfm pldl1keep, [x20, #0x80]\n" ".inst 0x4e87a499 // smmla v25.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" + "add x22, x22, #0x10\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" + "add x21, x21, #0x10\n" + "sub x27, x27, #0x10\n" ".inst 0x4e86a49d // smmla v29.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" + "prfm pldl1keep, [x26, #0x80]\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49a // smmla v26.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" + "prfm pldl1keep, [x25, #0x80]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" + "prfm pldl1keep, [x24, #0x80]\n" + "prfm pldl1keep, [x23, #0x80]\n" ".inst 0x4e86a49e // smmla v30.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "prfm pldl1keep, [x22, #0x80]\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49b // smmla v27.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x80]\n" + "ldr q7, [x9, #0x80]\n" + "prfm pldl1keep, [x21, #0x80]\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49f // smmla v31.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x90]\n" + "ldr q6, [x9, #0x90]\n" ".inst 0x4e87a428 // smmla v8.4s, v1.16b, v7.16b\n" ".inst 0x4e87a470 // smmla v16.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b8 // smmla v24.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xa0]\n" + "ldr q7, [x9, #0xa0]\n" ".inst 0x4e86a42c // smmla v12.4s, v1.16b, v6.16b\n" ".inst 0x4e86a474 // smmla v20.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bc // smmla v28.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xb0]\n" + "ldr q6, [x9, #0xb0]\n" ".inst 0x4e87a429 // smmla v9.4s, v1.16b, v7.16b\n" ".inst 0x4e87a471 // smmla v17.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4b9 // smmla v25.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xc0]\n" + "ldr q7, [x9, #0xc0]\n" ".inst 0x4e86a42d // smmla v13.4s, v1.16b, v6.16b\n" ".inst 0x4e86a475 // smmla v21.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bd // smmla v29.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xd0]\n" + "ldr q6, [x9, #0xd0]\n" ".inst 0x4e87a42a // smmla v10.4s, v1.16b, v7.16b\n" ".inst 0x4e87a472 // smmla v18.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4ba // smmla v26.4s, v5.16b, v7.16b\n" - "ldr q7, [x28, #0xe0]\n" + "ldr q7, [x9, #0xe0]\n" ".inst 0x4e86a42e // smmla v14.4s, v1.16b, v6.16b\n" ".inst 0x4e86a476 // smmla v22.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4be // smmla v30.4s, v5.16b, v6.16b\n" - "ldr q6, [x28, #0xf0]\n" - "add x28, x28, #0x100\n" + "ldr q6, [x9, #0xf0]\n" + "add x9, x9, #0x100\n" ".inst 0x4e87a42b // smmla v11.4s, v1.16b, v7.16b\n" ".inst 0x4e87a473 // smmla v19.4s, v3.16b, v7.16b\n" ".inst 0x4e87a4bb // smmla v27.4s, v5.16b, v7.16b\n" @@ -3029,48 +3017,48 @@ void a64_hybrid_s8qs_mmla_6x16 ( ".inst 0x4e86a477 // smmla v23.4s, v3.16b, v6.16b\n" ".inst 0x4e86a4bf // smmla v31.4s, v5.16b, v6.16b\n" "154:" // Height 6: Multiply loop: Main loop skip - "cbz x26, 161f\n" - "cmp x26, #0x8\n" + "cbz x27, 161f\n" + "cmp x27, #0x8\n" "blt 156f\n" "155:" // Height 6: Multiply loop: Odd block loop - "ldr d1, [x25], #0x8\n" - "sub x26, x26, #0x8\n" - "ldr d2, [x24], #0x8\n" + "ldr d1, [x26], #0x8\n" + "ldr d2, [x25], #0x8\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr d3, [x23], #0x8\n" - "cmp x26, #0x8\n" - "ldr d4, [x22], #0x8\n" + "sub x27, x27, #0x8\n" + "ldr d3, [x24], #0x8\n" + "ldr d4, [x23], #0x8\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "ldr d5, [x21], #0x8\n" - "ldr d7, [x20], #0x8\n" + "cmp x27, #0x8\n" + "ldr d5, [x22], #0x8\n" + "ldr d7, [x21], #0x8\n" "trn1 v4.2d, v5.2d, v7.2d\n" - "ldr q6, [x28, #0x0]\n" - "ldr q7, [x28, #0x10]\n" + "ldr q6, [x9, #0x0]\n" + "ldr q7, [x9, #0x10]\n" ".inst 0x4e86a408 // smmla v8.4s, v0.16b, v6.16b\n" ".inst 0x4e86a450 // smmla v16.4s, v2.16b, v6.16b\n" ".inst 0x4e86a498 // smmla v24.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x20]\n" + "ldr q6, [x9, #0x20]\n" ".inst 0x4e87a40c // smmla v12.4s, v0.16b, v7.16b\n" ".inst 0x4e87a454 // smmla v20.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49c // smmla v28.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x30]\n" + "ldr q7, [x9, #0x30]\n" ".inst 0x4e86a409 // smmla v9.4s, v0.16b, v6.16b\n" ".inst 0x4e86a451 // smmla v17.4s, v2.16b, v6.16b\n" ".inst 0x4e86a499 // smmla v25.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x40]\n" + "ldr q6, [x9, #0x40]\n" ".inst 0x4e87a40d // smmla v13.4s, v0.16b, v7.16b\n" ".inst 0x4e87a455 // smmla v21.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49d // smmla v29.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x50]\n" + "ldr q7, [x9, #0x50]\n" ".inst 0x4e86a40a // smmla v10.4s, v0.16b, v6.16b\n" ".inst 0x4e86a452 // smmla v18.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49a // smmla v26.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x60]\n" + "ldr q6, [x9, #0x60]\n" ".inst 0x4e87a40e // smmla v14.4s, v0.16b, v7.16b\n" ".inst 0x4e87a456 // smmla v22.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49e // smmla v30.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q7, [x9, #0x70]\n" + "add x9, x9, #0x80\n" ".inst 0x4e86a40b // smmla v11.4s, v0.16b, v6.16b\n" ".inst 0x4e86a453 // smmla v19.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49b // smmla v27.4s, v4.16b, v6.16b\n" @@ -3078,136 +3066,136 @@ void a64_hybrid_s8qs_mmla_6x16 ( ".inst 0x4e87a457 // smmla v23.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49f // smmla v31.4s, v4.16b, v7.16b\n" "bge 155b\n" - "cbz x26, 161f\n" "156:" // Height 6: Multiply loop: Skip odd blocks - "tbz x26, #2, 158f\n" - "ldr s1, [x25], #0x4\n" - "ldr s2, [x24], #0x4\n" - "ldr s3, [x23], #0x4\n" - "ldr s4, [x22], #0x4\n" - "ldr s5, [x21], #0x4\n" - "ldr s6, [x20], #0x4\n" - "tbz x26, #1, 157f\n" - "ld1 { v1.h }[2], [x25], #0x2\n" - "ld1 { v2.h }[2], [x24], #0x2\n" - "ld1 { v3.h }[2], [x23], #0x2\n" - "ld1 { v4.h }[2], [x22], #0x2\n" - "ld1 { v5.h }[2], [x21], #0x2\n" - "ld1 { v6.h }[2], [x20], #0x2\n" - "tbz x26, #0, 160f\n" - "ld1 { v1.b }[6], [x25]\n" - "ld1 { v2.b }[6], [x24]\n" - "ld1 { v3.b }[6], [x23]\n" - "ld1 { v4.b }[6], [x22]\n" - "ld1 { v5.b }[6], [x21]\n" - "ld1 { v6.b }[6], [x20]\n" + "cbz x27, 161f\n" + "tbz x27, #2, 158f\n" + "ldr s1, [x26], #0x4\n" + "ldr s2, [x25], #0x4\n" + "ldr s3, [x24], #0x4\n" + "ldr s4, [x23], #0x4\n" + "ldr s5, [x22], #0x4\n" + "ldr s6, [x21], #0x4\n" + "tbz x27, #1, 157f\n" + "ld1 { v1.h }[2], [x26], #0x2\n" + "ld1 { v2.h }[2], [x25], #0x2\n" + "ld1 { v3.h }[2], [x24], #0x2\n" + "ld1 { v4.h }[2], [x23], #0x2\n" + "ld1 { v5.h }[2], [x22], #0x2\n" + "ld1 { v6.h }[2], [x21], #0x2\n" + "tbz x27, #0, 160f\n" + "ld1 { v1.b }[6], [x26]\n" + "ld1 { v2.b }[6], [x25]\n" + "ld1 { v3.b }[6], [x24]\n" + "ld1 { v4.b }[6], [x23]\n" + "ld1 { v5.b }[6], [x22]\n" + "ld1 { v6.b }[6], [x21]\n" "b 160f\n" "157:" // Height 6: Multiply loop: Ragged operand read: partial_1_4 - "tbz x26, #0, 160f\n" - "ld1 { v1.b }[4], [x25]\n" - "ld1 { v2.b }[4], [x24]\n" - "ld1 { v3.b }[4], [x23]\n" - "ld1 { v4.b }[4], [x22]\n" - "ld1 { v5.b }[4], [x21]\n" - "ld1 { v6.b }[4], [x20]\n" + "tbz x27, #0, 160f\n" + "ld1 { v1.b }[4], [x26]\n" + "ld1 { v2.b }[4], [x25]\n" + "ld1 { v3.b }[4], [x24]\n" + "ld1 { v4.b }[4], [x23]\n" + "ld1 { v5.b }[4], [x22]\n" + "ld1 { v6.b }[4], [x21]\n" "b 160f\n" "158:" // Height 6: Multiply loop: Ragged operand read: partial_2_0 - "tbz x26, #1, 159f\n" - "ldr h1, [x25], #0x2\n" - "ldr h2, [x24], #0x2\n" - "ldr h3, [x23], #0x2\n" - "ldr h4, [x22], #0x2\n" - "ldr h5, [x21], #0x2\n" - "ldr h6, [x20], #0x2\n" - "tbz x26, #0, 160f\n" - "ld1 { v1.b }[2], [x25]\n" - "ld1 { v2.b }[2], [x24]\n" - "ld1 { v3.b }[2], [x23]\n" - "ld1 { v4.b }[2], [x22]\n" - "ld1 { v5.b }[2], [x21]\n" - "ld1 { v6.b }[2], [x20]\n" + "tbz x27, #1, 159f\n" + "ldr h1, [x26], #0x2\n" + "ldr h2, [x25], #0x2\n" + "ldr h3, [x24], #0x2\n" + "ldr h4, [x23], #0x2\n" + "ldr h5, [x22], #0x2\n" + "ldr h6, [x21], #0x2\n" + "tbz x27, #0, 160f\n" + "ld1 { v1.b }[2], [x26]\n" + "ld1 { v2.b }[2], [x25]\n" + "ld1 { v3.b }[2], [x24]\n" + "ld1 { v4.b }[2], [x23]\n" + "ld1 { v5.b }[2], [x22]\n" + "ld1 { v6.b }[2], [x21]\n" "b 160f\n" "159:" // Height 6: Multiply loop: Ragged operand read: partial_1_0 - "ldr b1, [x25, #0x0]\n" - "ldr b2, [x24, #0x0]\n" - "ldr b3, [x23, #0x0]\n" - "ldr b4, [x22, #0x0]\n" - "ldr b5, [x21, #0x0]\n" - "ldr b6, [x20, #0x0]\n" + "ldr b1, [x26, #0x0]\n" + "ldr b2, [x25, #0x0]\n" + "ldr b3, [x24, #0x0]\n" + "ldr b4, [x23, #0x0]\n" + "ldr b5, [x22, #0x0]\n" + "ldr b6, [x21, #0x0]\n" "160:" // Height 6: Multiply loop: Ragged operand read: Done + "ldr q7, [x9, #0x0]\n" "trn1 v0.2d, v1.2d, v2.2d\n" - "ldr q7, [x28, #0x0]\n" "trn1 v2.2d, v3.2d, v4.2d\n" - "trn1 v4.2d, v5.2d, v6.2d\n" - "ldr q6, [x28, #0x10]\n" ".inst 0x4e87a408 // smmla v8.4s, v0.16b, v7.16b\n" + "trn1 v4.2d, v5.2d, v6.2d\n" + "ldr q6, [x9, #0x10]\n" ".inst 0x4e87a450 // smmla v16.4s, v2.16b, v7.16b\n" ".inst 0x4e87a498 // smmla v24.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x20]\n" + "ldr q7, [x9, #0x20]\n" ".inst 0x4e86a40c // smmla v12.4s, v0.16b, v6.16b\n" ".inst 0x4e86a454 // smmla v20.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49c // smmla v28.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x30]\n" + "ldr q6, [x9, #0x30]\n" ".inst 0x4e87a409 // smmla v9.4s, v0.16b, v7.16b\n" ".inst 0x4e87a451 // smmla v17.4s, v2.16b, v7.16b\n" ".inst 0x4e87a499 // smmla v25.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x40]\n" + "ldr q7, [x9, #0x40]\n" ".inst 0x4e86a40d // smmla v13.4s, v0.16b, v6.16b\n" ".inst 0x4e86a455 // smmla v21.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49d // smmla v29.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x50]\n" + "ldr q6, [x9, #0x50]\n" ".inst 0x4e87a40a // smmla v10.4s, v0.16b, v7.16b\n" ".inst 0x4e87a452 // smmla v18.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49a // smmla v26.4s, v4.16b, v7.16b\n" - "ldr q7, [x28, #0x60]\n" + "ldr q7, [x9, #0x60]\n" ".inst 0x4e86a40e // smmla v14.4s, v0.16b, v6.16b\n" ".inst 0x4e86a456 // smmla v22.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49e // smmla v30.4s, v4.16b, v6.16b\n" - "ldr q6, [x28, #0x70]\n" - "add x28, x28, #0x80\n" + "ldr q6, [x9, #0x70]\n" ".inst 0x4e87a40b // smmla v11.4s, v0.16b, v7.16b\n" + "add x9, x9, #0x80\n" ".inst 0x4e87a453 // smmla v19.4s, v2.16b, v7.16b\n" ".inst 0x4e87a49b // smmla v27.4s, v4.16b, v7.16b\n" ".inst 0x4e86a40f // smmla v15.4s, v0.16b, v6.16b\n" ".inst 0x4e86a457 // smmla v23.4s, v2.16b, v6.16b\n" ".inst 0x4e86a49f // smmla v31.4s, v4.16b, v6.16b\n" "161:" // Height 6: Multiply loop: No odd multiplies - "ldr w19, [%x[args_ptr], %[offsetof_num_strings]]\n" - "add x27, x27, #0x1\n" - "cmp x27, x19\n" + "ldr w20, [%x[args_ptr], %[offsetof_num_strings]]\n" + "add x28, x28, #0x1\n" + "cmp x28, x20\n" "bne 149b\n" + "ldr q0, [x14, #0x0]\n" + "ldr q1, [x14, #0x10]\n" "uzp1 v7.2d, v8.2d, v12.2d\n" - "ldr x19, [%x[args_ptr], %[offsetof_output_offset]]\n" "uzp2 v8.2d, v8.2d, v12.2d\n" - "prfm pstl1keep, [x9, #0x0]\n" - "add x23, x9, x19\n" + "ldr q2, [x14, #0x20]\n" + "ldr q3, [x14, #0x30]\n" "uzp1 v12.2d, v9.2d, v13.2d\n" - "ldr q0, [x11, #0x0]\n" "uzp2 v9.2d, v9.2d, v13.2d\n" - "prfm pstl1keep, [x23, #0x0]\n" - "add x22, x23, x19\n" + "ldr x20, [%x[args_ptr], %[offsetof_output_offset]]\n" + "add x24, x11, x20\n" + "add x23, x24, x20\n" "uzp1 v13.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x22, #0x0]\n" - "add x21, x22, x19\n" "uzp2 v10.2d, v10.2d, v14.2d\n" - "prfm pstl1keep, [x21, #0x0]\n" - "add x20, x21, x19\n" "uzp1 v14.2d, v11.2d, v15.2d\n" - "prfm pstl1keep, [x20, #0x0]\n" - "add x19, x20, x19\n" + "add x22, x23, x20\n" + "add x21, x22, x20\n" "uzp2 v11.2d, v11.2d, v15.2d\n" - "prfm pstl1keep, [x19, #0x0]\n" "uzp1 v15.2d, v16.2d, v20.2d\n" - "ldr q1, [x11, #0x10]\n" + "add x20, x21, x20\n" + "prfm pstl1keep, [x11, #0x0]\n" "uzp2 v16.2d, v16.2d, v20.2d\n" - "ldr q2, [x11, #0x20]\n" "uzp1 v20.2d, v17.2d, v21.2d\n" - "ldr q3, [x11, #0x30]\n" - "add x11, x11, #0x40\n" + "prfm pstl1keep, [x24, #0x0]\n" + "prfm pstl1keep, [x23, #0x0]\n" "uzp2 v17.2d, v17.2d, v21.2d\n" "uzp1 v21.2d, v18.2d, v22.2d\n" + "prfm pstl1keep, [x22, #0x0]\n" + "prfm pstl1keep, [x21, #0x0]\n" "uzp2 v18.2d, v18.2d, v22.2d\n" "uzp1 v22.2d, v19.2d, v23.2d\n" + "prfm pstl1keep, [x20, #0x0]\n" + "add x14, x14, #0x40\n" "uzp2 v19.2d, v19.2d, v23.2d\n" "uzp1 v23.2d, v24.2d, v28.2d\n" "uzp2 v24.2d, v24.2d, v28.2d\n" @@ -3250,20 +3238,20 @@ void a64_hybrid_s8qs_mmla_6x16 ( "ldr q2, [x12, #0x20]\n" "ldr q6, [x13, #0x20]\n" "ldr q3, [x12, #0x30]\n" - "add x12, x12, #0x40\n" "ldr q7, [x13, #0x30]\n" + "add x12, x12, #0x40\n" "add x13, x13, #0x40\n" "b 163f\n" "162:" // Height 6: per layer parameters - "add x24, %x[qp], %[per_layer_right_shift]\n" - "ld1r { v0.4s }, [x24]\n" + "add x25, %x[qp], %[per_layer_right_shift]\n" + "ld1r { v0.4s }, [x25]\n" + "add x25, %x[qp], %[per_layer_mul]\n" + "ld1r { v4.4s }, [x25]\n" "mov v1.16b, v0.16b\n" - "add x24, %x[qp], %[per_layer_mul]\n" - "ld1r { v4.4s }, [x24]\n" - "mov v2.16b, v0.16b\n" - "mov v3.16b, v0.16b\n" "mov v5.16b, v4.16b\n" + "mov v2.16b, v0.16b\n" "mov v6.16b, v4.16b\n" + "mov v3.16b, v0.16b\n" "mov v7.16b, v4.16b\n" "163:" // Height 6: parameters loaded "sqrdmulh v31.4s, v31.4s, v4.4s\n" @@ -3294,183 +3282,183 @@ void a64_hybrid_s8qs_mmla_6x16 ( "and v4.16b, v31.16b, v0.16b\n" "and v5.16b, v12.16b, v1.16b\n" "and v6.16b, v13.16b, v2.16b\n" + "and v7.16b, v14.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v31.4s, v31.4s, v4.4s\n" "sqadd v12.4s, v12.4s, v5.4s\n" "sqadd v13.4s, v13.4s, v6.4s\n" - "and v7.16b, v14.16b, v3.16b\n" + "sqadd v14.4s, v14.4s, v7.4s\n" "and v4.16b, v8.16b, v0.16b\n" "and v5.16b, v9.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v14.4s, v14.4s, v7.4s\n" - "sqadd v8.4s, v8.4s, v4.4s\n" - "sqadd v9.4s, v9.4s, v5.4s\n" "and v6.16b, v10.16b, v2.16b\n" "and v7.16b, v11.16b, v3.16b\n" - "and v4.16b, v15.16b, v0.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" + "sqadd v8.4s, v8.4s, v4.4s\n" + "sqadd v9.4s, v9.4s, v5.4s\n" "sqadd v10.4s, v10.4s, v6.4s\n" "sqadd v11.4s, v11.4s, v7.4s\n" - "sqadd v15.4s, v15.4s, v4.4s\n" + "and v4.16b, v15.16b, v0.16b\n" "and v5.16b, v20.16b, v1.16b\n" "and v6.16b, v21.16b, v2.16b\n" "and v7.16b, v22.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v15.4s, v15.4s, v4.4s\n" "sqadd v20.4s, v20.4s, v5.4s\n" "sqadd v21.4s, v21.4s, v6.4s\n" "sqadd v22.4s, v22.4s, v7.4s\n" "and v4.16b, v16.16b, v0.16b\n" "and v5.16b, v17.16b, v1.16b\n" "and v6.16b, v18.16b, v2.16b\n" + "and v7.16b, v19.16b, v3.16b\n" "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" + "sshr v7.4s, v7.4s, #0x1f\n" "sqadd v16.4s, v16.4s, v4.4s\n" "sqadd v17.4s, v17.4s, v5.4s\n" "sqadd v18.4s, v18.4s, v6.4s\n" - "and v7.16b, v19.16b, v3.16b\n" + "sqadd v19.4s, v19.4s, v7.4s\n" "and v4.16b, v23.16b, v0.16b\n" "and v5.16b, v28.16b, v1.16b\n" - "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" - "sshr v5.4s, v5.4s, #0x1f\n" - "sqadd v19.4s, v19.4s, v7.4s\n" - "sqadd v23.4s, v23.4s, v4.4s\n" - "sqadd v28.4s, v28.4s, v5.4s\n" "and v6.16b, v29.16b, v2.16b\n" "and v7.16b, v30.16b, v3.16b\n" - "and v4.16b, v24.16b, v0.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" + "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" - "sshr v4.4s, v4.4s, #0x1f\n" + "sqadd v23.4s, v23.4s, v4.4s\n" + "sqadd v28.4s, v28.4s, v5.4s\n" "sqadd v29.4s, v29.4s, v6.4s\n" "sqadd v30.4s, v30.4s, v7.4s\n" - "sqadd v24.4s, v24.4s, v4.4s\n" + "and v4.16b, v24.16b, v0.16b\n" "and v5.16b, v25.16b, v1.16b\n" "and v6.16b, v26.16b, v2.16b\n" "and v7.16b, v27.16b, v3.16b\n" + "sshr v4.4s, v4.4s, #0x1f\n" "sshr v5.4s, v5.4s, #0x1f\n" "sshr v6.4s, v6.4s, #0x1f\n" "sshr v7.4s, v7.4s, #0x1f\n" + "sqadd v24.4s, v24.4s, v4.4s\n" "sqadd v25.4s, v25.4s, v5.4s\n" "sqadd v26.4s, v26.4s, v6.4s\n" "sqadd v27.4s, v27.4s, v7.4s\n" "164:" // Height 6: no shift correction + "add x25, %x[qp], %[c_offset]\n" + "ld1r { v4.4s }, [x25]\n" "srshl v31.4s, v31.4s, v0.4s\n" - "add x24, %x[qp], %[c_offset]\n" - "ld1r { v4.4s }, [x24]\n" "srshl v12.4s, v12.4s, v1.4s\n" - "add x24, %x[qp], %[minval]\n" "srshl v13.4s, v13.4s, v2.4s\n" - "ld1r { v5.4s }, [x24]\n" - "add x24, %x[qp], %[maxval]\n" "srshl v14.4s, v14.4s, v3.4s\n" - "ld1r { v6.4s }, [x24]\n" - "cmp x10, #0x10\n" + "add x25, %x[qp], %[maxval]\n" + "ld1r { v6.4s }, [x25]\n" "srshl v8.4s, v8.4s, v0.4s\n" "srshl v9.4s, v9.4s, v1.4s\n" + "add x25, %x[qp], %[minval]\n" + "ld1r { v5.4s }, [x25]\n" + "srshl v10.4s, v10.4s, v2.4s\n" + "srshl v11.4s, v11.4s, v3.4s\n" + "cmp x10, #0x10\n" + "srshl v15.4s, v15.4s, v0.4s\n" + "srshl v20.4s, v20.4s, v1.4s\n" + "srshl v21.4s, v21.4s, v2.4s\n" + "srshl v22.4s, v22.4s, v3.4s\n" + "srshl v16.4s, v16.4s, v0.4s\n" + "srshl v17.4s, v17.4s, v1.4s\n" + "srshl v18.4s, v18.4s, v2.4s\n" + "srshl v19.4s, v19.4s, v3.4s\n" + "srshl v23.4s, v23.4s, v0.4s\n" + "srshl v28.4s, v28.4s, v1.4s\n" + "srshl v29.4s, v29.4s, v2.4s\n" + "srshl v30.4s, v30.4s, v3.4s\n" + "srshl v24.4s, v24.4s, v0.4s\n" + "srshl v25.4s, v25.4s, v1.4s\n" + "srshl v26.4s, v26.4s, v2.4s\n" + "srshl v27.4s, v27.4s, v3.4s\n" "add v31.4s, v31.4s, v4.4s\n" "add v12.4s, v12.4s, v4.4s\n" "add v13.4s, v13.4s, v4.4s\n" - "smin v31.4s, v31.4s, v6.4s\n" - "smin v12.4s, v12.4s, v6.4s\n" - "smin v13.4s, v13.4s, v6.4s\n" - "smax v31.4s, v31.4s, v5.4s\n" - "smax v12.4s, v12.4s, v5.4s\n" - "smax v13.4s, v13.4s, v5.4s\n" "add v14.4s, v14.4s, v4.4s\n" "add v8.4s, v8.4s, v4.4s\n" "add v9.4s, v9.4s, v4.4s\n" - "smin v14.4s, v14.4s, v6.4s\n" - "smin v8.4s, v8.4s, v6.4s\n" - "smin v9.4s, v9.4s, v6.4s\n" - "smax v14.4s, v14.4s, v5.4s\n" - "smax v8.4s, v8.4s, v5.4s\n" - "smax v9.4s, v9.4s, v5.4s\n" - "srshl v10.4s, v10.4s, v2.4s\n" - "srshl v11.4s, v11.4s, v3.4s\n" - "srshl v15.4s, v15.4s, v0.4s\n" - "srshl v20.4s, v20.4s, v1.4s\n" "add v10.4s, v10.4s, v4.4s\n" "add v11.4s, v11.4s, v4.4s\n" "add v15.4s, v15.4s, v4.4s\n" - "smin v10.4s, v10.4s, v6.4s\n" - "smin v11.4s, v11.4s, v6.4s\n" - "smin v15.4s, v15.4s, v6.4s\n" - "smax v10.4s, v10.4s, v5.4s\n" - "smax v11.4s, v11.4s, v5.4s\n" - "smax v15.4s, v15.4s, v5.4s\n" "add v20.4s, v20.4s, v4.4s\n" - "srshl v21.4s, v21.4s, v2.4s\n" - "srshl v22.4s, v22.4s, v3.4s\n" - "smin v20.4s, v20.4s, v6.4s\n" - "srshl v16.4s, v16.4s, v0.4s\n" "add v21.4s, v21.4s, v4.4s\n" - "smax v20.4s, v20.4s, v5.4s\n" "add v22.4s, v22.4s, v4.4s\n" - "smin v21.4s, v21.4s, v6.4s\n" "add v16.4s, v16.4s, v4.4s\n" - "smin v22.4s, v22.4s, v6.4s\n" - "smax v21.4s, v21.4s, v5.4s\n" - "smin v16.4s, v16.4s, v6.4s\n" - "smax v22.4s, v22.4s, v5.4s\n" - "srshl v17.4s, v17.4s, v1.4s\n" - "smax v16.4s, v16.4s, v5.4s\n" - "srshl v18.4s, v18.4s, v2.4s\n" - "srshl v19.4s, v19.4s, v3.4s\n" "add v17.4s, v17.4s, v4.4s\n" - "srshl v23.4s, v23.4s, v0.4s\n" "add v18.4s, v18.4s, v4.4s\n" - "smin v17.4s, v17.4s, v6.4s\n" "add v19.4s, v19.4s, v4.4s\n" - "smin v18.4s, v18.4s, v6.4s\n" - "smax v17.4s, v17.4s, v5.4s\n" - "smin v19.4s, v19.4s, v6.4s\n" - "smax v18.4s, v18.4s, v5.4s\n" "add v23.4s, v23.4s, v4.4s\n" - "smax v19.4s, v19.4s, v5.4s\n" - "srshl v28.4s, v28.4s, v1.4s\n" - "smin v23.4s, v23.4s, v6.4s\n" - "srshl v29.4s, v29.4s, v2.4s\n" - "srshl v30.4s, v30.4s, v3.4s\n" - "smax v23.4s, v23.4s, v5.4s\n" "add v28.4s, v28.4s, v4.4s\n" "add v29.4s, v29.4s, v4.4s\n" "add v30.4s, v30.4s, v4.4s\n" - "smin v28.4s, v28.4s, v6.4s\n" - "smin v29.4s, v29.4s, v6.4s\n" - "smin v30.4s, v30.4s, v6.4s\n" - "smax v28.4s, v28.4s, v5.4s\n" - "smax v29.4s, v29.4s, v5.4s\n" - "smax v30.4s, v30.4s, v5.4s\n" - "srshl v24.4s, v24.4s, v0.4s\n" - "srshl v25.4s, v25.4s, v1.4s\n" - "srshl v26.4s, v26.4s, v2.4s\n" - "srshl v27.4s, v27.4s, v3.4s\n" "add v24.4s, v24.4s, v4.4s\n" "add v25.4s, v25.4s, v4.4s\n" "add v26.4s, v26.4s, v4.4s\n" + "add v27.4s, v27.4s, v4.4s\n" + "smin v31.4s, v31.4s, v6.4s\n" + "smin v12.4s, v12.4s, v6.4s\n" + "smin v13.4s, v13.4s, v6.4s\n" + "smin v14.4s, v14.4s, v6.4s\n" + "smin v8.4s, v8.4s, v6.4s\n" + "smin v9.4s, v9.4s, v6.4s\n" + "smin v10.4s, v10.4s, v6.4s\n" + "smin v11.4s, v11.4s, v6.4s\n" + "smin v15.4s, v15.4s, v6.4s\n" + "smin v20.4s, v20.4s, v6.4s\n" + "smin v21.4s, v21.4s, v6.4s\n" + "smin v22.4s, v22.4s, v6.4s\n" + "smin v16.4s, v16.4s, v6.4s\n" + "smin v17.4s, v17.4s, v6.4s\n" + "smin v18.4s, v18.4s, v6.4s\n" + "smin v19.4s, v19.4s, v6.4s\n" + "smin v23.4s, v23.4s, v6.4s\n" + "smin v28.4s, v28.4s, v6.4s\n" + "smin v29.4s, v29.4s, v6.4s\n" + "smin v30.4s, v30.4s, v6.4s\n" "smin v24.4s, v24.4s, v6.4s\n" "smin v25.4s, v25.4s, v6.4s\n" "smin v26.4s, v26.4s, v6.4s\n" + "smin v27.4s, v27.4s, v6.4s\n" + "smax v31.4s, v31.4s, v5.4s\n" + "smax v12.4s, v12.4s, v5.4s\n" + "smax v13.4s, v13.4s, v5.4s\n" + "smax v14.4s, v14.4s, v5.4s\n" + "smax v8.4s, v8.4s, v5.4s\n" + "smax v9.4s, v9.4s, v5.4s\n" + "smax v10.4s, v10.4s, v5.4s\n" + "smax v11.4s, v11.4s, v5.4s\n" + "smax v15.4s, v15.4s, v5.4s\n" + "smax v20.4s, v20.4s, v5.4s\n" + "smax v21.4s, v21.4s, v5.4s\n" + "smax v22.4s, v22.4s, v5.4s\n" + "smax v16.4s, v16.4s, v5.4s\n" + "smax v17.4s, v17.4s, v5.4s\n" + "smax v18.4s, v18.4s, v5.4s\n" + "smax v19.4s, v19.4s, v5.4s\n" + "smax v23.4s, v23.4s, v5.4s\n" + "smax v28.4s, v28.4s, v5.4s\n" + "smax v29.4s, v29.4s, v5.4s\n" + "smax v30.4s, v30.4s, v5.4s\n" "smax v24.4s, v24.4s, v5.4s\n" "smax v25.4s, v25.4s, v5.4s\n" "smax v26.4s, v26.4s, v5.4s\n" - "add v27.4s, v27.4s, v4.4s\n" + "smax v27.4s, v27.4s, v5.4s\n" "uzp1 v31.8h, v31.8h, v12.8h\n" "uzp1 v12.8h, v13.8h, v14.8h\n" - "smin v27.4s, v27.4s, v6.4s\n" "uzp1 v8.8h, v8.8h, v9.8h\n" "uzp1 v9.8h, v10.8h, v11.8h\n" - "smax v27.4s, v27.4s, v5.4s\n" "uzp1 v15.8h, v15.8h, v20.8h\n" "uzp1 v20.8h, v21.8h, v22.8h\n" "uzp1 v16.8h, v16.8h, v17.8h\n" @@ -3487,152 +3475,152 @@ void a64_hybrid_s8qs_mmla_6x16 ( "uzp1 v24.16b, v24.16b, v25.16b\n" "bge 173f\n" "tbz x10, #3, 168f\n" - "str d31, [x9], #0x8\n" - "str d8, [x23], #0x8\n" - "str d15, [x22], #0x8\n" - "str d16, [x21], #0x8\n" - "str d23, [x20], #0x8\n" - "str d24, [x19], #0x8\n" + "str d31, [x11], #0x8\n" + "str d8, [x24], #0x8\n" + "str d15, [x23], #0x8\n" + "str d16, [x22], #0x8\n" + "str d23, [x21], #0x8\n" + "str d24, [x20], #0x8\n" "tbz x10, #2, 166f\n" - "st1 { v31.s }[2], [x9], #0x4\n" - "st1 { v8.s }[2], [x23], #0x4\n" - "st1 { v15.s }[2], [x22], #0x4\n" - "st1 { v16.s }[2], [x21], #0x4\n" - "st1 { v23.s }[2], [x20], #0x4\n" - "st1 { v24.s }[2], [x19], #0x4\n" + "st1 { v31.s }[2], [x11], #0x4\n" + "st1 { v8.s }[2], [x24], #0x4\n" + "st1 { v15.s }[2], [x23], #0x4\n" + "st1 { v16.s }[2], [x22], #0x4\n" + "st1 { v23.s }[2], [x21], #0x4\n" + "st1 { v24.s }[2], [x20], #0x4\n" "tbz x10, #1, 165f\n" - "st1 { v31.h }[6], [x9], #0x2\n" - "st1 { v8.h }[6], [x23], #0x2\n" - "st1 { v15.h }[6], [x22], #0x2\n" - "st1 { v16.h }[6], [x21], #0x2\n" - "st1 { v23.h }[6], [x20], #0x2\n" - "st1 { v24.h }[6], [x19], #0x2\n" + "st1 { v31.h }[6], [x11], #0x2\n" + "st1 { v8.h }[6], [x24], #0x2\n" + "st1 { v15.h }[6], [x23], #0x2\n" + "st1 { v16.h }[6], [x22], #0x2\n" + "st1 { v23.h }[6], [x21], #0x2\n" + "st1 { v24.h }[6], [x20], #0x2\n" "tbz x10, #0, 172f\n" - "st1 { v31.b }[14], [x9]\n" - "st1 { v8.b }[14], [x23]\n" - "st1 { v15.b }[14], [x22]\n" - "st1 { v16.b }[14], [x21]\n" - "st1 { v23.b }[14], [x20]\n" - "st1 { v24.b }[14], [x19]\n" + "st1 { v31.b }[14], [x11]\n" + "st1 { v8.b }[14], [x24]\n" + "st1 { v15.b }[14], [x23]\n" + "st1 { v16.b }[14], [x22]\n" + "st1 { v23.b }[14], [x21]\n" + "st1 { v24.b }[14], [x20]\n" "b 172f\n" "165:" // Height 6: Partial direct writeback: partial_1_12 "tbz x10, #0, 172f\n" - "st1 { v31.b }[12], [x9]\n" - "st1 { v8.b }[12], [x23]\n" - "st1 { v15.b }[12], [x22]\n" - "st1 { v16.b }[12], [x21]\n" - "st1 { v23.b }[12], [x20]\n" - "st1 { v24.b }[12], [x19]\n" + "st1 { v31.b }[12], [x11]\n" + "st1 { v8.b }[12], [x24]\n" + "st1 { v15.b }[12], [x23]\n" + "st1 { v16.b }[12], [x22]\n" + "st1 { v23.b }[12], [x21]\n" + "st1 { v24.b }[12], [x20]\n" "b 172f\n" "166:" // Height 6: Partial direct writeback: partial_2_8 "tbz x10, #1, 167f\n" - "st1 { v31.h }[4], [x9], #0x2\n" - "st1 { v8.h }[4], [x23], #0x2\n" - "st1 { v15.h }[4], [x22], #0x2\n" - "st1 { v16.h }[4], [x21], #0x2\n" - "st1 { v23.h }[4], [x20], #0x2\n" - "st1 { v24.h }[4], [x19], #0x2\n" + "st1 { v31.h }[4], [x11], #0x2\n" + "st1 { v8.h }[4], [x24], #0x2\n" + "st1 { v15.h }[4], [x23], #0x2\n" + "st1 { v16.h }[4], [x22], #0x2\n" + "st1 { v23.h }[4], [x21], #0x2\n" + "st1 { v24.h }[4], [x20], #0x2\n" "tbz x10, #0, 172f\n" - "st1 { v31.b }[10], [x9]\n" - "st1 { v8.b }[10], [x23]\n" - "st1 { v15.b }[10], [x22]\n" - "st1 { v16.b }[10], [x21]\n" - "st1 { v23.b }[10], [x20]\n" - "st1 { v24.b }[10], [x19]\n" + "st1 { v31.b }[10], [x11]\n" + "st1 { v8.b }[10], [x24]\n" + "st1 { v15.b }[10], [x23]\n" + "st1 { v16.b }[10], [x22]\n" + "st1 { v23.b }[10], [x21]\n" + "st1 { v24.b }[10], [x20]\n" "b 172f\n" "167:" // Height 6: Partial direct writeback: partial_1_8 "tbz x10, #0, 172f\n" - "st1 { v31.b }[8], [x9]\n" - "st1 { v8.b }[8], [x23]\n" - "st1 { v15.b }[8], [x22]\n" - "st1 { v16.b }[8], [x21]\n" - "st1 { v23.b }[8], [x20]\n" - "st1 { v24.b }[8], [x19]\n" + "st1 { v31.b }[8], [x11]\n" + "st1 { v8.b }[8], [x24]\n" + "st1 { v15.b }[8], [x23]\n" + "st1 { v16.b }[8], [x22]\n" + "st1 { v23.b }[8], [x21]\n" + "st1 { v24.b }[8], [x20]\n" "b 172f\n" "168:" // Height 6: Partial direct writeback: partial_4_0 "tbz x10, #2, 170f\n" - "str s31, [x9], #0x4\n" - "str s8, [x23], #0x4\n" - "str s15, [x22], #0x4\n" - "str s16, [x21], #0x4\n" - "str s23, [x20], #0x4\n" - "str s24, [x19], #0x4\n" + "str s31, [x11], #0x4\n" + "str s8, [x24], #0x4\n" + "str s15, [x23], #0x4\n" + "str s16, [x22], #0x4\n" + "str s23, [x21], #0x4\n" + "str s24, [x20], #0x4\n" "tbz x10, #1, 169f\n" - "st1 { v31.h }[2], [x9], #0x2\n" - "st1 { v8.h }[2], [x23], #0x2\n" - "st1 { v15.h }[2], [x22], #0x2\n" - "st1 { v16.h }[2], [x21], #0x2\n" - "st1 { v23.h }[2], [x20], #0x2\n" - "st1 { v24.h }[2], [x19], #0x2\n" + "st1 { v31.h }[2], [x11], #0x2\n" + "st1 { v8.h }[2], [x24], #0x2\n" + "st1 { v15.h }[2], [x23], #0x2\n" + "st1 { v16.h }[2], [x22], #0x2\n" + "st1 { v23.h }[2], [x21], #0x2\n" + "st1 { v24.h }[2], [x20], #0x2\n" "tbz x10, #0, 172f\n" - "st1 { v31.b }[6], [x9]\n" - "st1 { v8.b }[6], [x23]\n" - "st1 { v15.b }[6], [x22]\n" - "st1 { v16.b }[6], [x21]\n" - "st1 { v23.b }[6], [x20]\n" - "st1 { v24.b }[6], [x19]\n" + "st1 { v31.b }[6], [x11]\n" + "st1 { v8.b }[6], [x24]\n" + "st1 { v15.b }[6], [x23]\n" + "st1 { v16.b }[6], [x22]\n" + "st1 { v23.b }[6], [x21]\n" + "st1 { v24.b }[6], [x20]\n" "b 172f\n" "169:" // Height 6: Partial direct writeback: partial_1_4 "tbz x10, #0, 172f\n" - "st1 { v31.b }[4], [x9]\n" - "st1 { v8.b }[4], [x23]\n" - "st1 { v15.b }[4], [x22]\n" - "st1 { v16.b }[4], [x21]\n" - "st1 { v23.b }[4], [x20]\n" - "st1 { v24.b }[4], [x19]\n" + "st1 { v31.b }[4], [x11]\n" + "st1 { v8.b }[4], [x24]\n" + "st1 { v15.b }[4], [x23]\n" + "st1 { v16.b }[4], [x22]\n" + "st1 { v23.b }[4], [x21]\n" + "st1 { v24.b }[4], [x20]\n" "b 172f\n" "170:" // Height 6: Partial direct writeback: partial_2_0 "tbz x10, #1, 171f\n" - "str h31, [x9], #0x2\n" - "str h8, [x23], #0x2\n" - "str h15, [x22], #0x2\n" - "str h16, [x21], #0x2\n" - "str h23, [x20], #0x2\n" - "str h24, [x19], #0x2\n" + "str h31, [x11], #0x2\n" + "str h8, [x24], #0x2\n" + "str h15, [x23], #0x2\n" + "str h16, [x22], #0x2\n" + "str h23, [x21], #0x2\n" + "str h24, [x20], #0x2\n" "tbz x10, #0, 172f\n" - "st1 { v31.b }[2], [x9]\n" - "st1 { v8.b }[2], [x23]\n" - "st1 { v15.b }[2], [x22]\n" - "st1 { v16.b }[2], [x21]\n" - "st1 { v23.b }[2], [x20]\n" - "st1 { v24.b }[2], [x19]\n" + "st1 { v31.b }[2], [x11]\n" + "st1 { v8.b }[2], [x24]\n" + "st1 { v15.b }[2], [x23]\n" + "st1 { v16.b }[2], [x22]\n" + "st1 { v23.b }[2], [x21]\n" + "st1 { v24.b }[2], [x20]\n" "b 172f\n" "171:" // Height 6: Partial direct writeback: partial_1_0 - "str b31, [x9, #0x0]\n" - "str b8, [x23, #0x0]\n" - "str b15, [x22, #0x0]\n" - "str b16, [x21, #0x0]\n" - "str b23, [x20, #0x0]\n" - "str b24, [x19, #0x0]\n" + "str b31, [x11, #0x0]\n" + "str b8, [x24, #0x0]\n" + "str b15, [x23, #0x0]\n" + "str b16, [x22, #0x0]\n" + "str b23, [x21, #0x0]\n" + "str b24, [x20, #0x0]\n" "172:" // Height 6: Partial direct writeback: Done "b 174f\n" "173:" // Height 6: Full writeback - "str q31, [x9, #0x0]\n" - "add x9, x9, #0x10\n" - "str q8, [x23, #0x0]\n" - "str q15, [x22, #0x0]\n" - "str q16, [x21, #0x0]\n" - "str q23, [x20, #0x0]\n" - "str q24, [x19, #0x0]\n" + "str q31, [x11, #0x0]\n" + "add x11, x11, #0x10\n" + "str q8, [x24, #0x0]\n" + "str q15, [x23, #0x0]\n" + "str q16, [x22, #0x0]\n" + "str q23, [x21, #0x0]\n" + "str q24, [x20, #0x0]\n" "174:" // Height 6: Writeback done "subs x10, x10, #0x10\n" "bgt 147b\n" "subs %x[M], %x[M], #0x6\n" "beq 176f\n" - "ldr x20, [%x[args_ptr], %[offsetof_input_offset]]\n" + "ldr x21, [%x[args_ptr], %[offsetof_input_offset]]\n" "tbz %x[flags], #3, 175f\n" - "add x20, x20, #0x6\n" - "str x20, [%x[args_ptr], %[offsetof_input_offset]]\n" + "add x21, x21, #0x6\n" + "str x21, [%x[args_ptr], %[offsetof_input_offset]]\n" "b 1b\n" "175:" // Update direct input - "mov x19, #0x6\n" - "madd %x[input_ptr], x19, x20, %x[input_ptr]\n" + "mov x20, #0x6\n" + "madd %x[input_ptr], x20, x21, %x[input_ptr]\n" "b 1b\n" "176:" // Exit : [M] "+&r" (M), [input_ptr] "+&r" (input_ptr), [output_ptr] "+&r" (output_ptr) : [args_ptr] "r" (&ka), [c_offset] "I" (offsetof(Requantize32, c_offset)), [col_bias] "r" (col_bias), [flags] "r" (flags), [maxval] "I" (offsetof(Requantize32, maxval)), [minval] "I" (offsetof(Requantize32, minval)), [offsetof_B_ptr] "I" (offsetof(KernelArgs, B_ptr)), [offsetof_N] "I" (offsetof(KernelArgs, N)), [offsetof_input_initial_col] "I" (offsetof(KernelArgs, input_initial_col)), [offsetof_input_offset] "I" (offsetof(KernelArgs, input_offset)), [offsetof_multiplier_ptr] "I" (offsetof(KernelArgs, multiplier_ptr)), [offsetof_num_strings] "I" (offsetof(KernelArgs, num_strings)), [offsetof_output_offset] "I" (offsetof(KernelArgs, output_offset)), [offsetof_shift_ptr] "I" (offsetof(KernelArgs, shift_ptr)), [offsetof_string_lengths] "I" (offsetof(KernelArgs, string_lengths)), [per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [qp] "r" (qp) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } |