diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp index 05edac6623..3c7213a498 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include <cstddef> #include <cstdint> -#if defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME) +#if defined(ARM_COMPUTE_ENABLE_SME) namespace arm_conv { namespace pooling { @@ -70,23 +70,23 @@ void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl( "ldr x20, [%x[args], %[offsetof_inptrs]]\n" "mov x14, #0x0\n" "ldr x13, [%x[args], %[offsetof_n_channels]]\n" - "whilelt p1.s, x15, x13\n" + "whilelt p0.s, x15, x13\n" "ldp x12, x11, [x21, #0x0]\n" "ldp x10, x9, [x21, #0x10]\n" "ldp x28, x27, [x20, #0x0]\n" - "ld1w { z30.s }, p1/Z, [x27, x15, LSL #2]\n" + "ld1w { z30.s }, p0/Z, [x27, x15, LSL #2]\n" "ldp x26, x25, [x20, #0x10]\n" - "ld1w { z29.s }, p1/Z, [x25, x15, LSL #2]\n" + "ld1w { z29.s }, p0/Z, [x25, x15, LSL #2]\n" "ldp x24, x23, [x20, #0x20]\n" - "ld1w { z28.s }, p1/Z, [x24, x15, LSL #2]\n" + "ld1w { z28.s }, p0/Z, [x24, x15, LSL #2]\n" "ldp x22, x21, [x20, #0x30]\n" - "ld1w { z27.s }, p1/Z, [x21, x15, LSL #2]\n" + "ld1w { z27.s }, p0/Z, [x21, x15, LSL #2]\n" "ldr x20, [x20, #0x40]\n" - "ld1w { z26.s }, p1/Z, [x28, x15, LSL #2]\n" - "ld1w { z25.s }, p1/Z, [x26, x15, LSL #2]\n" - "ld1w { z24.s }, p1/Z, [x23, x15, LSL #2]\n" - "ld1w { z23.s }, p1/Z, [x22, x15, LSL #2]\n" - "ld1w { z19.s }, p1/Z, [x20, x15, LSL #2]\n" + "ld1w { z26.s }, p0/Z, [x28, x15, LSL #2]\n" + "ld1w { z25.s }, p0/Z, [x26, x15, LSL #2]\n" + "ld1w { z24.s }, p0/Z, [x23, x15, LSL #2]\n" + "ld1w { z19.s }, p0/Z, [x22, x15, LSL #2]\n" + "ld1w { z23.s }, p0/Z, [x20, x15, LSL #2]\n" "incw x15\n" "whilelt p1.s, x15, x13\n" "b.none 2f\n" @@ -95,25 +95,25 @@ void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl( "movprfx z21, z28\n fmax z21.s, p2/M, z21.s, z27.s\n" "ld1w { z30.s }, p1/Z, [x27, x15, LSL #2]\n" "whilelt p0.s, x14, x13\n" - "movprfx z20, z29\n fmax z20.s, p2/M, z20.s, z26.s\n" - "movprfx z18, z25\n fmax z18.s, p2/M, z18.s, z24.s\n" + "movprfx z18, z29\n fmax z18.s, p2/M, z18.s, z26.s\n" + "movprfx z17, z25\n fmax z17.s, p2/M, z17.s, z24.s\n" "ld1w { z28.s }, p1/Z, [x24, x15, LSL #2]\n" - "movprfx z17, z29\n fmax z17.s, p2/M, z17.s, z23.s\n" - "movprfx z16, z24\n fmax z16.s, p2/M, z16.s, z19.s\n" + "movprfx z16, z29\n fmax z16.s, p2/M, z16.s, z19.s\n" + "movprfx z20, z24\n fmax z20.s, p2/M, z20.s, z23.s\n" "ld1w { z27.s }, p1/Z, [x21, x15, LSL #2]\n" "ld1w { z29.s }, p1/Z, [x25, x15, LSL #2]\n" - "movprfx z19, z22\n fmax z19.s, p2/M, z19.s, z20.s\n" - "fmax z18.s, p2/M, z18.s, z22.s\n" + "movprfx z19, z22\n fmax z19.s, p2/M, z19.s, z18.s\n" + "movprfx z18, z17\n fmax z18.s, p2/M, z18.s, z22.s\n" "ld1w { z26.s }, p1/Z, [x28, x15, LSL #2]\n" - "fmax z17.s, p2/M, z17.s, z21.s\n" - "fmax z16.s, p2/M, z16.s, z21.s\n" + "movprfx z17, z16\n fmax z17.s, p2/M, z17.s, z21.s\n" + "movprfx z16, z21\n fmax z16.s, p2/M, z16.s, z20.s\n" "ld1w { z25.s }, p1/Z, [x26, x15, LSL #2]\n" "st1w { z19.s }, p0, [x12, x14, LSL #2]\n" "ld1w { z24.s }, p1/Z, [x23, x15, LSL #2]\n" "st1w { z18.s }, p0, [x11, x14, LSL #2]\n" - "ld1w { z23.s }, p1/Z, [x22, x15, LSL #2]\n" + "ld1w { z19.s }, p1/Z, [x22, x15, LSL #2]\n" "st1w { z17.s }, p0, [x10, x14, LSL #2]\n" - "ld1w { z19.s }, p1/Z, [x20, x15, LSL #2]\n" + "ld1w { z23.s }, p1/Z, [x20, x15, LSL #2]\n" "incw x15\n" "whilelt p1.s, x15, x13\n" "st1w { z16.s }, p0, [x9, x14, LSL #2]\n" @@ -125,13 +125,13 @@ void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl( "whilelt p0.s, x14, x13\n" "movprfx z20, z29\n fmax z20.s, p2/M, z20.s, z26.s\n" "movprfx z18, z25\n fmax z18.s, p2/M, z18.s, z24.s\n" - "movprfx z17, z29\n fmax z17.s, p2/M, z17.s, z23.s\n" - "movprfx z16, z24\n fmax z16.s, p2/M, z16.s, z19.s\n" - "movprfx z19, z22\n fmax z19.s, p2/M, z19.s, z20.s\n" + "movprfx z17, z29\n fmax z17.s, p2/M, z17.s, z19.s\n" + "movprfx z19, z24\n fmax z19.s, p2/M, z19.s, z23.s\n" + "movprfx z16, z22\n fmax z16.s, p2/M, z16.s, z20.s\n" "fmax z18.s, p2/M, z18.s, z22.s\n" - "st1w { z19.s }, p0, [x12, x14, LSL #2]\n" + "st1w { z16.s }, p0, [x12, x14, LSL #2]\n" "fmax z17.s, p2/M, z17.s, z21.s\n" - "fmax z16.s, p2/M, z16.s, z21.s\n" + "movprfx z16, z21\n fmax z16.s, p2/M, z16.s, z19.s\n" "st1w { z18.s }, p0, [x11, x14, LSL #2]\n" "st1w { z17.s }, p0, [x10, x14, LSL #2]\n" "st1w { z16.s }, p0, [x9, x14, LSL #2]\n" @@ -145,4 +145,4 @@ void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME) +#endif // defined(ARM_COMPUTE_ENABLE_SME) |