diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp | 510 |
1 files changed, 214 insertions, 296 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp index 1bfe7eb09c..070270764c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include <cstddef> #include <cstdint> -#if defined(ARM_COMPUTE_ENABLE_SVE) +#if __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -100,511 +100,429 @@ void sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( __asm__ __volatile__( "ldr x19, [%x[params_struct], %[offsetof_args_outptrs]]\n" "ptrue p3.b\n" - "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n" - "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n" + "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "add x14, %x[params_struct], %[offsetof_Args_inptrs]\n" "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "cntb x14, ALL, MUL #2\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" "mov x13, #0x0\n" - "ldp x12, x11, [x19, #0x0]\n" - "cntw x10\n" - "ldp x9, x28, [x19, #0x10]\n" - "sub x27, XZR, x10\n" - "ld1w { z16.s }, p3/Z, [x16]\n" - "mov z31.d, z16.d\n" - "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" + "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "cntw x12\n" + "ldp x11, x10, [x19, #0x0]\n" + "sub x9, XZR, x12\n" + "ldp x28, x27, [x19, #0x10]\n" "whilelt p2.s, XZR, %x[n_channels]\n" - "mov z30.d, z16.d\n" - "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" - "cmp x10, %x[n_channels]\n" - "mov z29.d, z16.d\n" - "ld1w { z2.s }, p3/Z, [x16, #3, MUL VL]\n" - "mov z28.d, z16.d\n" - "ld1w { z3.s }, p3/Z, [x16, #4, MUL VL]\n" - "ld1w { z4.s }, p3/Z, [x16, #5, MUL VL]\n" - "addvl x16, x16, #6\n" - "ldp x26, x25, [x15, #0x0]\n" - "ldp x24, x23, [x15, #0x10]\n" - "ldp x20, x19, [x15, #0x20]\n" + "ld1w { z16.s }, p3/Z, [x15]\n" + "cmp x12, %x[n_channels]\n" + "ld1w { z0.s }, p3/Z, [x15, #1, MUL VL]\n" + "ld1w { z1.s }, p3/Z, [x15, #2, MUL VL]\n" + "ld1w { z2.s }, p3/Z, [x15, #3, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x15, #4, MUL VL]\n" + "ld1w { z4.s }, p3/Z, [x15, #5, MUL VL]\n" + "addvl x15, x15, #6\n" + "ldp x26, x25, [x14, #0x0]\n" + "ldp x24, x23, [x14, #0x10]\n" + "ldp x22, x21, [x14, #0x20]\n" "ld1w { z5.s }, p2/Z, [x26, x13, LSL #2]\n" - "prfm pldl1keep, [x26, x14]\n" "ld1w { z6.s }, p2/Z, [x25, x13, LSL #2]\n" - "prfm pldl1keep, [x25, x14]\n" "ld1w { z7.s }, p2/Z, [x24, x13, LSL #2]\n" - "prfm pldl1keep, [x24, x14]\n" "ld1w { z8.s }, p2/Z, [x23, x13, LSL #2]\n" - "prfm pldl1keep, [x23, x14]\n" - "ld1w { z9.s }, p2/Z, [x20, x13, LSL #2]\n" - "prfm pldl1keep, [x20, x14]\n" - "ld1w { z13.s }, p2/Z, [x19, x13, LSL #2]\n" - "prfm pldl1keep, [x19, x14]\n" - "ldp x22, x21, [x15, #0x30]\n" - "ldp x20, x19, [x15, #0x40]\n" - "ld1w { z11.s }, p2/Z, [x22, x13, LSL #2]\n" - "prfm pldl1keep, [x22, x14]\n" - "ld1w { z12.s }, p2/Z, [x21, x13, LSL #2]\n" - "prfm pldl1keep, [x21, x14]\n" - "ld1w { z10.s }, p2/Z, [x20, x13, LSL #2]\n" - "prfm pldl1keep, [x20, x14]\n" - "ld1w { z14.s }, p2/Z, [x19, x13, LSL #2]\n" - "prfm pldl1keep, [x19, x14]\n" + "ld1w { z9.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x21, x13, LSL #2]\n" + "ldp x20, x19, [x14, #0x30]\n" + "ldp x26, x25, [x14, #0x40]\n" + "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x26, x13, LSL #2]\n" + "ld1w { z14.s }, p2/Z, [x25, x13, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "fmla z31.s, p3/M, z0.s, z5.s\n" - "ldr x21, [x15, #0x50]\n" - "whilelt p1.s, x10, %x[n_channels]\n" - "fmla z30.s, p3/M, z0.s, z6.s\n" - "ldr x19, [x15, #0x58]\n" - "incw x27\n" - "fmla z29.s, p3/M, z0.s, z7.s\n" - "ldr x20, [x15, #0x60]\n" + "movprfx z31, z16\n fmla z31.s, p3/M, z0.s, z5.s\n" + "ldr x24, [x14, #0x50]\n" + "whilelt p1.s, x12, %x[n_channels]\n" + "movprfx z30, z16\n fmla z30.s, p3/M, z0.s, z6.s\n" + "ldr x23, [x14, #0x58]\n" + "incw x9\n" + "movprfx z29, z16\n fmla z29.s, p3/M, z0.s, z7.s\n" + "ldr x22, [x14, #0x60]\n" "mov p0.b, p2.b\n" - "fmla z28.s, p3/M, z0.s, z8.s\n" - "ld1w { z5.s }, p2/Z, [x21, x13, LSL #2]\n" - "prfm pldl1keep, [x21, x14]\n" + "movprfx z28, z16\n fmla z28.s, p3/M, z0.s, z8.s\n" + "ld1w { z5.s }, p2/Z, [x24, x13, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x15]\n" "fmla z31.s, p3/M, z1.s, z6.s\n" - "ld1w { z6.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z6.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z30.s, p3/M, z1.s, z9.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x21, [x14, #0x68]\n" "fmla z29.s, p3/M, z1.s, z8.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ldr x20, [x14, #0x70]\n" "fmla z28.s, p3/M, z1.s, z13.s\n" - "ld1w { z0.s }, p3/Z, [x16]\n" + "ld1w { z1.s }, p3/Z, [x15, #1, MUL VL]\n" "fmla z31.s, p3/M, z2.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z9.s }, p2/Z, [x22, x13, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z11.s\n" - "ldr x19, [x15, #0x68]\n" + "ldr x19, [x14, #0x78]\n" "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z1.s }, p3/Z, [x16, #1, MUL VL]\n" + "ldr x26, [x14, #0x80]\n" "fmla z28.s, p3/M, z2.s, z5.s\n" - "ldr x20, [x15, #0x70]\n" + "ld1w { z2.s }, p3/Z, [x15, #2, MUL VL]\n" "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z30.s, p3/M, z3.s, z12.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x25, [x14, #0x88]\n" "fmla z29.s, p3/M, z3.s, z5.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ldr x24, [x14, #0x90]\n" "fmla z28.s, p3/M, z3.s, z6.s\n" - "ld1w { z2.s }, p3/Z, [x16, #2, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x15, #3, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z9.s\n" - "ldr x19, [x15, #0x78]\n" + "ld1w { z9.s }, p2/Z, [x19, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z6.s\n" - "ld1w { z3.s }, p3/Z, [x16, #3, MUL VL]\n" + "ldr x23, [x14, #0x98]\n" "fmla z28.s, p3/M, z4.s, z10.s\n" - "ldr x26, [x15, #0x80]\n" + "ld1w { z4.s }, p3/Z, [x15, #4, MUL VL]\n" "fmla z31.s, p3/M, z0.s, z7.s\n" - "ld1w { z9.s }, p2/Z, [x19, x13, LSL #2]\n" + "ldr x22, [x14, #0xa0]\n" "fmla z30.s, p3/M, z0.s, z8.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x21, [x14, #0xa8]\n" "fmla z29.s, p3/M, z0.s, z14.s\n" - "prfm pldl1keep, [x26, x14]\n" + "ldr x20, [x14, #0xb0]\n" "fmla z28.s, p3/M, z0.s, z11.s\n" - "ld1w { z4.s }, p3/Z, [x16, #4, MUL VL]\n" + "ld1w { z0.s }, p3/Z, [x15, #5, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z8.s\n" - "ldr x25, [x15, #0x88]\n" + "ld1w { z8.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z30.s, p3/M, z1.s, z13.s\n" - "ld1w { z0.s }, p3/Z, [x16, #5, MUL VL]\n" + "ldr x19, [x14, #0xb8]\n" "fmla z29.s, p3/M, z1.s, z11.s\n" - "ldr x24, [x15, #0x90]\n" + "ldr x25, [x14, #0xc8]\n" "fmla z28.s, p3/M, z1.s, z12.s\n" - "ld1w { z8.s }, p2/Z, [x25, x13, LSL #2]\n" + "ld1w { z1.s }, p3/Z, [x15, #6, MUL VL]\n" "fmla z31.s, p3/M, z2.s, z13.s\n" "ld1w { z13.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z5.s\n" - "prfm pldl1keep, [x25, x14]\n" + "ldr x26, [x14, #0xc0]\n" "fmla z29.s, p3/M, z2.s, z12.s\n" - "prfm pldl1keep, [x24, x14]\n" "fmla z28.s, p3/M, z2.s, z9.s\n" - "ldr x23, [x15, #0x98]\n" + "ld1w { z2.s }, p3/Z, [x15, #7, MUL VL]\n" + "addvl x15, x15, #16\n" "fmla z31.s, p3/M, z3.s, z5.s\n" "ld1w { z5.s }, p2/Z, [x24, x13, LSL #2]\n" + "ldr x24, [x14, #0xd0]\n" "fmla z30.s, p3/M, z3.s, z6.s\n" - "ld1w { z1.s }, p3/Z, [x16, #6, MUL VL]\n" + "ld1w { z16.s }, p3/Z, [x15, #4, MUL VL]\n" "fmla z29.s, p3/M, z3.s, z9.s\n" - "prfm pldl1keep, [x23, x14]\n" "fmla z28.s, p3/M, z3.s, z13.s\n" - "ldr x20, [x15, #0xa0]\n" + "ld1w { z3.s }, p3/Z, [x15, #-8, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z6.s\n" "ld1w { z6.s }, p2/Z, [x23, x13, LSL #2]\n" + "ldr x23, [x14, #0xd8]\n" "fmla z30.s, p3/M, z4.s, z10.s\n" - "ld1w { z2.s }, p3/Z, [x16, #7, MUL VL]\n" + "ld1w { z10.s }, p2/Z, [x22, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z13.s\n" - "addvl x16, x16, #16\n" + "ldr x22, [x14, #0xe0]\n" "fmla z28.s, p3/M, z4.s, z8.s\n" - "ld1w { z10.s }, p2/Z, [x20, x13, LSL #2]\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z4.s }, p3/Z, [x15, #-7, MUL VL]\n" "fmla z31.s, p3/M, z0.s, z14.s\n" - "ldr x19, [x15, #0xa8]\n" + "ld1w { z14.s }, p2/Z, [x19, x13, LSL #2]\n" "fmla z30.s, p3/M, z0.s, z11.s\n" - "ld1w { z3.s }, p3/Z, [x16, #-8, MUL VL]\n" + "ldr x19, [x14, #0xf8]\n" "fmla z29.s, p3/M, z0.s, z5.s\n" - "ldr x22, [x15, #0xb0]\n" "fmla z28.s, p3/M, z0.s, z6.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ld1w { z0.s }, p3/Z, [x15, #-6, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x21, x13, LSL #2]\n" + "ldr x21, [x14, #0xe8]\n" "fmla z30.s, p3/M, z1.s, z12.s\n" - "prfm pldl1keep, [x22, x14]\n" "fmla z29.s, p3/M, z1.s, z6.s\n" - "ld1w { z4.s }, p3/Z, [x16, #-7, MUL VL]\n" "fmla z28.s, p3/M, z1.s, z10.s\n" - "ldr x21, [x15, #0xb8]\n" + "ld1w { z1.s }, p3/Z, [x15, #-5, MUL VL]\n" "fmla z31.s, p3/M, z2.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x20, x13, LSL #2]\n" + "ldr x20, [x14, #0xf0]\n" "fmla z30.s, p3/M, z2.s, z9.s\n" - "ld1w { z0.s }, p3/Z, [x16, #-6, MUL VL]\n" "fmla z29.s, p3/M, z2.s, z10.s\n" - "ld1w { z14.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z11.s\n" - "prfm pldl1keep, [x21, x14]\n" + "ld1w { z2.s }, p3/Z, [x15, #-4, MUL VL]\n" "fmla z31.s, p3/M, z3.s, z9.s\n" - "ldr x20, [x15, #0xc0]\n" + "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" + "ldr x26, [x14, #0x100]\n" "fmla z30.s, p3/M, z3.s, z13.s\n" - "ldr x19, [x15, #0xc8]\n" "fmla z29.s, p3/M, z3.s, z11.s\n" - "ld1w { z1.s }, p3/Z, [x16, #-5, MUL VL]\n" "fmla z28.s, p3/M, z3.s, z12.s\n" - "ld1w { z9.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z3.s }, p3/Z, [x15, #-3, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z13.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" + "ldr x25, [x14, #0x108]\n" "fmla z30.s, p3/M, z4.s, z8.s\n" - "ld1w { z13.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z8.s }, p2/Z, [x22, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z12.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z28.s, p3/M, z4.s, z14.s\n" - "ldr x21, [x15, #0xd0]\n" + "ld1w { z4.s }, p3/Z, [x15, #-2, MUL VL]\n" "fmla z31.s, p3/M, z0.s, z5.s\n" - "ld1w { z2.s }, p3/Z, [x16, #-4, MUL VL]\n" + "ld1w { z5.s }, p2/Z, [x24, x13, LSL #2]\n" + "ldr x24, [x14, #0x110]\n" "fmla z30.s, p3/M, z0.s, z6.s\n" - "ldr x19, [x15, #0xd8]\n" "fmla z29.s, p3/M, z0.s, z9.s\n" - "ld1w { z5.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z28.s, p3/M, z0.s, z13.s\n" - "prfm pldl1keep, [x21, x14]\n" + "ld1w { z0.s }, p3/Z, [x15, #-1, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z6.s\n" - "ld1w { z6.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z6.s }, p2/Z, [x23, x13, LSL #2]\n" + "ldr x23, [x14, #0x118]\n" "fmla z30.s, p3/M, z1.s, z10.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z29.s, p3/M, z1.s, z13.s\n" - "ld1w { z3.s }, p3/Z, [x16, #-3, MUL VL]\n" "fmla z28.s, p3/M, z1.s, z5.s\n" - "ldr x20, [x15, #0xe0]\n" + "ld1w { z1.s }, p3/Z, [x15]\n" "fmla z31.s, p3/M, z2.s, z10.s\n" - "ld1w { z4.s }, p3/Z, [x16, #-2, MUL VL]\n" + "ld1w { z10.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z11.s\n" - "ldr x19, [x15, #0xe8]\n" "fmla z29.s, p3/M, z2.s, z5.s\n" - "ld1w { z8.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z6.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z2.s }, p3/Z, [x15, #1, MUL VL]\n" "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z10.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z30.s, p3/M, z3.s, z12.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z29.s, p3/M, z3.s, z6.s\n" - "ld1w { z0.s }, p3/Z, [x16, #-1, MUL VL]\n" "fmla z28.s, p3/M, z3.s, z8.s\n" - "ldr x20, [x15, #0xf0]\n" + "ld1w { z3.s }, p3/Z, [x15, #2, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z12.s\n" - "ldr x19, [x15, #0xf8]\n" + "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z14.s\n" - "ld1w { z1.s }, p3/Z, [x16]\n" "fmla z29.s, p3/M, z4.s, z8.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z28.s, p3/M, z4.s, z10.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z4.s }, p3/Z, [x15, #3, MUL VL]\n" "fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z30.s, p3/M, z0.s, z13.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z29.s, p3/M, z0.s, z11.s\n" - "ldr x26, [x15, #0x100]\n" + "ld1w { z11.s }, p2/Z, [x25, x13, LSL #2]\n" + "ldp x26, x25, [x14, #0x0]\n" "fmla z28.s, p3/M, z0.s, z12.s\n" - "ld1w { z2.s }, p3/Z, [x16, #1, MUL VL]\n" + "ld1w { z0.s }, p3/Z, [x15, #5, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z13.s\n" - "ldr x25, [x15, #0x108]\n" "fmla z30.s, p3/M, z1.s, z5.s\n" - "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "prfm pldl1keep, [x26, x14]\n" + "ld1w { z12.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z28.s, p3/M, z1.s, z9.s\n" - "ld1w { z11.s }, p2/Z, [x25, x13, LSL #2]\n" + "ld1w { z1.s }, p3/Z, [x15, #6, MUL VL]\n" "fmla z31.s, p3/M, z2.s, z5.s\n" - "prfm pldl1keep, [x25, x14]\n" + "ld1w { z5.s }, p1/Z, [x26, x12, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z6.s\n" - "ld1w { z3.s }, p3/Z, [x16, #2, MUL VL]\n" "fmla z29.s, p3/M, z2.s, z9.s\n" - "ldr x24, [x15, #0x110]\n" - "ld1w { z4.s }, p3/Z, [x16, #3, MUL VL]\n" + "ld1w { z9.s }, p2/Z, [x23, x13, LSL #2]\n" + "incw x13\n" "fmla z28.s, p3/M, z2.s, z11.s\n" - "ldr x23, [x15, #0x118]\n" + "ldp x24, x23, [x14, #0x10]\n" + "whilelt p2.s, x13, %x[n_channels]\n" "fmla z31.s, p3/M, z3.s, z6.s\n" + "ld1w { z6.s }, p1/Z, [x25, x12, LSL #2]\n" + "ldp x22, x21, [x14, #0x20]\n" "fmla z30.s, p3/M, z3.s, z8.s\n" - "ld1w { z12.s }, p2/Z, [x24, x13, LSL #2]\n" + "ldp x20, x19, [x14, #0x30]\n" "fmla z29.s, p3/M, z3.s, z11.s\n" - "prfm pldl1keep, [x24, x14]\n" - "ld1w { z9.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z7.s }, p1/Z, [x24, x12, LSL #2]\n" "fmla z28.s, p3/M, z3.s, z12.s\n" - "prfm pldl1keep, [x23, x14]\n" - "incw x13\n" + "ld1w { z13.s }, p1/Z, [x21, x12, LSL #2]\n" "fmla z31.s, p3/M, z4.s, z8.s\n" - "ldp x26, x25, [x15, #0x0]\n" - "whilelt p2.s, x13, %x[n_channels]\n" + "ld1w { z8.s }, p1/Z, [x23, x12, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z10.s\n" - "ldp x24, x23, [x15, #0x10]\n" - "addvl x14, x14, #1\n" + "ld1w { z11.s }, p1/Z, [x20, x12, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z12.s\n" - "ldp x20, x19, [x15, #0x20]\n" - "ldp x22, x21, [x15, #0x30]\n" + "ld1w { z12.s }, p1/Z, [x19, x12, LSL #2]\n" "fmla z28.s, p3/M, z4.s, z9.s\n" - "ld1w { z5.s }, p1/Z, [x26, x10, LSL #2]\n" + "ld1w { z9.s }, p1/Z, [x22, x12, LSL #2]\n" "fmax z31.s, p3/M, z31.s, z18.s\n" - "prfm pldl1keep, [x26, x14]\n" + "ldp x26, x25, [x14, #0x40]\n" "fmax z30.s, p3/M, z30.s, z18.s\n" - "ld1w { z6.s }, p1/Z, [x25, x10, LSL #2]\n" + "ld1w { z2.s }, p3/Z, [x15, #7, MUL VL]\n" "fmax z29.s, p3/M, z29.s, z18.s\n" - "prfm pldl1keep, [x25, x14]\n" + "addvl x15, x15, #16\n" "fmax z28.s, p3/M, z28.s, z18.s\n" - "ld1w { z7.s }, p1/Z, [x24, x10, LSL #2]\n" + "ld1w { z10.s }, p1/Z, [x26, x12, LSL #2]\n" + "ld1w { z14.s }, p1/Z, [x25, x12, LSL #2]\n" "fmin z31.s, p3/M, z31.s, z17.s\n" - "prfm pldl1keep, [x24, x14]\n" + "incw x12\n" "fmin z30.s, p3/M, z30.s, z17.s\n" - "ld1w { z8.s }, p1/Z, [x23, x10, LSL #2]\n" + "ld1w { z3.s }, p3/Z, [x15, #-8, MUL VL]\n" + "cmp x12, %x[n_channels]\n" "fmin z29.s, p3/M, z29.s, z17.s\n" - "prfm pldl1keep, [x23, x14]\n" + "ld1w { z4.s }, p3/Z, [x15, #-7, MUL VL]\n" + "addvl x15, x15, #-6\n" "fmin z28.s, p3/M, z28.s, z17.s\n" - "ld1w { z9.s }, p1/Z, [x20, x10, LSL #2]\n" - "prfm pldl1keep, [x20, x14]\n" - "ld1w { z13.s }, p1/Z, [x19, x10, LSL #2]\n" - "prfm pldl1keep, [x19, x14]\n" - "ld1w { z11.s }, p1/Z, [x22, x10, LSL #2]\n" - "prfm pldl1keep, [x22, x14]\n" - "ld1w { z12.s }, p1/Z, [x21, x10, LSL #2]\n" - "prfm pldl1keep, [x21, x14]\n" - "ldp x20, x19, [x15, #0x40]\n" - "st1w { z31.s }, p0, [x12, x27, LSL #2]\n" - "st1w { z30.s }, p0, [x11, x27, LSL #2]\n" - "ld1w { z10.s }, p1/Z, [x20, x10, LSL #2]\n" - "prfm pldl1keep, [x20, x14]\n" - "ld1w { z14.s }, p1/Z, [x19, x10, LSL #2]\n" - "incw x10\n" - "prfm pldl1keep, [x19, x14]\n" - "cmp x10, %x[n_channels]\n" - "st1w { z29.s }, p0, [x9, x27, LSL #2]\n" - "st1w { z28.s }, p0, [x28, x27, LSL #2]\n" - "ld1w { z16.s }, p3/Z, [x16, #4, MUL VL]\n" - "mov z31.d, z16.d\n" - "ld1w { z0.s }, p3/Z, [x16, #5, MUL VL]\n" - "mov z30.d, z16.d\n" - "ld1w { z1.s }, p3/Z, [x16, #6, MUL VL]\n" - "mov z29.d, z16.d\n" - "ld1w { z2.s }, p3/Z, [x16, #7, MUL VL]\n" - "addvl x16, x16, #16\n" - "mov z28.d, z16.d\n" - "ld1w { z3.s }, p3/Z, [x16, #-8, MUL VL]\n" - "ld1w { z4.s }, p3/Z, [x16, #-7, MUL VL]\n" - "addvl x16, x16, #-6\n" + "st1w { z31.s }, p0, [x11, x9, LSL #2]\n" + "st1w { z30.s }, p0, [x10, x9, LSL #2]\n" + "st1w { z29.s }, p0, [x28, x9, LSL #2]\n" + "st1w { z28.s }, p0, [x27, x9, LSL #2]\n" "blt 1b\n" "2:" // Channel tail - "fmla z31.s, p3/M, z0.s, z5.s\n" - "ldr x21, [x15, #0x50]\n" - "incw x27\n" - "fmla z30.s, p3/M, z0.s, z6.s\n" - "ldr x19, [x15, #0x58]\n" + "movprfx z31, z16\n fmla z31.s, p3/M, z0.s, z5.s\n" + "ldr x24, [x14, #0x50]\n" + "incw x9\n" + "movprfx z30, z16\n fmla z30.s, p3/M, z0.s, z6.s\n" + "ldr x23, [x14, #0x58]\n" "mov p0.b, p2.b\n" - "fmla z29.s, p3/M, z0.s, z7.s\n" - "ldr x20, [x15, #0x60]\n" - "fmla z28.s, p3/M, z0.s, z8.s\n" - "ld1w { z5.s }, p2/Z, [x21, x13, LSL #2]\n" - "prfm pldl1keep, [x21, x14]\n" + "movprfx z29, z16\n fmla z29.s, p3/M, z0.s, z7.s\n" + "ldr x22, [x14, #0x60]\n" + "movprfx z28, z16\n fmla z28.s, p3/M, z0.s, z8.s\n" + "ld1w { z5.s }, p2/Z, [x24, x13, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x15]\n" "fmla z31.s, p3/M, z1.s, z6.s\n" - "ld1w { z6.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z6.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z30.s, p3/M, z1.s, z9.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x21, [x14, #0x68]\n" "fmla z29.s, p3/M, z1.s, z8.s\n" "fmla z28.s, p3/M, z1.s, z13.s\n" - "prfm pldl1keep, [x20, x14]\n" - "ld1w { z0.s }, p3/Z, [x16]\n" + "ld1w { z1.s }, p3/Z, [x15, #1, MUL VL]\n" + "ldr x20, [x14, #0x70]\n" "fmla z31.s, p3/M, z2.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z9.s }, p2/Z, [x22, x13, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z11.s\n" - "ldr x19, [x15, #0x68]\n" + "ldr x19, [x14, #0x78]\n" "fmla z29.s, p3/M, z2.s, z13.s\n" "fmla z28.s, p3/M, z2.s, z5.s\n" - "ld1w { z1.s }, p3/Z, [x16, #1, MUL VL]\n" - "ldr x20, [x15, #0x70]\n" + "ld1w { z2.s }, p3/Z, [x15, #2, MUL VL]\n" + "ldr x26, [x14, #0x80]\n" "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z30.s, p3/M, z3.s, z12.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x25, [x14, #0x88]\n" "fmla z29.s, p3/M, z3.s, z5.s\n" "fmla z28.s, p3/M, z3.s, z6.s\n" - "prfm pldl1keep, [x20, x14]\n" - "ld1w { z2.s }, p3/Z, [x16, #2, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x15, #3, MUL VL]\n" + "ldr x24, [x14, #0x90]\n" "fmla z31.s, p3/M, z4.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z9.s\n" - "ldr x19, [x15, #0x78]\n" + "ld1w { z9.s }, p2/Z, [x19, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z6.s\n" "fmla z28.s, p3/M, z4.s, z10.s\n" - "ld1w { z3.s }, p3/Z, [x16, #3, MUL VL]\n" - "ldr x26, [x15, #0x80]\n" + "ld1w { z4.s }, p3/Z, [x15, #4, MUL VL]\n" + "ldr x23, [x14, #0x98]\n" "fmla z31.s, p3/M, z0.s, z7.s\n" - "ld1w { z9.s }, p2/Z, [x19, x13, LSL #2]\n" + "ldr x22, [x14, #0xa0]\n" "fmla z30.s, p3/M, z0.s, z8.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x21, [x14, #0xa8]\n" "fmla z29.s, p3/M, z0.s, z14.s\n" "fmla z28.s, p3/M, z0.s, z11.s\n" - "prfm pldl1keep, [x26, x14]\n" - "ld1w { z4.s }, p3/Z, [x16, #4, MUL VL]\n" + "ld1w { z0.s }, p3/Z, [x15, #5, MUL VL]\n" + "ldr x20, [x14, #0xb0]\n" "fmla z31.s, p3/M, z1.s, z8.s\n" - "ldr x25, [x15, #0x88]\n" + "ld1w { z8.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z30.s, p3/M, z1.s, z13.s\n" - "ld1w { z0.s }, p3/Z, [x16, #5, MUL VL]\n" + "ldr x19, [x14, #0xb8]\n" "fmla z29.s, p3/M, z1.s, z11.s\n" "fmla z28.s, p3/M, z1.s, z12.s\n" - "ld1w { z8.s }, p2/Z, [x25, x13, LSL #2]\n" - "prfm pldl1keep, [x25, x14]\n" + "ld1w { z1.s }, p3/Z, [x15, #6, MUL VL]\n" + "ldr x25, [x14, #0xc8]\n" "fmla z31.s, p3/M, z2.s, z13.s\n" "ld1w { z13.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z5.s\n" - "ldr x24, [x15, #0x90]\n" + "ldr x26, [x14, #0xc0]\n" "fmla z29.s, p3/M, z2.s, z12.s\n" "fmla z28.s, p3/M, z2.s, z9.s\n" - "ldr x23, [x15, #0x98]\n" - "ld1w { z1.s }, p3/Z, [x16, #6, MUL VL]\n" + "ld1w { z2.s }, p3/Z, [x15, #7, MUL VL]\n" + "addvl x15, x15, #16\n" "fmla z31.s, p3/M, z3.s, z5.s\n" "ld1w { z5.s }, p2/Z, [x24, x13, LSL #2]\n" + "ldr x24, [x14, #0xd0]\n" "fmla z30.s, p3/M, z3.s, z6.s\n" - "prfm pldl1keep, [x24, x14]\n" "fmla z29.s, p3/M, z3.s, z9.s\n" "fmla z28.s, p3/M, z3.s, z13.s\n" - "prfm pldl1keep, [x23, x14]\n" - "ldr x20, [x15, #0xa0]\n" + "ld1w { z3.s }, p3/Z, [x15, #-8, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z6.s\n" "ld1w { z6.s }, p2/Z, [x23, x13, LSL #2]\n" + "ldr x23, [x14, #0xd8]\n" "fmla z30.s, p3/M, z4.s, z10.s\n" - "ld1w { z2.s }, p3/Z, [x16, #7, MUL VL]\n" + "ld1w { z10.s }, p2/Z, [x22, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z13.s\n" - "addvl x16, x16, #16\n" "fmla z28.s, p3/M, z4.s, z8.s\n" - "ld1w { z10.s }, p2/Z, [x20, x13, LSL #2]\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z4.s }, p3/Z, [x15, #-7, MUL VL]\n" + "ldr x22, [x14, #0xe0]\n" "fmla z31.s, p3/M, z0.s, z14.s\n" - "ldr x19, [x15, #0xa8]\n" + "ld1w { z14.s }, p2/Z, [x19, x13, LSL #2]\n" "fmla z30.s, p3/M, z0.s, z11.s\n" - "ld1w { z3.s }, p3/Z, [x16, #-8, MUL VL]\n" + "ldr x19, [x14, #0xf8]\n" "fmla z29.s, p3/M, z0.s, z5.s\n" - "ldr x22, [x15, #0xb0]\n" "fmla z28.s, p3/M, z0.s, z6.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ld1w { z0.s }, p3/Z, [x15, #-6, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x21, x13, LSL #2]\n" + "ldr x21, [x14, #0xe8]\n" "fmla z30.s, p3/M, z1.s, z12.s\n" - "prfm pldl1keep, [x22, x14]\n" "fmla z29.s, p3/M, z1.s, z6.s\n" - "ld1w { z4.s }, p3/Z, [x16, #-7, MUL VL]\n" "fmla z28.s, p3/M, z1.s, z10.s\n" - "ldr x21, [x15, #0xb8]\n" + "ld1w { z1.s }, p3/Z, [x15, #-5, MUL VL]\n" "fmla z31.s, p3/M, z2.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x20, x13, LSL #2]\n" + "ldr x20, [x14, #0xf0]\n" "fmla z30.s, p3/M, z2.s, z9.s\n" - "ld1w { z0.s }, p3/Z, [x16, #-6, MUL VL]\n" "fmla z29.s, p3/M, z2.s, z10.s\n" - "ld1w { z14.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z11.s\n" - "prfm pldl1keep, [x21, x14]\n" + "ld1w { z2.s }, p3/Z, [x15, #-4, MUL VL]\n" "fmla z31.s, p3/M, z3.s, z9.s\n" - "ldr x20, [x15, #0xc0]\n" + "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" + "ldr x26, [x14, #0x100]\n" "fmla z30.s, p3/M, z3.s, z13.s\n" - "ldr x19, [x15, #0xc8]\n" "fmla z29.s, p3/M, z3.s, z11.s\n" - "ld1w { z1.s }, p3/Z, [x16, #-5, MUL VL]\n" "fmla z28.s, p3/M, z3.s, z12.s\n" - "ld1w { z9.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z3.s }, p3/Z, [x15, #-3, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z13.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" + "ldr x25, [x14, #0x108]\n" "fmla z30.s, p3/M, z4.s, z8.s\n" - "ld1w { z13.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z8.s }, p2/Z, [x22, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z12.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z28.s, p3/M, z4.s, z14.s\n" - "ldr x21, [x15, #0xd0]\n" + "ld1w { z4.s }, p3/Z, [x15, #-2, MUL VL]\n" "fmla z31.s, p3/M, z0.s, z5.s\n" - "ld1w { z2.s }, p3/Z, [x16, #-4, MUL VL]\n" + "ld1w { z5.s }, p2/Z, [x24, x13, LSL #2]\n" + "ldr x24, [x14, #0x110]\n" "fmla z30.s, p3/M, z0.s, z6.s\n" - "ldr x19, [x15, #0xd8]\n" "fmla z29.s, p3/M, z0.s, z9.s\n" - "ld1w { z5.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z28.s, p3/M, z0.s, z13.s\n" - "prfm pldl1keep, [x21, x14]\n" + "ld1w { z0.s }, p3/Z, [x15, #-1, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z6.s\n" - "ld1w { z6.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z6.s }, p2/Z, [x23, x13, LSL #2]\n" + "ldr x23, [x14, #0x118]\n" "fmla z30.s, p3/M, z1.s, z10.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z29.s, p3/M, z1.s, z13.s\n" - "ld1w { z3.s }, p3/Z, [x16, #-3, MUL VL]\n" "fmla z28.s, p3/M, z1.s, z5.s\n" - "ldr x20, [x15, #0xe0]\n" + "ld1w { z1.s }, p3/Z, [x15]\n" "fmla z31.s, p3/M, z2.s, z10.s\n" - "ld1w { z4.s }, p3/Z, [x16, #-2, MUL VL]\n" + "ld1w { z10.s }, p2/Z, [x21, x13, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z11.s\n" - "ldr x19, [x15, #0xe8]\n" "fmla z29.s, p3/M, z2.s, z5.s\n" - "ld1w { z8.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z6.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z2.s }, p3/Z, [x15, #1, MUL VL]\n" "fmla z31.s, p3/M, z3.s, z11.s\n" - "ld1w { z10.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z30.s, p3/M, z3.s, z12.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z29.s, p3/M, z3.s, z6.s\n" - "ld1w { z0.s }, p3/Z, [x16, #-1, MUL VL]\n" "fmla z28.s, p3/M, z3.s, z8.s\n" - "ldr x20, [x15, #0xf0]\n" + "ld1w { z3.s }, p3/Z, [x15, #2, MUL VL]\n" "fmla z31.s, p3/M, z4.s, z12.s\n" - "ldr x19, [x15, #0xf8]\n" + "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z14.s\n" - "ld1w { z1.s }, p3/Z, [x16]\n" "fmla z29.s, p3/M, z4.s, z8.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" "fmla z28.s, p3/M, z4.s, z10.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ld1w { z4.s }, p3/Z, [x15, #3, MUL VL]\n" "fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z12.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z30.s, p3/M, z0.s, z13.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z29.s, p3/M, z0.s, z11.s\n" - "ldr x26, [x15, #0x100]\n" + "ld1w { z11.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z28.s, p3/M, z0.s, z12.s\n" - "ld1w { z2.s }, p3/Z, [x16, #1, MUL VL]\n" "fmla z31.s, p3/M, z1.s, z13.s\n" - "ldr x25, [x15, #0x108]\n" "fmla z30.s, p3/M, z1.s, z5.s\n" - "ld1w { z9.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "prfm pldl1keep, [x26, x14]\n" + "ld1w { z12.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z28.s, p3/M, z1.s, z9.s\n" - "ld1w { z11.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z31.s, p3/M, z2.s, z5.s\n" - "prfm pldl1keep, [x25, x14]\n" "fmla z30.s, p3/M, z2.s, z6.s\n" - "ld1w { z3.s }, p3/Z, [x16, #2, MUL VL]\n" "fmla z29.s, p3/M, z2.s, z9.s\n" - "ldr x24, [x15, #0x110]\n" - "ld1w { z4.s }, p3/Z, [x16, #3, MUL VL]\n" + "ld1w { z9.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z11.s\n" - "ldr x23, [x15, #0x118]\n" "fmla z31.s, p3/M, z3.s, z6.s\n" "fmla z30.s, p3/M, z3.s, z8.s\n" - "ld1w { z12.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z29.s, p3/M, z3.s, z11.s\n" - "prfm pldl1keep, [x24, x14]\n" - "ld1w { z9.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z28.s, p3/M, z3.s, z12.s\n" - "prfm pldl1keep, [x23, x14]\n" "fmla z31.s, p3/M, z4.s, z8.s\n" "fmla z30.s, p3/M, z4.s, z10.s\n" "fmla z29.s, p3/M, z4.s, z12.s\n" @@ -612,22 +530,22 @@ void sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( "fmax z31.s, p3/M, z31.s, z18.s\n" "fmax z30.s, p3/M, z30.s, z18.s\n" "fmax z29.s, p3/M, z29.s, z18.s\n" + "fmax z28.s, p3/M, z28.s, z18.s\n" "fmin z31.s, p3/M, z31.s, z17.s\n" - "st1w { z31.s }, p0, [x12, x27, LSL #2]\n" + "st1w { z31.s }, p0, [x11, x9, LSL #2]\n" "fmin z30.s, p3/M, z30.s, z17.s\n" "fmin z29.s, p3/M, z29.s, z17.s\n" - "st1w { z30.s }, p0, [x11, x27, LSL #2]\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" - "st1w { z29.s }, p0, [x9, x27, LSL #2]\n" + "st1w { z30.s }, p0, [x10, x9, LSL #2]\n" "fmin z28.s, p3/M, z28.s, z17.s\n" - "st1w { z28.s }, p0, [x28, x27, LSL #2]\n" + "st1w { z29.s }, p0, [x28, x9, LSL #2]\n" + "st1w { z28.s }, p0, [x27, x9, LSL #2]\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z16", "z17", "z18", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z16", "z17", "z18", "z28", "z29", "z30", "z31" ); } } // namespace depthwise } // namespace arm_conv -#endif // defined(ARM_COMPUTE_ENABLE_SVE) +#endif // __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) |