diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp | 330 |
1 files changed, 165 insertions, 165 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp index eb6c2daa97..98427701fa 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include <cstddef> #include <cstdint> -#if __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -96,7 +96,7 @@ void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ldp x11, x10, [x20, #0x10]\n" "mov x9, #0x0\n" "whilelt p2.s, XZR, %x[n_channels]\n" - "ld1w { z19.s }, p3/Z, [x16]\n" + "ld1w { z20.s }, p3/Z, [x16]\n" "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" "cmp x14, %x[n_channels]\n" "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" @@ -111,8 +111,8 @@ void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ldp x25, x24, [x15, #0x10]\n" "ldp x23, x22, [x15, #0x20]\n" "ldp x21, x20, [x15, #0x30]\n" - "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "ld1rw { z26.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "ld1rw { z25.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" "ld1w { z7.s }, p3/Z, [x16, #-8, MUL VL]\n" "ld1w { z8.s }, p3/Z, [x16, #-7, MUL VL]\n" "addvl x16, x16, #-6\n" @@ -126,89 +126,89 @@ void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n" - "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n" - "ldr x27, [x15, #0x40]\n" - "ldr x26, [x15, #0x48]\n" - "fmla z28.s, p3/M, z0.s, z10.s\n" - "fmla z29.s, p3/M, z1.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x26, x9, LSL #2]\n" - "ldr x25, [x15, #0x50]\n" - "fmla z28.s, p3/M, z1.s, z11.s\n" - "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x27, x9, LSL #2]\n" - "ld1w { z13.s }, p2/Z, [x25, x9, LSL #2]\n" - "fmla z28.s, p3/M, z3.s, z14.s\n" - "fmla z29.s, p3/M, z0.s, z16.s\n" - "ldr x24, [x15, #0x58]\n" - "ldr x20, [x15, #0x78]\n" - "fmla z28.s, p3/M, z4.s, z15.s\n" - "fmla z29.s, p3/M, z4.s, z11.s\n" - "ld1w { z14.s }, p2/Z, [x24, x9, LSL #2]\n" - "ldr x23, [x15, #0x60]\n" - "fmla z28.s, p3/M, z2.s, z16.s\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "ldr x27, [x15, #0x80]\n" - "ld1w { z15.s }, p2/Z, [x23, x9, LSL #2]\n" - "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n" - "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z12.s }, p2/Z, [x27, x9, LSL #2]\n" - "ldr x22, [x15, #0x68]\n" - "fmla z28.s, p3/M, z5.s, z13.s\n" - "fmla z29.s, p3/M, z3.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x20, x9, LSL #2]\n" - "ldr x26, [x15, #0x88]\n" - "fmla z30.s, p3/M, z3.s, z14.s\n" - "fmla z31.s, p3/M, z4.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x22, x9, LSL #2]\n" - "ld1w { z14.s }, p2/Z, [x26, x9, LSL #2]\n" - "fmla z30.s, p3/M, z0.s, z15.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" + "movprfx z24, z20\n fmla z24.s, p3/M, z8.s, z9.s\n" + "movprfx z23, z20\n fmla z23.s, p3/M, z6.s, z9.s\n" + "ldr x21, [x15, #0x40]\n" + "ldr x20, [x15, #0x48]\n" + "fmla z24.s, p3/M, z0.s, z10.s\n" + "fmla z23.s, p3/M, z1.s, z12.s\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x20, [x15, #0x50]\n" + "fmla z24.s, p3/M, z1.s, z11.s\n" + "fmla z23.s, p3/M, z2.s, z13.s\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z19.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z24.s, p3/M, z3.s, z14.s\n" + "fmla z23.s, p3/M, z0.s, z16.s\n" + "ldr x20, [x15, #0x58]\n" + "ldr x22, [x15, #0x78]\n" + "fmla z24.s, p3/M, z4.s, z15.s\n" + "fmla z23.s, p3/M, z4.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x15, #0x60]\n" + "fmla z24.s, p3/M, z2.s, z16.s\n" + "fmla z23.s, p3/M, z5.s, z18.s\n" + "ldr x20, [x15, #0x80]\n" + "ld1w { z18.s }, p2/Z, [x21, x9, LSL #2]\n" + "movprfx z22, z20\n fmla z22.s, p3/M, z2.s, z9.s\n" + "movprfx z21, z20\n fmla z21.s, p3/M, z0.s, z9.s\n" + "ld1w { z20.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x15, #0x68]\n" + "fmla z24.s, p3/M, z5.s, z19.s\n" + "fmla z23.s, p3/M, z3.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x22, x9, LSL #2]\n" + "ldr x20, [x15, #0x88]\n" + "fmla z22.s, p3/M, z3.s, z17.s\n" + "fmla z21.s, p3/M, z4.s, z16.s\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z0.s, z18.s\n" + "fmla z21.s, p3/M, z1.s, z20.s\n" "ldr x21, [x15, #0x70]\n" - "ldr x24, [x15, #0x98]\n" - "fmla z30.s, p3/M, z4.s, z11.s\n" - "fmla z31.s, p3/M, z5.s, z14.s\n" + "ldr x20, [x15, #0x98]\n" + "fmla z22.s, p3/M, z4.s, z17.s\n" + "fmla z21.s, p3/M, z5.s, z16.s\n" "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" - "ld1w { z11.s }, p2/Z, [x24, x9, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z15.s\n" - "ldr x25, [x15, #0x90]\n" - "ldr x22, [x15, #0xa8]\n" - "fmla z30.s, p3/M, z1.s, z16.s\n" - "fmla z31.s, p3/M, z2.s, z11.s\n" - "fmla z28.s, p3/M, z7.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x25, x9, LSL #2]\n" - "ld1w { z16.s }, p2/Z, [x22, x9, LSL #2]\n" - "ldr x23, [x15, #0xa0]\n" - "ldr x21, [x15, #0xb0]\n" - "fmla z30.s, p3/M, z6.s, z15.s\n" - "fmla z31.s, p3/M, z3.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x23, x9, LSL #2]\n" - "ld1w { z14.s }, p2/Z, [x21, x9, LSL #2]\n" - "fmla z30.s, p3/M, z7.s, z13.s\n" - "fmla z31.s, p3/M, z7.s, z14.s\n" + "ld1w { z19.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z24.s, p3/M, z6.s, z18.s\n" + "ldr x21, [x15, #0x90]\n" + "ldr x20, [x15, #0xa8]\n" + "fmla z22.s, p3/M, z1.s, z16.s\n" + "fmla z21.s, p3/M, z2.s, z19.s\n" + "fmla z24.s, p3/M, z7.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x15, #0xa0]\n" + "ldr x20, [x15, #0xb0]\n" + "fmla z22.s, p3/M, z6.s, z16.s\n" + "fmla z21.s, p3/M, z3.s, z18.s\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z7.s, z17.s\n" + "fmla z21.s, p3/M, z7.s, z16.s\n" "ldr x20, [x15, #0xb8]\n" - "fmla z29.s, p3/M, z7.s, z12.s\n" - "ld1w { z15.s }, p2/Z, [x20, x9, LSL #2]\n" - "fmla z30.s, p3/M, z5.s, z16.s\n" - "ldr x27, [x15, #0xc0]\n" - "fmla z31.s, p3/M, z6.s, z15.s\n" - "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x27, x9, LSL #2]\n" - "fmla z30.s, p3/M, z8.s, z15.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" + "fmla z23.s, p3/M, z7.s, z20.s\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z5.s, z18.s\n" + "ldr x20, [x15, #0xc0]\n" + "fmla z21.s, p3/M, z6.s, z17.s\n" + "fmla z23.s, p3/M, z8.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z8.s, z17.s\n" + "fmla z21.s, p3/M, z8.s, z16.s\n" "whilelt p1.s, x14, %x[n_channels]\n" "ldp x27, x26, [x15, #0x0]\n" "ldp x25, x24, [x15, #0x10]\n" "ldp x23, x22, [x15, #0x20]\n" "incw x9\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" + "fmax z24.s, p3/M, z24.s, z26.s\n" "ldp x21, x20, [x15, #0x30]\n" "ld1w { z9.s }, p1/Z, [x27, x14, LSL #2]\n" - "fmax z29.s, p3/M, z29.s, z18.s\n" - "fmax z30.s, p3/M, z30.s, z18.s\n" + "fmax z23.s, p3/M, z23.s, z26.s\n" + "fmax z22.s, p3/M, z22.s, z26.s\n" "ld1w { z10.s }, p1/Z, [x26, x14, LSL #2]\n" "ld1w { z11.s }, p1/Z, [x25, x14, LSL #2]\n" - "fmax z31.s, p3/M, z31.s, z18.s\n" + "fmax z21.s, p3/M, z21.s, z26.s\n" "incw x28\n" "ld1w { z12.s }, p1/Z, [x24, x14, LSL #2]\n" "ld1w { z13.s }, p1/Z, [x23, x14, LSL #2]\n" @@ -216,122 +216,122 @@ void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "whilelt p2.s, x9, %x[n_channels]\n" "ld1w { z14.s }, p1/Z, [x22, x14, LSL #2]\n" "ld1w { z15.s }, p1/Z, [x21, x14, LSL #2]\n" - "fmin z28.s, p3/M, z28.s, z17.s\n" - "fmin z29.s, p3/M, z29.s, z17.s\n" + "fmin z24.s, p3/M, z24.s, z25.s\n" + "fmin z23.s, p3/M, z23.s, z25.s\n" "ld1w { z16.s }, p1/Z, [x20, x14, LSL #2]\n" "incw x14\n" - "ld1w { z19.s }, p3/Z, [x16]\n" + "ld1w { z20.s }, p3/Z, [x16]\n" "cmp x14, %x[n_channels]\n" "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" - "fmin z30.s, p3/M, z30.s, z17.s\n" - "fmin z31.s, p3/M, z31.s, z17.s\n" + "fmin z22.s, p3/M, z22.s, z25.s\n" + "fmin z21.s, p3/M, z21.s, z25.s\n" "ld1w { z2.s }, p3/Z, [x16, #3, MUL VL]\n" "ld1w { z3.s }, p3/Z, [x16, #4, MUL VL]\n" - "st1w { z28.s }, p0, [x13, x28, LSL #2]\n" + "st1w { z24.s }, p0, [x13, x28, LSL #2]\n" "ld1w { z4.s }, p3/Z, [x16, #5, MUL VL]\n" "ld1w { z5.s }, p3/Z, [x16, #6, MUL VL]\n" - "st1w { z29.s }, p0, [x12, x28, LSL #2]\n" + "st1w { z23.s }, p0, [x12, x28, LSL #2]\n" "ld1w { z6.s }, p3/Z, [x16, #7, MUL VL]\n" "addvl x16, x16, #16\n" - "st1w { z30.s }, p0, [x11, x28, LSL #2]\n" + "st1w { z22.s }, p0, [x11, x28, LSL #2]\n" "ld1w { z7.s }, p3/Z, [x16, #-8, MUL VL]\n" - "st1w { z31.s }, p0, [x10, x28, LSL #2]\n" + "st1w { z21.s }, p0, [x10, x28, LSL #2]\n" "ld1w { z8.s }, p3/Z, [x16, #-7, MUL VL]\n" "addvl x16, x16, #-6\n" "blt 1b\n" "2:" // Channel tail - "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n" - "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n" - "ldr x27, [x15, #0x40]\n" - "ldr x26, [x15, #0x48]\n" - "fmla z28.s, p3/M, z0.s, z10.s\n" - "fmla z29.s, p3/M, z1.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x26, x9, LSL #2]\n" - "ldr x25, [x15, #0x50]\n" - "fmla z28.s, p3/M, z1.s, z11.s\n" - "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x27, x9, LSL #2]\n" - "ld1w { z13.s }, p2/Z, [x25, x9, LSL #2]\n" - "fmla z28.s, p3/M, z3.s, z14.s\n" - "fmla z29.s, p3/M, z0.s, z16.s\n" - "ldr x24, [x15, #0x58]\n" - "ldr x20, [x15, #0x78]\n" - "fmla z28.s, p3/M, z4.s, z15.s\n" - "fmla z29.s, p3/M, z4.s, z11.s\n" - "ld1w { z14.s }, p2/Z, [x24, x9, LSL #2]\n" - "ldr x23, [x15, #0x60]\n" - "fmla z28.s, p3/M, z2.s, z16.s\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "ldr x27, [x15, #0x80]\n" - "ld1w { z15.s }, p2/Z, [x23, x9, LSL #2]\n" - "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n" - "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z12.s }, p2/Z, [x27, x9, LSL #2]\n" - "ldr x22, [x15, #0x68]\n" - "fmla z28.s, p3/M, z5.s, z13.s\n" - "fmla z29.s, p3/M, z3.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x20, x9, LSL #2]\n" - "ldr x26, [x15, #0x88]\n" - "fmla z30.s, p3/M, z3.s, z14.s\n" - "fmla z31.s, p3/M, z4.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x22, x9, LSL #2]\n" - "ld1w { z14.s }, p2/Z, [x26, x9, LSL #2]\n" - "fmla z30.s, p3/M, z0.s, z15.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" + "movprfx z24, z20\n fmla z24.s, p3/M, z8.s, z9.s\n" + "movprfx z23, z20\n fmla z23.s, p3/M, z6.s, z9.s\n" + "ldr x21, [x15, #0x40]\n" + "ldr x20, [x15, #0x48]\n" + "fmla z24.s, p3/M, z0.s, z10.s\n" + "fmla z23.s, p3/M, z1.s, z12.s\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x20, [x15, #0x50]\n" + "fmla z24.s, p3/M, z1.s, z11.s\n" + "fmla z23.s, p3/M, z2.s, z13.s\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z19.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z24.s, p3/M, z3.s, z14.s\n" + "fmla z23.s, p3/M, z0.s, z16.s\n" + "ldr x20, [x15, #0x58]\n" + "ldr x22, [x15, #0x78]\n" + "fmla z24.s, p3/M, z4.s, z15.s\n" + "fmla z23.s, p3/M, z4.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x15, #0x60]\n" + "fmla z24.s, p3/M, z2.s, z16.s\n" + "fmla z23.s, p3/M, z5.s, z18.s\n" + "ldr x20, [x15, #0x80]\n" + "ld1w { z18.s }, p2/Z, [x21, x9, LSL #2]\n" + "movprfx z22, z20\n fmla z22.s, p3/M, z2.s, z9.s\n" + "movprfx z21, z20\n fmla z21.s, p3/M, z0.s, z9.s\n" + "ld1w { z20.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x15, #0x68]\n" + "fmla z24.s, p3/M, z5.s, z19.s\n" + "fmla z23.s, p3/M, z3.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x22, x9, LSL #2]\n" + "ldr x20, [x15, #0x88]\n" + "fmla z22.s, p3/M, z3.s, z17.s\n" + "fmla z21.s, p3/M, z4.s, z16.s\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z0.s, z18.s\n" + "fmla z21.s, p3/M, z1.s, z20.s\n" "ldr x21, [x15, #0x70]\n" - "ldr x24, [x15, #0x98]\n" - "fmla z30.s, p3/M, z4.s, z11.s\n" - "fmla z31.s, p3/M, z5.s, z14.s\n" + "ldr x20, [x15, #0x98]\n" + "fmla z22.s, p3/M, z4.s, z17.s\n" + "fmla z21.s, p3/M, z5.s, z16.s\n" "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" - "ld1w { z11.s }, p2/Z, [x24, x9, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z15.s\n" - "ldr x25, [x15, #0x90]\n" - "ldr x22, [x15, #0xa8]\n" - "fmla z30.s, p3/M, z1.s, z16.s\n" - "fmla z31.s, p3/M, z2.s, z11.s\n" - "fmla z28.s, p3/M, z7.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x25, x9, LSL #2]\n" - "ld1w { z16.s }, p2/Z, [x22, x9, LSL #2]\n" - "ldr x23, [x15, #0xa0]\n" - "ldr x21, [x15, #0xb0]\n" - "fmla z30.s, p3/M, z6.s, z15.s\n" - "fmla z31.s, p3/M, z3.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x23, x9, LSL #2]\n" - "ld1w { z14.s }, p2/Z, [x21, x9, LSL #2]\n" - "fmla z30.s, p3/M, z7.s, z13.s\n" - "fmla z31.s, p3/M, z7.s, z14.s\n" + "ld1w { z19.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z24.s, p3/M, z6.s, z18.s\n" + "ldr x21, [x15, #0x90]\n" + "ldr x20, [x15, #0xa8]\n" + "fmla z22.s, p3/M, z1.s, z16.s\n" + "fmla z21.s, p3/M, z2.s, z19.s\n" + "fmla z24.s, p3/M, z7.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x15, #0xa0]\n" + "ldr x20, [x15, #0xb0]\n" + "fmla z22.s, p3/M, z6.s, z16.s\n" + "fmla z21.s, p3/M, z3.s, z18.s\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z7.s, z17.s\n" + "fmla z21.s, p3/M, z7.s, z16.s\n" "ldr x20, [x15, #0xb8]\n" - "fmla z29.s, p3/M, z7.s, z12.s\n" - "ld1w { z15.s }, p2/Z, [x20, x9, LSL #2]\n" - "fmla z30.s, p3/M, z5.s, z16.s\n" - "ldr x27, [x15, #0xc0]\n" - "fmla z31.s, p3/M, z6.s, z15.s\n" - "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x27, x9, LSL #2]\n" - "fmla z30.s, p3/M, z8.s, z15.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" + "fmla z23.s, p3/M, z7.s, z20.s\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z5.s, z18.s\n" + "ldr x20, [x15, #0xc0]\n" + "fmla z21.s, p3/M, z6.s, z17.s\n" + "fmla z23.s, p3/M, z8.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z22.s, p3/M, z8.s, z17.s\n" + "fmla z21.s, p3/M, z8.s, z16.s\n" "incw x28\n" "mov p0.b, p2.b\n" - "fmax z28.s, p3/M, z28.s, z18.s\n" - "fmax z29.s, p3/M, z29.s, z18.s\n" - "fmax z30.s, p3/M, z30.s, z18.s\n" - "fmax z31.s, p3/M, z31.s, z18.s\n" - "fmin z28.s, p3/M, z28.s, z17.s\n" - "fmin z29.s, p3/M, z29.s, z17.s\n" - "st1w { z28.s }, p0, [x13, x28, LSL #2]\n" - "fmin z30.s, p3/M, z30.s, z17.s\n" - "fmin z31.s, p3/M, z31.s, z17.s\n" - "st1w { z29.s }, p0, [x12, x28, LSL #2]\n" - "st1w { z30.s }, p0, [x11, x28, LSL #2]\n" - "st1w { z31.s }, p0, [x10, x28, LSL #2]\n" + "fmax z24.s, p3/M, z24.s, z26.s\n" + "fmax z23.s, p3/M, z23.s, z26.s\n" + "fmax z22.s, p3/M, z22.s, z26.s\n" + "fmax z21.s, p3/M, z21.s, z26.s\n" + "fmin z24.s, p3/M, z24.s, z25.s\n" + "fmin z23.s, p3/M, z23.s, z25.s\n" + "st1w { z24.s }, p0, [x13, x28, LSL #2]\n" + "fmin z22.s, p3/M, z22.s, z25.s\n" + "fmin z21.s, p3/M, z21.s, z25.s\n" + "st1w { z23.s }, p0, [x12, x28, LSL #2]\n" + "st1w { z22.s }, p0, [x11, x28, LSL #2]\n" + "st1w { z21.s }, p0, [x10, x28, LSL #2]\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26" ); } } // namespace depthwise } // namespace arm_conv -#endif // __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) |