diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp | 362 |
1 files changed, 181 insertions, 181 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp index 5380567d36..8ec7bcca7e 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2023 Arm Limited. + * Copyright (c) 2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -94,131 +94,131 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "mov x3, #0x0\n" "1:" // Tile loop "str x2, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "mov x22, #0x4\n" + "mov x21, #0x4\n" "str x3, [%x[params_struct], %[offsetof_args_tile_j]]\n" - "ldr x21, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" - "mul x20, x2, x21\n" // offset = tile_i * ld_input_row + "ldr x20, [%x[params_struct], %[offsetof_args_ld_input_row]]\n" + "mul x19, x2, x20\n" // offset = tile_i * ld_input_row "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n" - "madd x20, x3, x4, x20\n" // offset += tile_j * ld_input_col - "mul x20, x20, x22\n" // offset *= kernel_stride * output_size + "madd x19, x3, x4, x19\n" // offset += tile_j * ld_input_col + "mul x19, x19, x21\n" // offset *= kernel_stride * output_size "ldr x5, [%x[params_struct], %[offsetof_args_inptr]]\n" - "add x5, x5, x20, LSL #2\n" // inptr[0] += offset * sizeof(float) - "add x6, x5, x21, LSL #2\n" - "add x7, x6, x21, LSL #2\n" + "add x5, x5, x19, LSL #2\n" // inptr[0] += offset * sizeof(float) + "add x6, x5, x20, LSL #2\n" + "add x7, x6, x20, LSL #2\n" "add x8, x4, x4\n" "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n" - "add x16, x7, x21, LSL #2\n" + "add x16, x7, x20, LSL #2\n" "add x15, x8, x4\n" - "add x14, x16, x21, LSL #2\n" + "add x14, x16, x20, LSL #2\n" "add x13, x15, x4\n" - "add x12, x14, x21, LSL #2\n" + "add x12, x14, x20, LSL #2\n" "add x11, x13, x4\n" "cbnz x3, 2f\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "sub x21, x20, x3\n" - "sub x21, x21, #0x1\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" + "sub x20, x19, x3\n" + "sub x20, x20, #0x1\n" "lsl x10, %x[n_channels], #0x2\n" - "mov x20, #0x10\n" - "and x21, x21, #0x3fffff\n" - "mul x20, x20, x4\n" - "orr x10, x10, x21, LSL #22\n" - "orr x10, x10, x20, LSL #38\n" - "add x9, x7, x8, LSL #2\n" - "add x28, x5, x11, LSL #2\n" - "add x27, x7, x15, LSL #2\n" - "add x26, x12, x11, LSL #2\n" - "add x25, x16, x8, LSL #2\n" - "add x24, x5, x4, LSL #2\n" - "add x23, x5, x13, LSL #2\n" - "add x22, x16, x15, LSL #2\n" - "add x21, x6, x11, LSL #2\n" - "add x20, x6, x8, LSL #2\n" - ".inst 0xf8aa493a // rprfm pldonce, x10, [x9]\n" - "add x9, x14, x11, LSL #2\n" - ".inst 0xf8aa48ba // rprfm pldonce, x10, [x5]\n" - ".inst 0xf8aa4b9a // rprfm pldonce, x10, [x28]\n" - "add x28, x6, x15, LSL #2\n" - ".inst 0xf8aa4b7a // rprfm pldonce, x10, [x27]\n" - "add x27, x12, x4, LSL #2\n" - ".inst 0xf8aa499a // rprfm pldonce, x10, [x12]\n" - ".inst 0xf8aa4b5a // rprfm pldonce, x10, [x26]\n" - "add x26, x7, x4, LSL #2\n" - ".inst 0xf8aa4b3a // rprfm pldonce, x10, [x25]\n" - "add x25, x12, x13, LSL #2\n" - ".inst 0xf8aa4b1a // rprfm pldonce, x10, [x24]\n" - "add x24, x7, x13, LSL #2\n" - ".inst 0xf8aa4afa // rprfm pldonce, x10, [x23]\n" - "add x23, x5, x8, LSL #2\n" - ".inst 0xf8aa4ada // rprfm pldonce, x10, [x22]\n" - "add x22, x16, x4, LSL #2\n" - ".inst 0xf8aa48da // rprfm pldonce, x10, [x6]\n" - ".inst 0xf8aa4aba // rprfm pldonce, x10, [x21]\n" - "add x21, x5, x15, LSL #2\n" - ".inst 0xf8aa49da // rprfm pldonce, x10, [x14]\n" - ".inst 0xf8aa4a9a // rprfm pldonce, x10, [x20]\n" - "add x20, x16, x13, LSL #2\n" - ".inst 0xf8aa493a // rprfm pldonce, x10, [x9]\n" - "add x9, x7, x11, LSL #2\n" - ".inst 0xf8aa4b9a // rprfm pldonce, x10, [x28]\n" - "add x28, x14, x8, LSL #2\n" - ".inst 0xf8aa4b7a // rprfm pldonce, x10, [x27]\n" - "add x27, x16, x11, LSL #2\n" - ".inst 0xf8aa4b5a // rprfm pldonce, x10, [x26]\n" - "add x26, x12, x8, LSL #2\n" - ".inst 0xf8aa4b3a // rprfm pldonce, x10, [x25]\n" - "add x25, x14, x15, LSL #2\n" - ".inst 0xf8aa4b1a // rprfm pldonce, x10, [x24]\n" - "add x24, x12, x15, LSL #2\n" - ".inst 0xf8aa4afa // rprfm pldonce, x10, [x23]\n" - "add x23, x6, x4, LSL #2\n" - ".inst 0xf8aa4ada // rprfm pldonce, x10, [x22]\n" - "add x22, x6, x13, LSL #2\n" - ".inst 0xf8aa4aba // rprfm pldonce, x10, [x21]\n" - "add x21, x14, x4, LSL #2\n" - ".inst 0xf8aa48fa // rprfm pldonce, x10, [x7]\n" - ".inst 0xf8aa4a9a // rprfm pldonce, x10, [x20]\n" - "add x20, x14, x13, LSL #2\n" - ".inst 0xf8aa493a // rprfm pldonce, x10, [x9]\n" - ".inst 0xf8aa4a1a // rprfm pldonce, x10, [x16]\n" - ".inst 0xf8aa4b9a // rprfm pldonce, x10, [x28]\n" - ".inst 0xf8aa4b7a // rprfm pldonce, x10, [x27]\n" - ".inst 0xf8aa4b5a // rprfm pldonce, x10, [x26]\n" - ".inst 0xf8aa4b3a // rprfm pldonce, x10, [x25]\n" - ".inst 0xf8aa4b1a // rprfm pldonce, x10, [x24]\n" - ".inst 0xf8aa4afa // rprfm pldonce, x10, [x23]\n" - ".inst 0xf8aa4ada // rprfm pldonce, x10, [x22]\n" - ".inst 0xf8aa4aba // rprfm pldonce, x10, [x21]\n" - ".inst 0xf8aa4a9a // rprfm pldonce, x10, [x20]\n" + "mov x19, #0x10\n" + "and x20, x20, #0x3fffff\n" + "mul x19, x19, x4\n" + "orr x10, x10, x20, LSL #22\n" + "orr x10, x10, x19, LSL #38\n" + "add x26, x7, x8, LSL #2\n" + "add x25, x5, x11, LSL #2\n" + "add x24, x7, x15, LSL #2\n" + "add x23, x12, x11, LSL #2\n" + "add x22, x16, x8, LSL #2\n" + "add x21, x5, x4, LSL #2\n" + "add x20, x5, x13, LSL #2\n" + "add x19, x16, x15, LSL #2\n" + "add x9, x6, x11, LSL #2\n" + "add x28, x6, x8, LSL #2\n" + "add x27, x14, x11, LSL #2\n" + ".inst 0xf8aa4b5a // rprfm pldonce, x26, [x10]\n" + "add x26, x6, x15, LSL #2\n" + ".inst 0xf8aa48ba // rprfm pldonce, x5, [x10]\n" + ".inst 0xf8aa4b3a // rprfm pldonce, x25, [x10]\n" + "add x25, x12, x4, LSL #2\n" + ".inst 0xf8aa4b1a // rprfm pldonce, x24, [x10]\n" + "add x24, x7, x4, LSL #2\n" + ".inst 0xf8aa499a // rprfm pldonce, x12, [x10]\n" + ".inst 0xf8aa4afa // rprfm pldonce, x23, [x10]\n" + "add x23, x12, x13, LSL #2\n" + ".inst 0xf8aa4ada // rprfm pldonce, x22, [x10]\n" + "add x22, x7, x13, LSL #2\n" + ".inst 0xf8aa4aba // rprfm pldonce, x21, [x10]\n" + "add x21, x5, x8, LSL #2\n" + ".inst 0xf8aa4a9a // rprfm pldonce, x20, [x10]\n" + "add x20, x16, x4, LSL #2\n" + ".inst 0xf8aa4a7a // rprfm pldonce, x19, [x10]\n" + "add x19, x5, x15, LSL #2\n" + ".inst 0xf8aa48da // rprfm pldonce, x6, [x10]\n" + ".inst 0xf8aa493a // rprfm pldonce, x9, [x10]\n" + "add x9, x16, x13, LSL #2\n" + ".inst 0xf8aa49da // rprfm pldonce, x14, [x10]\n" + ".inst 0xf8aa4b9a // rprfm pldonce, x28, [x10]\n" + "add x28, x7, x11, LSL #2\n" + ".inst 0xf8aa4b7a // rprfm pldonce, x27, [x10]\n" + "add x27, x14, x8, LSL #2\n" + ".inst 0xf8aa4b5a // rprfm pldonce, x26, [x10]\n" + "add x26, x16, x11, LSL #2\n" + ".inst 0xf8aa4b3a // rprfm pldonce, x25, [x10]\n" + "add x25, x12, x8, LSL #2\n" + ".inst 0xf8aa4b1a // rprfm pldonce, x24, [x10]\n" + "add x24, x14, x15, LSL #2\n" + ".inst 0xf8aa4afa // rprfm pldonce, x23, [x10]\n" + "add x23, x12, x15, LSL #2\n" + ".inst 0xf8aa4ada // rprfm pldonce, x22, [x10]\n" + "add x22, x6, x4, LSL #2\n" + ".inst 0xf8aa4aba // rprfm pldonce, x21, [x10]\n" + "add x21, x6, x13, LSL #2\n" + ".inst 0xf8aa4a9a // rprfm pldonce, x20, [x10]\n" + "add x20, x14, x4, LSL #2\n" + ".inst 0xf8aa4a7a // rprfm pldonce, x19, [x10]\n" + "add x19, x14, x13, LSL #2\n" + ".inst 0xf8aa48fa // rprfm pldonce, x7, [x10]\n" + ".inst 0xf8aa493a // rprfm pldonce, x9, [x10]\n" + ".inst 0xf8aa4b9a // rprfm pldonce, x28, [x10]\n" + ".inst 0xf8aa4a1a // rprfm pldonce, x16, [x10]\n" + ".inst 0xf8aa4b7a // rprfm pldonce, x27, [x10]\n" + ".inst 0xf8aa4b5a // rprfm pldonce, x26, [x10]\n" + ".inst 0xf8aa4b3a // rprfm pldonce, x25, [x10]\n" + ".inst 0xf8aa4b1a // rprfm pldonce, x24, [x10]\n" + ".inst 0xf8aa4afa // rprfm pldonce, x23, [x10]\n" + ".inst 0xf8aa4ada // rprfm pldonce, x22, [x10]\n" + ".inst 0xf8aa4aba // rprfm pldonce, x21, [x10]\n" + ".inst 0xf8aa4a9a // rprfm pldonce, x20, [x10]\n" + ".inst 0xf8aa4a7a // rprfm pldonce, x19, [x10]\n" "2:" // Tile loop: Prefetch input rows: End - "ldr x22, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" - "mul x21, x2, x22\n" // offset = tile_i * ld_output_row - "mov x20, #0x4\n" + "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" + "mul x20, x2, x21\n" // offset = tile_i * ld_output_row + "mov x19, #0x4\n" "ld1w { z15.s }, p3/Z, [x17]\n" - "ldr x9, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" - "madd x21, x3, x9, x21\n" // offset += tile_j * ld_output_col - "mul x21, x21, x20\n" // offset *= output_tile_size + "ldr x28, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" + "madd x20, x3, x28, x20\n" // offset += tile_j * ld_output_col + "mul x20, x20, x19\n" // offset *= output_tile_size "ld1rw { z14.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "ldr x28, [%x[params_struct], %[offsetof_args_outptr]]\n" - "add x28, x28, x21, LSL #2\n" // outptrs[0] += offset * sizeof(float) + "ldr x27, [%x[params_struct], %[offsetof_args_outptr]]\n" + "add x27, x27, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float) "addvl x17, x17, #1\n" ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n" - "add x27, x28, x22, LSL #2\n" - "cntw x26\n" + "add x26, x27, x21, LSL #2\n" + "cntw x25\n" "ld1rw { z13.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" "addvl x17, x17, #4\n" - "add x25, x27, x22, LSL #2\n" + "add x24, x26, x21, LSL #2\n" ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n" - "add x24, x9, x9\n" + "add x23, x28, x28\n" "whilelt p2.s, XZR, %x[n_channels]\n" "ld1w { z9.s }, p2/Z, [x7, x8, LSL #2]\n" "addvl x17, x17, #4\n" - "cmp x26, %x[n_channels]\n" + "cmp x25, %x[n_channels]\n" "ld1w { z8.s }, p3/Z, [x17]\n" - "add x23, x25, x22, LSL #2\n" - "add x22, x24, x9\n" + "add x22, x24, x21, LSL #2\n" + "add x21, x23, x28\n" "ld1w { z10.s }, p2/Z, [x5]\n" - "mov x21, #0x0\n" - "sub x20, XZR, x26\n" + "mov x20, #0x0\n" + "sub x19, XZR, x25\n" "ld1w { z11.s }, p2/Z, [x5, x11, LSL #2]\n" "ld1w { z12.s }, p2/Z, [x7, x15, LSL #2]\n" "addvl x17, x17, #1\n" @@ -226,15 +226,15 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "3:" // Tile loop: Channel loop "movprfx z21, z15\n fmla z21.s, p3/M, z4.s, z9.s\n" "movprfx z16, z15\n fmla z16.s, p3/M, z8.s, z9.s\n" - "whilelt p1.s, x26, %x[n_channels]\n" - "incw x21\n" + "whilelt p1.s, x25, %x[n_channels]\n" + "incw x20\n" "movprfx z22, z15\n fmla z22.s, p3/M, z3.s, z9.s\n" "movprfx z25, z15\n fmla z25.s, p3/M, z1.s, z9.s\n" - "incw x26\n" + "incw x25\n" "mov p0.b, p2.b\n" "movprfx z26, z15\n fmla z26.s, p3/M, z0.s, z9.s\n" "fmla z21.s, p3/M, z5.s, z12.s\n" - "incw x20\n" + "incw x19\n" "movprfx z17, z15\n fmla z17.s, p3/M, z7.s, z9.s\n" "movprfx z18, z15\n fmla z18.s, p3/M, z6.s, z9.s\n" "movprfx z20, z15\n fmla z20.s, p3/M, z5.s, z9.s\n" @@ -261,10 +261,15 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "ld1w { z11.s }, p2/Z, [x5, x13, LSL #2]\n" "fmla z25.s, p3/M, z4.s, z9.s\n" "fmla z26.s, p3/M, z3.s, z9.s\n" + "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n" + "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n" + "ld1w { z15.s }, p3/Z, [x17]\n" + "addvl x17, x17, #1\n" "fmla z20.s, p3/M, z8.s, z9.s\n" "fmla z24.s, p3/M, z5.s, z9.s\n" "fmla z28.s, p3/M, z2.s, z9.s\n" "fmla z21.s, p3/M, z8.s, z10.s\n" + "ld1w { z9.s }, p2/Z, [x6]\n" "fmla z16.s, p3/M, z1.s, z12.s\n" "fmla z17.s, p3/M, z0.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x6, x11, LSL #2]\n" @@ -276,28 +281,25 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla z25.s, p3/M, z5.s, z10.s\n" "fmla z26.s, p3/M, z4.s, z10.s\n" "fmla z27.s, p3/M, z3.s, z10.s\n" + "fmla z29.s, p3/M, z2.s, z10.s\n" + "fmla z30.s, p3/M, z1.s, z10.s\n" "fmla z31.s, p3/M, z0.s, z10.s\n" + "ld1w { z10.s }, p2/Z, [x6, x8, LSL #2]\n" + "fmla z20.s, p3/M, z0.s, z9.s\n" "fmla z24.s, p3/M, z6.s, z11.s\n" "fmla z28.s, p3/M, z3.s, z11.s\n" + "fmla z21.s, p3/M, z1.s, z10.s\n" "ld1w { z11.s }, p2/Z, [x14, x11, LSL #2]\n" + "fmla z16.s, p3/M, z3.s, z9.s\n" "fmla z19.s, p3/M, z5.s, z12.s\n" "fmla z23.s, p3/M, z2.s, z12.s\n" + "fmla z17.s, p3/M, z4.s, z10.s\n" "ld1w { z12.s }, p2/Z, [x6, x15, LSL #2]\n" + "fmla z18.s, p3/M, z3.s, z10.s\n" + "fmla z22.s, p3/M, z0.s, z10.s\n" "fmla z27.s, p3/M, z8.s, z11.s\n" "fmla z31.s, p3/M, z5.s, z11.s\n" - "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n" - "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x6]\n" - "fmla z29.s, p3/M, z2.s, z10.s\n" - "fmla z30.s, p3/M, z1.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x6, x8, LSL #2]\n" - "fmla z20.s, p3/M, z0.s, z9.s\n" - "fmla z21.s, p3/M, z1.s, z10.s\n" - "fmla z16.s, p3/M, z3.s, z9.s\n" - "fmla z17.s, p3/M, z4.s, z10.s\n" "ld1w { z11.s }, p2/Z, [x12, x4, LSL #2]\n" - "fmla z18.s, p3/M, z3.s, z10.s\n" - "fmla z22.s, p3/M, z0.s, z10.s\n" "fmla z20.s, p3/M, z2.s, z10.s\n" "fmla z21.s, p3/M, z2.s, z12.s\n" "fmla z16.s, p3/M, z5.s, z10.s\n" @@ -359,6 +361,7 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla z29.s, p3/M, z4.s, z11.s\n" "fmla z30.s, p3/M, z3.s, z11.s\n" "fmla z19.s, p3/M, z8.s, z12.s\n" + "ld1w { z9.s }, p1/Z, [x7, x8, LSL #2]\n" "fmla z23.s, p3/M, z5.s, z12.s\n" "fmla z27.s, p3/M, z2.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x16, x11, LSL #2]\n" @@ -398,25 +401,23 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla z20.s, p3/M, z1.s, z10.s\n" "fmla z21.s, p3/M, z0.s, z10.s\n" "ld1w { z10.s }, p2/Z, [x14, x13, LSL #2]\n" - "whilelt p2.s, x21, %x[n_channels]\n" + "whilelt p2.s, x20, %x[n_channels]\n" "fmla z18.s, p3/M, z5.s, z11.s\n" "fmla z19.s, p3/M, z4.s, z11.s\n" - "ld1w { z15.s }, p3/Z, [x17]\n" - "addvl x17, x17, #1\n" + "cmp x25, %x[n_channels]\n" + "addvl x14, x14, #1\n" "fmla z22.s, p3/M, z2.s, z11.s\n" "fmla z23.s, p3/M, z1.s, z11.s\n" - "cmp x26, %x[n_channels]\n" - "addvl x14, x14, #1\n" + "ld1w { z11.s }, p1/Z, [x5, x11, LSL #2]\n" "fmla z24.s, p3/M, z7.s, z12.s\n" "fmla z25.s, p3/M, z6.s, z12.s\n" - "ld1w { z9.s }, p1/Z, [x7, x8, LSL #2]\n" "fmla z28.s, p3/M, z4.s, z12.s\n" "fmla z29.s, p3/M, z3.s, z12.s\n" ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n" "addvl x17, x17, #4\n" "fmla z26.s, p3/M, z8.s, z10.s\n" "fmla z27.s, p3/M, z7.s, z10.s\n" - "ld1w { z11.s }, p1/Z, [x5, x11, LSL #2]\n" + "ld1w { z12.s }, p1/Z, [x7, x15, LSL #2]\n" "fmla z30.s, p3/M, z5.s, z10.s\n" "fmla z31.s, p3/M, z4.s, z10.s\n" ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n" @@ -426,29 +427,28 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "ld1w { z10.s }, p1/Z, [x5]\n" ".inst 0xc1adc9d8 // fclamp { z24.s-z27.s }, z14.s, z13.s\n" ".inst 0xc1adc9dc // fclamp { z28.s-z31.s }, z14.s, z13.s\n" - "st1w { z16.s }, p0, [x28]\n" - "ld1w { z12.s }, p1/Z, [x7, x15, LSL #2]\n" - "st1w { z17.s }, p0, [x28, x9, LSL #2]\n" - "st1w { z18.s }, p0, [x28, x24, LSL #2]\n" + "st1w { z16.s }, p0, [x27]\n" + "st1w { z17.s }, p0, [x27, x28, LSL #2]\n" "ld1w { z8.s }, p3/Z, [x17]\n" "addvl x17, x17, #1\n" - "st1w { z19.s }, p0, [x28, x22, LSL #2]\n" - "addvl x28, x28, #1\n" - "st1w { z20.s }, p0, [x27]\n" - "st1w { z21.s }, p0, [x27, x9, LSL #2]\n" - "st1w { z22.s }, p0, [x27, x24, LSL #2]\n" - "st1w { z23.s }, p0, [x27, x22, LSL #2]\n" + "st1w { z18.s }, p0, [x27, x23, LSL #2]\n" + "st1w { z19.s }, p0, [x27, x21, LSL #2]\n" "addvl x27, x27, #1\n" - "st1w { z24.s }, p0, [x25]\n" - "st1w { z25.s }, p0, [x25, x9, LSL #2]\n" - "st1w { z26.s }, p0, [x25, x24, LSL #2]\n" - "st1w { z27.s }, p0, [x25, x22, LSL #2]\n" - "addvl x25, x25, #1\n" - "st1w { z28.s }, p0, [x23]\n" - "st1w { z29.s }, p0, [x23, x9, LSL #2]\n" - "st1w { z30.s }, p0, [x23, x24, LSL #2]\n" - "st1w { z31.s }, p0, [x23, x22, LSL #2]\n" - "addvl x23, x23, #1\n" + "st1w { z20.s }, p0, [x26]\n" + "st1w { z21.s }, p0, [x26, x28, LSL #2]\n" + "st1w { z22.s }, p0, [x26, x23, LSL #2]\n" + "st1w { z23.s }, p0, [x26, x21, LSL #2]\n" + "addvl x26, x26, #1\n" + "st1w { z24.s }, p0, [x24]\n" + "st1w { z25.s }, p0, [x24, x28, LSL #2]\n" + "st1w { z26.s }, p0, [x24, x23, LSL #2]\n" + "st1w { z27.s }, p0, [x24, x21, LSL #2]\n" + "addvl x24, x24, #1\n" + "st1w { z28.s }, p0, [x22]\n" + "st1w { z29.s }, p0, [x22, x28, LSL #2]\n" + "st1w { z30.s }, p0, [x22, x23, LSL #2]\n" + "st1w { z31.s }, p0, [x22, x21, LSL #2]\n" + "addvl x22, x22, #1\n" "blt 3b\n" "4:" // Tile loop: Channel tail "movprfx z21, z15\n fmla z21.s, p3/M, z4.s, z9.s\n" @@ -458,15 +458,15 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "movprfx z22, z15\n fmla z22.s, p3/M, z3.s, z9.s\n" "movprfx z25, z15\n fmla z25.s, p3/M, z1.s, z9.s\n" "ldr x2, [%x[params_struct], %[offsetof_args_tile_i]]\n" - "add x21, x2, #0x1\n" + "add x20, x2, #0x1\n" "movprfx z26, z15\n fmla z26.s, p3/M, z0.s, z9.s\n" "fmla z21.s, p3/M, z5.s, z12.s\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" - "cmp x3, x20\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" + "cmp x3, x19\n" "movprfx z17, z15\n fmla z17.s, p3/M, z7.s, z9.s\n" "movprfx z18, z15\n fmla z18.s, p3/M, z6.s, z9.s\n" - "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" - "csel x2, x2, x21, LT\n" + "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" + "csel x2, x2, x20, LT\n" "movprfx z20, z15\n fmla z20.s, p3/M, z5.s, z9.s\n" "movprfx z24, z15\n fmla z24.s, p3/M, z2.s, z9.s\n" "ld1w { z9.s }, p2/Z, [x16, x8, LSL #2]\n" @@ -478,7 +478,7 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla z22.s, p3/M, z4.s, z12.s\n" "fmla z25.s, p3/M, z2.s, z12.s\n" "ld1w { z11.s }, p2/Z, [x12, x11, LSL #2]\n" - "cmp x2, x20\n" + "cmp x2, x19\n" "fmla z26.s, p3/M, z1.s, z12.s\n" "movprfx z28, z15\n fmla z28.s, p3/M, z6.s, z10.s\n" "ld1w { z10.s }, p2/Z, [x16, x15, LSL #2]\n" @@ -494,10 +494,13 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "ld1w { z11.s }, p2/Z, [x5, x13, LSL #2]\n" "fmla z25.s, p3/M, z4.s, z9.s\n" "fmla z26.s, p3/M, z3.s, z9.s\n" + "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n" + "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n" "fmla z20.s, p3/M, z8.s, z9.s\n" "fmla z24.s, p3/M, z5.s, z9.s\n" "fmla z28.s, p3/M, z2.s, z9.s\n" "fmla z21.s, p3/M, z8.s, z10.s\n" + "ld1w { z9.s }, p2/Z, [x6]\n" "fmla z16.s, p3/M, z1.s, z12.s\n" "fmla z17.s, p3/M, z0.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x6, x11, LSL #2]\n" @@ -509,28 +512,25 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla z25.s, p3/M, z5.s, z10.s\n" "fmla z26.s, p3/M, z4.s, z10.s\n" "fmla z27.s, p3/M, z3.s, z10.s\n" + "fmla z29.s, p3/M, z2.s, z10.s\n" + "fmla z30.s, p3/M, z1.s, z10.s\n" "fmla z31.s, p3/M, z0.s, z10.s\n" + "ld1w { z10.s }, p2/Z, [x6, x8, LSL #2]\n" + "fmla z20.s, p3/M, z0.s, z9.s\n" "fmla z24.s, p3/M, z6.s, z11.s\n" "fmla z28.s, p3/M, z3.s, z11.s\n" + "fmla z21.s, p3/M, z1.s, z10.s\n" "ld1w { z11.s }, p2/Z, [x14, x11, LSL #2]\n" + "fmla z16.s, p3/M, z3.s, z9.s\n" "fmla z19.s, p3/M, z5.s, z12.s\n" "fmla z23.s, p3/M, z2.s, z12.s\n" + "fmla z17.s, p3/M, z4.s, z10.s\n" "ld1w { z12.s }, p2/Z, [x6, x15, LSL #2]\n" + "fmla z18.s, p3/M, z3.s, z10.s\n" + "fmla z22.s, p3/M, z0.s, z10.s\n" "fmla z27.s, p3/M, z8.s, z11.s\n" "fmla z31.s, p3/M, z5.s, z11.s\n" - "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n" - "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x6]\n" - "fmla z29.s, p3/M, z2.s, z10.s\n" - "fmla z30.s, p3/M, z1.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x6, x8, LSL #2]\n" - "fmla z20.s, p3/M, z0.s, z9.s\n" - "fmla z21.s, p3/M, z1.s, z10.s\n" - "fmla z16.s, p3/M, z3.s, z9.s\n" - "fmla z17.s, p3/M, z4.s, z10.s\n" "ld1w { z11.s }, p2/Z, [x12, x4, LSL #2]\n" - "fmla z18.s, p3/M, z3.s, z10.s\n" - "fmla z22.s, p3/M, z0.s, z10.s\n" "fmla z20.s, p3/M, z2.s, z10.s\n" "fmla z21.s, p3/M, z2.s, z12.s\n" "fmla z16.s, p3/M, z5.s, z10.s\n" @@ -640,29 +640,29 @@ void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( "fmla z31.s, p3/M, z4.s, z10.s\n" ".inst 0xc1adc9d0 // fclamp { z16.s-z19.s }, z14.s, z13.s\n" ".inst 0xc1adc9d4 // fclamp { z20.s-z23.s }, z14.s, z13.s\n" - "st1w { z16.s }, p0, [x28]\n" + "st1w { z16.s }, p0, [x27]\n" ".inst 0xc1adc9d8 // fclamp { z24.s-z27.s }, z14.s, z13.s\n" ".inst 0xc1adc9dc // fclamp { z28.s-z31.s }, z14.s, z13.s\n" - "st1w { z17.s }, p0, [x28, x9, LSL #2]\n" - "st1w { z18.s }, p0, [x28, x24, LSL #2]\n" - "st1w { z19.s }, p0, [x28, x22, LSL #2]\n" - "st1w { z20.s }, p0, [x27]\n" - "st1w { z21.s }, p0, [x27, x9, LSL #2]\n" - "st1w { z22.s }, p0, [x27, x24, LSL #2]\n" - "st1w { z23.s }, p0, [x27, x22, LSL #2]\n" - "st1w { z24.s }, p0, [x25]\n" - "st1w { z25.s }, p0, [x25, x9, LSL #2]\n" - "st1w { z26.s }, p0, [x25, x24, LSL #2]\n" - "st1w { z27.s }, p0, [x25, x22, LSL #2]\n" - "st1w { z28.s }, p0, [x23]\n" - "st1w { z29.s }, p0, [x23, x9, LSL #2]\n" - "st1w { z30.s }, p0, [x23, x24, LSL #2]\n" - "st1w { z31.s }, p0, [x23, x22, LSL #2]\n" + "st1w { z17.s }, p0, [x27, x28, LSL #2]\n" + "st1w { z18.s }, p0, [x27, x23, LSL #2]\n" + "st1w { z19.s }, p0, [x27, x21, LSL #2]\n" + "st1w { z20.s }, p0, [x26]\n" + "st1w { z21.s }, p0, [x26, x28, LSL #2]\n" + "st1w { z22.s }, p0, [x26, x23, LSL #2]\n" + "st1w { z23.s }, p0, [x26, x21, LSL #2]\n" + "st1w { z24.s }, p0, [x24]\n" + "st1w { z25.s }, p0, [x24, x28, LSL #2]\n" + "st1w { z26.s }, p0, [x24, x23, LSL #2]\n" + "st1w { z27.s }, p0, [x24, x21, LSL #2]\n" + "st1w { z28.s }, p0, [x22]\n" + "st1w { z29.s }, p0, [x22, x28, LSL #2]\n" + "st1w { z30.s }, p0, [x22, x23, LSL #2]\n" + "st1w { z31.s }, p0, [x22, x21, LSL #2]\n" "blt 1b\n" ".inst 0xd503467f // SMSTOP\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } |