diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp | 420 |
1 files changed, 210 insertions, 210 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp index cee3fb59c5..d3a2e06453 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2023 Arm Limited. + * Copyright (c) 2021-2024 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -58,20 +58,20 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "2:" // Output channel loop: Load bias: Done "ldr q6, [%x[weights], #0x0]\n" "mov x22, %x[inptrs]\n" - "ldp x21, x20, [x22], #0x10\n" "lsr x23, %x[kernel_points], #0x1\n" - "ldr q1, [x21, #0x0]\n" - "ldr q0, [x20, #0x0]\n" "mov v16.16b, v31.16b\n" "mov v17.16b, v31.16b\n" "mov v18.16b, v31.16b\n" - "mov v19.16b, v31.16b\n" "add %x[weights], %x[weights], #0x10\n" + "mov v19.16b, v31.16b\n" "mov v20.16b, v31.16b\n" + "ldp x21, x20, [x22], #0x10\n" "mov v21.16b, v31.16b\n" "mov v22.16b, v31.16b\n" "mov v23.16b, v31.16b\n" "mov v24.16b, v31.16b\n" + "ldr q1, [x21, #0x0]\n" + "ldr q0, [x20, #0x0]\n" "mov v25.16b, v31.16b\n" "mov v26.16b, v31.16b\n" "mov v27.16b, v31.16b\n" @@ -160,71 +160,71 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "fmla v31.8h, v6.8h, v0.h[7]\n" "fmla v16.8h, v5.8h, v4.h[0]\n" "fmla v17.8h, v5.8h, v4.h[1]\n" - "fmin v16.8h, v16.8h, v7.8h\n" "fmla v18.8h, v5.8h, v4.h[2]\n" "fmla v19.8h, v5.8h, v4.h[3]\n" - "fmin v17.8h, v17.8h, v7.8h\n" "fmla v20.8h, v5.8h, v4.h[4]\n" "fmla v21.8h, v5.8h, v4.h[5]\n" - "fmin v18.8h, v18.8h, v7.8h\n" "fmla v22.8h, v5.8h, v4.h[6]\n" "fmla v23.8h, v5.8h, v4.h[7]\n" - "fmin v19.8h, v19.8h, v7.8h\n" "fmla v24.8h, v5.8h, v3.h[0]\n" "fmla v25.8h, v5.8h, v3.h[1]\n" - "fmin v20.8h, v20.8h, v7.8h\n" + "fmin v16.8h, v16.8h, v7.8h\n" "fmla v26.8h, v5.8h, v3.h[2]\n" "fmla v27.8h, v5.8h, v3.h[3]\n" - "fmin v21.8h, v21.8h, v7.8h\n" + "fmin v17.8h, v17.8h, v7.8h\n" "fmla v28.8h, v5.8h, v3.h[4]\n" "fmla v29.8h, v5.8h, v3.h[5]\n" - "fmin v22.8h, v22.8h, v7.8h\n" + "fmin v18.8h, v18.8h, v7.8h\n" "fmla v30.8h, v5.8h, v3.h[6]\n" "fmla v31.8h, v5.8h, v3.h[7]\n" + "fmin v19.8h, v19.8h, v7.8h\n" + "fmin v20.8h, v20.8h, v7.8h\n" + "fmin v21.8h, v21.8h, v7.8h\n" + "fmin v22.8h, v22.8h, v7.8h\n" "fmin v23.8h, v23.8h, v7.8h\n" "fmax v16.8h, v16.8h, v8.8h\n" "fmax v17.8h, v17.8h, v8.8h\n" - "str q16, [x27, x28]\n" - "ldr x27, [%x[outptrs], #0x40]\n" "fmax v18.8h, v18.8h, v8.8h\n" "fmax v19.8h, v19.8h, v8.8h\n" - "str q17, [x26, x28]\n" - "ldr x26, [%x[outptrs], #0x48]\n" "fmax v20.8h, v20.8h, v8.8h\n" "fmax v21.8h, v21.8h, v8.8h\n" - "str q18, [x25, x28]\n" - "ldr x25, [%x[outptrs], #0x50]\n" "fmax v22.8h, v22.8h, v8.8h\n" "fmax v23.8h, v23.8h, v8.8h\n" - "str q19, [x24, x28]\n" - "ldr x24, [%x[outptrs], #0x58]\n" + "str q16, [x27, x28]\n" + "ldr x27, [%x[outptrs], #0x40]\n" "fmin v24.8h, v24.8h, v7.8h\n" "fmin v25.8h, v25.8h, v7.8h\n" - "str q20, [x23, x28]\n" - "ldr x23, [%x[outptrs], #0x60]\n" + "str q17, [x26, x28]\n" + "ldr x26, [%x[outptrs], #0x48]\n" "fmin v26.8h, v26.8h, v7.8h\n" "fmin v27.8h, v27.8h, v7.8h\n" - "str q21, [x22, x28]\n" - "ldr x22, [%x[outptrs], #0x68]\n" + "str q18, [x25, x28]\n" + "ldr x25, [%x[outptrs], #0x50]\n" "fmin v28.8h, v28.8h, v7.8h\n" "fmin v29.8h, v29.8h, v7.8h\n" - "str q22, [x21, x28]\n" - "ldr x21, [%x[outptrs], #0x70]\n" + "str q19, [x24, x28]\n" + "ldr x24, [%x[outptrs], #0x58]\n" "fmin v30.8h, v30.8h, v7.8h\n" "fmin v31.8h, v31.8h, v7.8h\n" - "str q23, [x20, x28]\n" - "ldr x20, [%x[outptrs], #0x78]\n" + "str q20, [x23, x28]\n" + "ldr x23, [%x[outptrs], #0x60]\n" + "str q21, [x22, x28]\n" + "ldr x22, [%x[outptrs], #0x68]\n" "fmax v24.8h, v24.8h, v8.8h\n" "fmax v25.8h, v25.8h, v8.8h\n" - "str q24, [x27, x28]\n" + "str q22, [x21, x28]\n" + "ldr x21, [%x[outptrs], #0x70]\n" "fmax v26.8h, v26.8h, v8.8h\n" "fmax v27.8h, v27.8h, v8.8h\n" - "str q25, [x26, x28]\n" + "str q23, [x20, x28]\n" + "ldr x20, [%x[outptrs], #0x78]\n" "fmax v28.8h, v28.8h, v8.8h\n" "fmax v29.8h, v29.8h, v8.8h\n" - "str q26, [x25, x28]\n" "fmax v30.8h, v30.8h, v8.8h\n" "fmax v31.8h, v31.8h, v8.8h\n" + "str q24, [x27, x28]\n" + "str q25, [x26, x28]\n" + "str q26, [x25, x28]\n" "str q27, [x24, x28]\n" "str q28, [x23, x28]\n" "str q29, [x22, x28]\n" @@ -280,71 +280,71 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "fmla v31.8h, v5.8h, v3.h[7]\n" "fmla v16.8h, v1.8h, v2.h[0]\n" "fmla v17.8h, v1.8h, v2.h[1]\n" - "fmin v16.8h, v16.8h, v7.8h\n" "fmla v18.8h, v1.8h, v2.h[2]\n" "fmla v19.8h, v1.8h, v2.h[3]\n" - "fmin v17.8h, v17.8h, v7.8h\n" "fmla v20.8h, v1.8h, v2.h[4]\n" "fmla v21.8h, v1.8h, v2.h[5]\n" - "fmin v18.8h, v18.8h, v7.8h\n" "fmla v22.8h, v1.8h, v2.h[6]\n" "fmla v23.8h, v1.8h, v2.h[7]\n" - "fmin v19.8h, v19.8h, v7.8h\n" "fmla v24.8h, v1.8h, v0.h[0]\n" "fmla v25.8h, v1.8h, v0.h[1]\n" - "fmin v20.8h, v20.8h, v7.8h\n" + "fmin v16.8h, v16.8h, v7.8h\n" "fmla v26.8h, v1.8h, v0.h[2]\n" "fmla v27.8h, v1.8h, v0.h[3]\n" - "fmin v21.8h, v21.8h, v7.8h\n" + "fmin v17.8h, v17.8h, v7.8h\n" "fmla v28.8h, v1.8h, v0.h[4]\n" "fmla v29.8h, v1.8h, v0.h[5]\n" - "fmin v22.8h, v22.8h, v7.8h\n" + "fmin v18.8h, v18.8h, v7.8h\n" "fmla v30.8h, v1.8h, v0.h[6]\n" "fmla v31.8h, v1.8h, v0.h[7]\n" + "fmin v19.8h, v19.8h, v7.8h\n" + "fmin v20.8h, v20.8h, v7.8h\n" + "fmin v21.8h, v21.8h, v7.8h\n" + "fmin v22.8h, v22.8h, v7.8h\n" "fmin v23.8h, v23.8h, v7.8h\n" "fmax v16.8h, v16.8h, v8.8h\n" "fmax v17.8h, v17.8h, v8.8h\n" - "str q16, [x27, x28]\n" - "ldr x27, [%x[outptrs], #0x40]\n" "fmax v18.8h, v18.8h, v8.8h\n" "fmax v19.8h, v19.8h, v8.8h\n" - "str q17, [x26, x28]\n" - "ldr x26, [%x[outptrs], #0x48]\n" "fmax v20.8h, v20.8h, v8.8h\n" "fmax v21.8h, v21.8h, v8.8h\n" - "str q18, [x25, x28]\n" - "ldr x25, [%x[outptrs], #0x50]\n" "fmax v22.8h, v22.8h, v8.8h\n" "fmax v23.8h, v23.8h, v8.8h\n" - "str q19, [x24, x28]\n" - "ldr x24, [%x[outptrs], #0x58]\n" + "str q16, [x27, x28]\n" + "ldr x27, [%x[outptrs], #0x40]\n" "fmin v24.8h, v24.8h, v7.8h\n" "fmin v25.8h, v25.8h, v7.8h\n" - "str q20, [x23, x28]\n" - "ldr x23, [%x[outptrs], #0x60]\n" + "str q17, [x26, x28]\n" + "ldr x26, [%x[outptrs], #0x48]\n" "fmin v26.8h, v26.8h, v7.8h\n" "fmin v27.8h, v27.8h, v7.8h\n" - "str q21, [x22, x28]\n" - "ldr x22, [%x[outptrs], #0x68]\n" + "str q18, [x25, x28]\n" + "ldr x25, [%x[outptrs], #0x50]\n" "fmin v28.8h, v28.8h, v7.8h\n" "fmin v29.8h, v29.8h, v7.8h\n" - "str q22, [x21, x28]\n" - "ldr x21, [%x[outptrs], #0x70]\n" + "str q19, [x24, x28]\n" + "ldr x24, [%x[outptrs], #0x58]\n" "fmin v30.8h, v30.8h, v7.8h\n" "fmin v31.8h, v31.8h, v7.8h\n" - "str q23, [x20, x28]\n" - "ldr x20, [%x[outptrs], #0x78]\n" + "str q20, [x23, x28]\n" + "ldr x23, [%x[outptrs], #0x60]\n" + "str q21, [x22, x28]\n" + "ldr x22, [%x[outptrs], #0x68]\n" "fmax v24.8h, v24.8h, v8.8h\n" "fmax v25.8h, v25.8h, v8.8h\n" - "str q24, [x27, x28]\n" + "str q22, [x21, x28]\n" + "ldr x21, [%x[outptrs], #0x70]\n" "fmax v26.8h, v26.8h, v8.8h\n" "fmax v27.8h, v27.8h, v8.8h\n" - "str q25, [x26, x28]\n" + "str q23, [x20, x28]\n" + "ldr x20, [%x[outptrs], #0x78]\n" "fmax v28.8h, v28.8h, v8.8h\n" "fmax v29.8h, v29.8h, v8.8h\n" - "str q26, [x25, x28]\n" "fmax v30.8h, v30.8h, v8.8h\n" "fmax v31.8h, v31.8h, v8.8h\n" + "str q24, [x27, x28]\n" + "str q25, [x26, x28]\n" + "str q26, [x25, x28]\n" "str q27, [x24, x28]\n" "str q28, [x23, x28]\n" "str q29, [x22, x28]\n" @@ -354,80 +354,80 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "6:" // Output channel loop: Single kernel point "fmla v16.8h, v6.8h, v1.h[0]\n" "fmla v17.8h, v6.8h, v1.h[1]\n" - "fmin v16.8h, v16.8h, v7.8h\n" "lsl x28, x10, #0x1\n" + "ldr x27, [%x[outptrs], #0x0]\n" "fmla v18.8h, v6.8h, v1.h[2]\n" "fmla v19.8h, v6.8h, v1.h[3]\n" - "fmin v17.8h, v17.8h, v7.8h\n" - "ldr x27, [%x[outptrs], #0x0]\n" + "ldr x26, [%x[outptrs], #0x8]\n" + "ldr x25, [%x[outptrs], #0x10]\n" "fmla v20.8h, v6.8h, v1.h[4]\n" "fmla v21.8h, v6.8h, v1.h[5]\n" - "fmin v18.8h, v18.8h, v7.8h\n" - "ldr x26, [%x[outptrs], #0x8]\n" + "ldr x24, [%x[outptrs], #0x18]\n" + "ldr x23, [%x[outptrs], #0x20]\n" "fmla v22.8h, v6.8h, v1.h[6]\n" "fmla v23.8h, v6.8h, v1.h[7]\n" - "fmin v19.8h, v19.8h, v7.8h\n" - "ldr x25, [%x[outptrs], #0x10]\n" + "ldr x22, [%x[outptrs], #0x28]\n" + "ldr x21, [%x[outptrs], #0x30]\n" "fmla v24.8h, v6.8h, v0.h[0]\n" "fmla v25.8h, v6.8h, v0.h[1]\n" - "fmin v20.8h, v20.8h, v7.8h\n" - "ldr x24, [%x[outptrs], #0x18]\n" + "fmin v16.8h, v16.8h, v7.8h\n" + "ldr x20, [%x[outptrs], #0x38]\n" "fmla v26.8h, v6.8h, v0.h[2]\n" "fmla v27.8h, v6.8h, v0.h[3]\n" - "fmin v21.8h, v21.8h, v7.8h\n" - "ldr x23, [%x[outptrs], #0x20]\n" + "fmin v17.8h, v17.8h, v7.8h\n" "fmla v28.8h, v6.8h, v0.h[4]\n" "fmla v29.8h, v6.8h, v0.h[5]\n" - "fmin v22.8h, v22.8h, v7.8h\n" - "ldr x22, [%x[outptrs], #0x28]\n" + "fmin v18.8h, v18.8h, v7.8h\n" "fmla v30.8h, v6.8h, v0.h[6]\n" "fmla v31.8h, v6.8h, v0.h[7]\n" + "fmin v19.8h, v19.8h, v7.8h\n" + "fmin v20.8h, v20.8h, v7.8h\n" + "fmin v21.8h, v21.8h, v7.8h\n" + "fmin v22.8h, v22.8h, v7.8h\n" "fmin v23.8h, v23.8h, v7.8h\n" - "ldr x21, [%x[outptrs], #0x30]\n" - "ldr x20, [%x[outptrs], #0x38]\n" "fmax v16.8h, v16.8h, v8.8h\n" "fmax v17.8h, v17.8h, v8.8h\n" - "str q16, [x27, x28]\n" "fmax v18.8h, v18.8h, v8.8h\n" "fmax v19.8h, v19.8h, v8.8h\n" - "str q17, [x26, x28]\n" - "ldr x27, [%x[outptrs], #0x40]\n" "fmax v20.8h, v20.8h, v8.8h\n" "fmax v21.8h, v21.8h, v8.8h\n" - "str q18, [x25, x28]\n" - "ldr x26, [%x[outptrs], #0x48]\n" "fmax v22.8h, v22.8h, v8.8h\n" "fmax v23.8h, v23.8h, v8.8h\n" - "str q19, [x24, x28]\n" - "ldr x25, [%x[outptrs], #0x50]\n" + "str q16, [x27, x28]\n" + "ldr x27, [%x[outptrs], #0x40]\n" "fmin v24.8h, v24.8h, v7.8h\n" "fmin v25.8h, v25.8h, v7.8h\n" - "str q20, [x23, x28]\n" - "ldr x24, [%x[outptrs], #0x58]\n" + "str q17, [x26, x28]\n" + "ldr x26, [%x[outptrs], #0x48]\n" "fmin v26.8h, v26.8h, v7.8h\n" "fmin v27.8h, v27.8h, v7.8h\n" - "str q21, [x22, x28]\n" - "ldr x23, [%x[outptrs], #0x60]\n" + "str q18, [x25, x28]\n" + "ldr x25, [%x[outptrs], #0x50]\n" "fmin v28.8h, v28.8h, v7.8h\n" "fmin v29.8h, v29.8h, v7.8h\n" - "str q22, [x21, x28]\n" - "ldr x22, [%x[outptrs], #0x68]\n" + "str q19, [x24, x28]\n" + "ldr x24, [%x[outptrs], #0x58]\n" "fmin v30.8h, v30.8h, v7.8h\n" "fmin v31.8h, v31.8h, v7.8h\n" - "str q23, [x20, x28]\n" - "ldr x21, [%x[outptrs], #0x70]\n" - "ldr x20, [%x[outptrs], #0x78]\n" + "str q20, [x23, x28]\n" + "ldr x23, [%x[outptrs], #0x60]\n" + "str q21, [x22, x28]\n" + "ldr x22, [%x[outptrs], #0x68]\n" "fmax v24.8h, v24.8h, v8.8h\n" "fmax v25.8h, v25.8h, v8.8h\n" - "str q24, [x27, x28]\n" + "str q22, [x21, x28]\n" + "ldr x21, [%x[outptrs], #0x70]\n" "fmax v26.8h, v26.8h, v8.8h\n" "fmax v27.8h, v27.8h, v8.8h\n" - "str q25, [x26, x28]\n" + "str q23, [x20, x28]\n" + "ldr x20, [%x[outptrs], #0x78]\n" "fmax v28.8h, v28.8h, v8.8h\n" "fmax v29.8h, v29.8h, v8.8h\n" - "str q26, [x25, x28]\n" "fmax v30.8h, v30.8h, v8.8h\n" "fmax v31.8h, v31.8h, v8.8h\n" + "str q24, [x27, x28]\n" + "str q25, [x26, x28]\n" + "str q26, [x25, x28]\n" "str q27, [x24, x28]\n" "str q28, [x23, x28]\n" "str q29, [x22, x28]\n" @@ -466,20 +466,20 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "13:" // Output channel oddments: Load bias: Done "ldr q6, [%x[weights], #0x0]\n" "mov x22, %x[inptrs]\n" - "ldp x21, x20, [x22], #0x10\n" "lsr x23, %x[kernel_points], #0x1\n" - "ldr q1, [x21, #0x0]\n" - "ldr q0, [x20, #0x0]\n" "mov v16.16b, v31.16b\n" "mov v17.16b, v31.16b\n" "mov v18.16b, v31.16b\n" - "mov v19.16b, v31.16b\n" "add %x[weights], %x[weights], #0x10\n" + "mov v19.16b, v31.16b\n" "mov v20.16b, v31.16b\n" + "ldp x21, x20, [x22], #0x10\n" "mov v21.16b, v31.16b\n" "mov v22.16b, v31.16b\n" "mov v23.16b, v31.16b\n" "mov v24.16b, v31.16b\n" + "ldr q1, [x21, #0x0]\n" + "ldr q0, [x20, #0x0]\n" "mov v25.16b, v31.16b\n" "mov v26.16b, v31.16b\n" "mov v27.16b, v31.16b\n" @@ -682,47 +682,47 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "tbz %x[n_output_channels], #2, 20f\n" "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.d }[0], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.d }[0], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.d }[0], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.d }[0], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.d }[0], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.d }[0], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.d }[0], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.d }[0], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" - "add x10, x10, #0x4\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.d }[0], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.d }[0], [x26]\n" + "add x20, x20, x10, LSL #1\n" + "add x10, x10, #0x4\n" "st1 { v26.d }[0], [x25]\n" "st1 { v27.d }[0], [x24]\n" "st1 { v28.d }[0], [x23]\n" @@ -732,47 +732,47 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "tbz %x[n_output_channels], #1, 19f\n" "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.s }[2], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.s }[2], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.s }[2], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.s }[2], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.s }[2], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.s }[2], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.s }[2], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.s }[2], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" - "add x10, x10, #0x2\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.s }[2], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.s }[2], [x26]\n" + "add x20, x20, x10, LSL #1\n" + "add x10, x10, #0x2\n" "st1 { v26.s }[2], [x25]\n" "st1 { v27.s }[2], [x24]\n" "st1 { v28.s }[2], [x23]\n" @@ -782,46 +782,46 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "tbz %x[n_output_channels], #0, 22f\n" "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.h }[6], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.h }[6], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.h }[6], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.h }[6], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.h }[6], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.h }[6], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.h }[6], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.h }[6], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.h }[6], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.h }[6], [x26]\n" + "add x20, x20, x10, LSL #1\n" "st1 { v26.h }[6], [x25]\n" "st1 { v27.h }[6], [x24]\n" "st1 { v28.h }[6], [x23]\n" @@ -833,46 +833,46 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "tbz %x[n_output_channels], #0, 22f\n" "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.h }[4], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.h }[4], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.h }[4], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.h }[4], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.h }[4], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.h }[4], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.h }[4], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.h }[4], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.h }[4], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.h }[4], [x26]\n" + "add x20, x20, x10, LSL #1\n" "st1 { v26.h }[4], [x25]\n" "st1 { v27.h }[4], [x24]\n" "st1 { v28.h }[4], [x23]\n" @@ -884,47 +884,47 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "tbz %x[n_output_channels], #1, 21f\n" "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.s }[0], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.s }[0], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.s }[0], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.s }[0], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.s }[0], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.s }[0], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.s }[0], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.s }[0], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" - "add x10, x10, #0x2\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.s }[0], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.s }[0], [x26]\n" + "add x20, x20, x10, LSL #1\n" + "add x10, x10, #0x2\n" "st1 { v26.s }[0], [x25]\n" "st1 { v27.s }[0], [x24]\n" "st1 { v28.s }[0], [x23]\n" @@ -934,46 +934,46 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "tbz %x[n_output_channels], #0, 22f\n" "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.h }[2], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.h }[2], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.h }[2], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.h }[2], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.h }[2], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.h }[2], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.h }[2], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.h }[2], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.h }[2], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.h }[2], [x26]\n" + "add x20, x20, x10, LSL #1\n" "st1 { v26.h }[2], [x25]\n" "st1 { v27.h }[2], [x24]\n" "st1 { v28.h }[2], [x23]\n" @@ -984,46 +984,46 @@ void a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im "21:" // Output channel oddments: Done: Store: Bit 2: Unset: Bit 1: Unset "ldr x27, [%x[outptrs], #0x0]\n" "ldr x26, [%x[outptrs], #0x8]\n" - "add x27, x27, x10, LSL #1\n" - "add x26, x26, x10, LSL #1\n" "ldr x25, [%x[outptrs], #0x10]\n" "ldr x24, [%x[outptrs], #0x18]\n" - "add x25, x25, x10, LSL #1\n" - "add x24, x24, x10, LSL #1\n" "ldr x23, [%x[outptrs], #0x20]\n" "ldr x22, [%x[outptrs], #0x28]\n" - "add x23, x23, x10, LSL #1\n" - "add x22, x22, x10, LSL #1\n" "ldr x21, [%x[outptrs], #0x30]\n" "ldr x20, [%x[outptrs], #0x38]\n" - "add x21, x21, x10, LSL #1\n" - "add x20, x20, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v16.h }[0], [x27]\n" "ldr x27, [%x[outptrs], #0x40]\n" - "add x27, x27, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v17.h }[0], [x26]\n" "ldr x26, [%x[outptrs], #0x48]\n" - "add x26, x26, x10, LSL #1\n" + "add x21, x21, x10, LSL #1\n" + "add x20, x20, x10, LSL #1\n" "st1 { v18.h }[0], [x25]\n" "ldr x25, [%x[outptrs], #0x50]\n" - "add x25, x25, x10, LSL #1\n" "st1 { v19.h }[0], [x24]\n" "ldr x24, [%x[outptrs], #0x58]\n" - "add x24, x24, x10, LSL #1\n" + "add x27, x27, x10, LSL #1\n" "st1 { v20.h }[0], [x23]\n" "ldr x23, [%x[outptrs], #0x60]\n" - "add x23, x23, x10, LSL #1\n" + "add x26, x26, x10, LSL #1\n" "st1 { v21.h }[0], [x22]\n" "ldr x22, [%x[outptrs], #0x68]\n" - "add x22, x22, x10, LSL #1\n" + "add x25, x25, x10, LSL #1\n" "st1 { v22.h }[0], [x21]\n" "ldr x21, [%x[outptrs], #0x70]\n" - "add x21, x21, x10, LSL #1\n" + "add x24, x24, x10, LSL #1\n" "st1 { v23.h }[0], [x20]\n" "ldr x20, [%x[outptrs], #0x78]\n" - "add x20, x20, x10, LSL #1\n" + "add x23, x23, x10, LSL #1\n" + "add x22, x22, x10, LSL #1\n" "st1 { v24.h }[0], [x27]\n" + "add x21, x21, x10, LSL #1\n" "st1 { v25.h }[0], [x26]\n" + "add x20, x20, x10, LSL #1\n" "st1 { v26.h }[0], [x25]\n" "st1 { v27.h }[0], [x24]\n" "st1 { v28.h }[0], [x23]\n" |