diff options
Diffstat (limited to 'arm_compute')
| -rw-r--r-- | arm_compute/core/CPP/CPPTypes.h | 10 | ||||
| -rw-r--r-- | arm_compute/runtime/NEON/functions/NEWinogradConvolutionLayer.h | 3 |
2 files changed, 11 insertions, 2 deletions
diff --git a/arm_compute/core/CPP/CPPTypes.h b/arm_compute/core/CPP/CPPTypes.h index a021bdf5e4..afefb1aeb0 100644 --- a/arm_compute/core/CPP/CPPTypes.h +++ b/arm_compute/core/CPP/CPPTypes.h @@ -127,6 +127,16 @@ public: * @return true of the cpu supports sve2, false otherwise */ bool has_sve2() const; + /** Checks if the cpu model supports sme. + * + * @return true of the cpu supports sme, false otherwise + */ + bool has_sme() const; + /** Checks if the cpu model supports sme2. + * + * @return true of the cpu supports sme2, false otherwise + */ + bool has_sme2() const; /** Gets the cpu model for a given cpuid. * * @param[in] cpuid the id of the cpu core to be retrieved, diff --git a/arm_compute/runtime/NEON/functions/NEWinogradConvolutionLayer.h b/arm_compute/runtime/NEON/functions/NEWinogradConvolutionLayer.h index 2a49f2be59..85b4d047ef 100644 --- a/arm_compute/runtime/NEON/functions/NEWinogradConvolutionLayer.h +++ b/arm_compute/runtime/NEON/functions/NEWinogradConvolutionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2021 Arm Limited. + * Copyright (c) 2017-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -38,7 +38,6 @@ class ITensor; /** Basic function to simulate a convolution layer. This function calls the following kernels: * - * -# @ref cpu::CpuWinogradConv2dTransformWeightsKernel (executed only once in the first call to the run() method ) * -# @ref cpu::CpuWinogradConv2dTransformInputKernel * -# @ref cpu::CpuWinogradConv2dTransformOutputKernel * -# @ref cpu::CpuGemmAssemblyDispatch |