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| author | Gunes Bayir <gunes.bayir@arm.com> | 2022-05-25 10:09:39 +0100 |
|---|---|---|
| committer | Gunes Bayir <gunes.bayir@arm.com> | 2022-05-26 08:31:57 +0000 |
| commit | fdb534293b84182a89a78b5086cf05c07ef970e8 (patch) | |
| tree | d27f9d0e50cec63ad3b39c4f31cff4c6c9077ea4 /src/gpu/cl/kernels/ClDirectConv3dKernel.cpp | |
| parent | 5fcf22dadf092efd7aafb359f9229aa270eb1129 (diff) | |
| download | ComputeLibrary-fdb534293b84182a89a78b5086cf05c07ef970e8.tar.gz | |
Disable unsafe FP optimizations causing accuracy issues
Resolves: COMPMID-5324
Change-Id: I289b1bb42296c562cb90b918c20def8c6c1825d2
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7639
Reviewed-by: SiCong Li <sicong.li@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/gpu/cl/kernels/ClDirectConv3dKernel.cpp')
| -rw-r--r-- | src/gpu/cl/kernels/ClDirectConv3dKernel.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gpu/cl/kernels/ClDirectConv3dKernel.cpp b/src/gpu/cl/kernels/ClDirectConv3dKernel.cpp index a0735b1112..79f425189a 100644 --- a/src/gpu/cl/kernels/ClDirectConv3dKernel.cpp +++ b/src/gpu/cl/kernels/ClDirectConv3dKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -42,6 +42,8 @@ Status validate_arguments(const ITensorInfo *src0, const ITensorInfo *src1, cons { ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_LAYOUT(src0, src1, dst); ARM_COMPUTE_RETURN_ERROR_ON_MSG(src0->data_layout() != DataLayout::NDHWC, "Only NDHWC layout supported"); + + // When fusing activation, same workaround introduced for COMPMID-5324 may be necessary ARM_COMPUTE_RETURN_ERROR_ON_MSG(conv3d_info.act_info.enabled(), "Fused activation not supported"); ARM_COMPUTE_RETURN_ERROR_ON_F16_UNSUPPORTED(src0); |