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authorMohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>2023-03-23 22:21:31 +0000
committerMohmun02 <MohammedSuhail.Munshi@arm.com>2023-04-13 09:24:52 +0000
commita1b1e41bb261f5613f443fed7071936a360686ed (patch)
treeeff2978a682fb24c8078df9c6c796fde51074255 /src/cpu/operators/CpuMatMul.h
parent8b7f42aa0e76a65a4ffa46ee875df6a6220695ae (diff)
downloadComputeLibrary-a1b1e41bb261f5613f443fed7071936a360686ed.tar.gz
Implement MatMul Function and Operator with Floating Point support for CPU
- Implements MatMul function and operator for floating point datatype FP16/FP32 - Includes support for transposing dynamic tensors prior to matrix multiplication. - Adds tests for 2D/3D/4D+ tensors in MatMul with F32/F16 datatype (with all combinations of transposed/not-transposed tensors) - Updates fixture to allow for testing fused activation in MatMul - Adds tests for matmul with and without fused activation Resolved: [COMPMID-5898] Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com> Change-Id: Iefa84b26dd723c9a51e6c3f91023152c6c31ace2 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9411 Reviewed-by: SiCong Li <sicong.li@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Benchmark: Arm Jenkins <bsgcomp@arm.com>
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+/*
+ * Copyright (c) 2023 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef SRC_CPU_OPERATORS_CPUMATMUL
+#define SRC_CPU_OPERATORS_CPUMATMUL
+
+#include "arm_compute/core/TensorInfo.h"
+#include "src/core/common/Macros.h"
+#include "src/cpu/ICpuOperator.h"
+#include "src/cpu/kernels/CpuTransposeKernel.h"
+#include "src/cpu/operators/internal/CpuGemmAssemblyDispatch.h"
+
+namespace arm_compute
+{
+// Forward Declarations
+class MatMulInfo;
+class CpuMatMulSettings;
+
+namespace cpu
+{
+/** Function to execute MatMul Operation. This function calls the following functions/kernels:
+ *
+ * If adjoint/adj flag is enabled for either input lhs or rhs (or both) :
+ * -# @ref cpu::kernels::CpuTransposeKernel
+ * Then :
+ * -# @ref cpu::CpuGemmAssemblyDispatch
+ */
+class CpuMatMul : public ICpuOperator
+{
+public:
+ /* Constructor */
+ CpuMatMul();
+ /* Destructor */
+ ~CpuMatMul() = default;
+
+ ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuMatMul);
+ /** Configure operator for a given list of arguments
+ *
+ * Note: Check documentation of @ref NEMatMul for a list of supported datatypes and layouts
+ *
+ *
+ * @param[in] lhs Source tensor info.
+ * @param[in] rhs Source tensor info.
+ * @param[out] dst Destination tensor info. Data types supported: same as @p lhs / @p rhs.
+ * @param[in] info Contains MatMul operation information described in @ref MatMulInfo.
+ * @param[in] settings The settings for matmul operation (i.e fast math)
+ */
+ void configure(ITensorInfo *lhs, ITensorInfo *rhs, ITensorInfo *dst, const MatMulInfo &info, const CpuMatMulSettings &settings);
+ /** Static function to check if given info will lead to a valid configuration
+ *
+ * Similar to CpuMatMul::configure()
+ *
+ * @return a status
+ */
+ static Status validate(const ITensorInfo *lhs, const ITensorInfo *rhs, const ITensorInfo *dst, const MatMulInfo &info, const CpuMatMulSettings &settings);
+
+ // Inherited methods overridden:
+ void run(ITensorPack &tensors) override;
+ experimental::MemoryRequirements workspace() const override;
+
+private:
+ enum InternalTensorIdx
+ {
+ AsmGemmWorkspace = 0, // Pre-allocate workspace tensors for CpuGemmAssemblyDispatch
+ PretransposeRHS, // Pre-allocate workspace tensors for CpuGemmAssemblyDispatch
+ TransposeLHS,
+ TransposeRHS,
+ Count
+ };
+
+ // Define unique pointers to kernels/operators used by matmul
+ std::unique_ptr<kernels::CpuTransposeKernel> _transpose_kernel_lhs{ nullptr };
+ std::unique_ptr<kernels::CpuTransposeKernel> _transpose_kernel_rhs{ nullptr };
+ std::unique_ptr<CpuGemmAssemblyDispatch> _asm_glue{ nullptr };
+
+ // TensorInfo for tensors stored in auxillary memory
+ TensorInfo _lhs_transposed{};
+ TensorInfo _rhs_transposed{};
+
+ // Original tensor shapes prior to reshaping tensors and collapsing dimensions
+ TensorShape _original_lhs_shape{};
+ TensorShape _original_rhs_shape{};
+ TensorShape _original_dst_shape{};
+
+ // Note : adj_lhs means the same as transposing lhs
+ bool _adj_lhs{ false };
+ bool _adj_rhs{ false };
+ bool _fast_math{ false };
+ AsmGemmInfo _gemm_info{};
+ experimental::MemoryRequirements _aux_mem{ Count };
+};
+}
+}
+
+#endif /* SRC_CPU_OPERATORS_CPUMATMUL */