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authorSheri Zhang <sheri.zhang@arm.com>2021-02-08 17:43:04 +0000
committerSheri Zhang <sheri.zhang@arm.com>2021-02-10 10:58:45 +0000
commit79144a642b33ff1ac40a44aaa1881261d12e6376 (patch)
tree81e25f9f99c03436fa3563b94881ea879e9b15c1 /src/core/cpu/kernels/pooling/neon/qasymm8_signed.cpp
parent8c23ba1c5041467f314a10c1da9147e41d056139 (diff)
downloadComputeLibrary-79144a642b33ff1ac40a44aaa1881261d12e6376.tar.gz
Decouple CpuPoolingKernel data type and data layout
1. Decouple data layout for CpuPoolingKernel: NCHW & NHWC 2. Decouple data type for CpuPoolingKernel NHWC Partially solves: COMPMID-3999 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I3c6535eebdddeb467b7c68a7287a16959b5b9695 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5039 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/cpu/kernels/pooling/neon/qasymm8_signed.cpp')
-rw-r--r--src/core/cpu/kernels/pooling/neon/qasymm8_signed.cpp41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/core/cpu/kernels/pooling/neon/qasymm8_signed.cpp b/src/core/cpu/kernels/pooling/neon/qasymm8_signed.cpp
new file mode 100644
index 0000000000..2c4b095225
--- /dev/null
+++ b/src/core/cpu/kernels/pooling/neon/qasymm8_signed.cpp
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2021 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/core/utils/misc/Traits.h"
+#include "src/core/NEON/wrapper/intrinsics/intrinsics.h"
+#include "src/core/cpu/kernels/pooling/neon/list.h"
+#include "src/core/helpers/WindowHelpers.h"
+
+namespace arm_compute
+{
+namespace cpu
+{
+void poolingMxN_qasymm8_signed_neon_nhwc(const ITensor *src, ITensor *dst0, ITensor *dst1, PoolingLayerInfo &pool_info, const Window &window_src, const Window &window)
+{
+ poolingMxN_q8_neon_nhwc<int8_t>(src, dst0, dst1, pool_info, window_src, window);
+}
+} // namespace cpu
+} // namespace arm_compute \ No newline at end of file