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| author | Michalis Spyrou <michalis.spyrou@arm.com> | 2020-11-22 00:49:42 +0000 |
|---|---|---|
| committer | Michalis Spyrou <michalis.spyrou@arm.com> | 2020-12-14 16:02:26 +0000 |
| commit | aa51a5ba9a3f05be08b94859b53c398edee5d2e3 (patch) | |
| tree | b28829b483421b210cd7c8a256c7feafed736b36 /src/core/common | |
| parent | 3737c7934da929003bda446291489cf352e43751 (diff) | |
| download | ComputeLibrary-aa51a5ba9a3f05be08b94859b53c398edee5d2e3.tar.gz | |
COMPMID-3870: Create ActivationLayer SVE/SVE2
Adds support for ActivationLayer for SVE and SVE2.
Datatypes supported:
*FP32
*FP16
*QASYMM8
*QASYMM8_SIGNED
*QSYMM16
Change-Id: Ia3583891795cda4ca2f9fa27c440731a5c27710d
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4566
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/common')
| -rw-r--r-- | src/core/common/Registrars.h | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/src/core/common/Registrars.h b/src/core/common/Registrars.h index dcea3e8d38..649fe468a3 100644 --- a/src/core/common/Registrars.h +++ b/src/core/common/Registrars.h @@ -24,34 +24,63 @@ #ifndef SRC_CORE_COMMON_REGISTRARS_H #define SRC_CORE_COMMON_REGISTRARS_H -#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#if defined(ENABLE_FP16_KERNELS) + +#if defined(__ARM_FEATURE_SVE) +#define REGISTER_FP16_SVE(func_name) &(func_name) +#else /* !defined(__ARM_FEATURE_SVE) */ +#define REGISTER_FP16_SVE(func_name) nullptr +#endif /* defined(__ARM_FEATURE_SVE) */ + +#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #define REGISTER_FP16_NEON(func_name) &(func_name) -#else /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */ +#else /* !defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ +#define REGISTER_FP16_NEON(func_name) nullptr +#endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ + +#else /* !defined(ENABLE_FP16_KERNELS) */ #define REGISTER_FP16_NEON(func_name) nullptr +#define REGISTER_FP16_SVE(func_name) nullptr #endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */ #if defined(ENABLE_FP32_KERNELS) +#if defined(__ARM_FEATURE_SVE) +#define REGISTER_FP32_SVE(func_name) &(func_name) +#endif /* defined(__ARM_FEATURE_SVE) */ #define REGISTER_FP32_NEON(func_name) &(func_name) #else /* defined(ENABLE_FP32_KERNELS) */ #define REGISTER_FP32_NEON(func_name) nullptr +#define REGISTER_FP32_SVE(func_name) nullptr #endif /* defined(ENABLE_FP32_KERNELS) */ #if defined(ENABLE_QASYMM8_SIGNED_KERNELS) +#if defined(__ARM_FEATURE_SVE) +#define REGISTER_QASYMM8_SIGNED_SVE(func_name) &(func_name) +#endif /* defined(__ARM_FEATURE_SVE) */ #define REGISTER_QASYMM8_SIGNED_NEON(func_name) &(func_name) #else /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ #define REGISTER_QASYMM8_SIGNED_NEON(func_name) nullptr +#define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr #endif /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ #if defined(ENABLE_QASYMM8_KERNELS) +#if defined(__ARM_FEATURE_SVE) +#define REGISTER_QASYMM8_SVE(func_name) &(func_name) +#endif /* defined(__ARM_FEATURE_SVE) */ #define REGISTER_QASYMM8_NEON(func_name) &(func_name) #else /* defined(ENABLE_QASYMM8_KERNELS) */ #define REGISTER_QASYMM8_NEON(func_name) nullptr +#define REGISTER_QASYMM8_SVE(func_name) nullptr #endif /* defined(ENABLE_QASYMM8_KERNELS) */ #if defined(ENABLE_QSYMM16_KERNELS) +#if defined(__ARM_FEATURE_SVE) +#define REGISTER_QSYMM16_SVE(func_name) &(func_name) +#endif /* defined(__ARM_FEATURE_SVE) */ #define REGISTER_QSYMM16_NEON(func_name) &(func_name) #else /* defined(ENABLE_QSYMM16_KERNELS) */ #define REGISTER_QSYMM16_NEON(func_name) nullptr +#define REGISTER_QSYMM16_SVE(func_name) nullptr #endif /* defined(ENABLE_QSYMM16_KERNELS) */ #endif /* SRC_CORE_COMMON_REGISTRARS_H */ |