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| author | Anitha Raj <anitha.raj@arm.com> | 2023-08-22 15:46:27 +0100 |
|---|---|---|
| committer | Anitha Raj <Anitha.Raj@arm.com> | 2023-08-23 08:44:11 +0000 |
| commit | 082630ba4e2de697b6d372dd35ffc1be6a42c346 (patch) | |
| tree | 8d08824bf8d30d8bc3ade4493ed43bfbcae97bae /src/core/NEON/kernels | |
| parent | 1b2ee3eb6991efcbd09cde84ab0c383f15648738 (diff) | |
| download | ComputeLibrary-082630ba4e2de697b6d372dd35ffc1be6a42c346.tar.gz | |
Update CpuGemmConv2d and CpuFlatten to use CpuReshape operator
- Following CpuReshapeKernel Optimizations, update the CpuGemmConv2D and CpuFlatten
to use CpuReshape operator instead of CpuReshapeKernel
- Minor changes to comment in NEReorgLayerKernel.h
Resolves COMPMID-6504
Signed-off-by: Anitha Raj <anitha.raj@arm.com>
Change-Id: Ib6ee1fdc313d91249f9fe41c81e73324031c1ff4
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10186
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels')
| -rw-r--r-- | src/core/NEON/kernels/NEReorgLayerKernel.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/core/NEON/kernels/NEReorgLayerKernel.h b/src/core/NEON/kernels/NEReorgLayerKernel.h index 38a7d9f196..6e67eb364e 100644 --- a/src/core/NEON/kernels/NEReorgLayerKernel.h +++ b/src/core/NEON/kernels/NEReorgLayerKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2021 Arm Limited. + * Copyright (c) 2018-2021, 2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -21,8 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifndef ARM_COMPUTE_NEREORGLAYERKERNEL_H -#define ARM_COMPUTE_NEREORGLAYERKERNEL_H +#ifndef ACL_SRC_CORE_NEON_KERNELS_NEREORGLAYERKERNEL_H +#define ACL_SRC_CORE_NEON_KERNELS_NEREORGLAYERKERNEL_H #include "src/core/NEON/INEKernel.h" @@ -60,7 +60,7 @@ public: */ void configure(const ITensor *input, ITensor *output, int32_t stride); - /** Static function to check if given info will lead to a valid configuration of @ref cpu::kernels::CpuReshapeKernel + /** Static function to check if given info will lead to a valid configuration * * @param[in] input Source tensor info. Data type supported: All * @param[in] output Destination tensor info. Data type supported: Same as @p input @@ -80,4 +80,4 @@ private: int32_t _stride; }; } // namespace arm_compute -#endif /*ARM_COMPUTE_NEREORGLAYERKERNEL_H */ +#endif // ACL_SRC_CORE_NEON_KERNELS_NEREORGLAYERKERNEL_H |