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author | Renato Arantes <renato.arantes@arm.com> | 2024-01-26 17:31:18 +0000 |
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committer | Renato Barros Arantes <renato.arantes@arm.com> | 2024-03-21 11:15:30 +0000 |
commit | 36a75dafdbe6d6a3a6f50bd075fe01f5b7dace38 (patch) | |
tree | 0701d615ef30444b9d0789db691b59b81fd9e86e /src/core/NEON/kernels/arm_gemm/gemm_bf16bf16.cpp | |
parent | d2191150736dde66d79eb97e0c8ee506eef3c8fc (diff) | |
download | ComputeLibrary-36a75dafdbe6d6a3a6f50bd075fe01f5b7dace38.tar.gz |
[ONCPUML-1451] Add matmul kernel to enable bf16 to bf16 operations via PyTorch® autocast() function
The full range of tests must be added with [MLINFSW-482] epic due to the lack of reordering kernels implemented in Acl.
Co-Authored-By: David Mansell <David.Mansell@arm.com>
Change-Id: I820d316295a1ec94fdc89c37e4144a268f914c36
Signed-off-by: Renato Arantes <renato.arantes@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11169
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/gemm_bf16bf16.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/gemm_bf16bf16.cpp | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_bf16bf16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_bf16bf16.cpp new file mode 100644 index 0000000000..aa761b46e4 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/gemm_bf16bf16.cpp @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2017-2020, 2022-2024 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "bfloat.hpp" +#include "gemm_implementation.hpp" +#include "gemm_interleaved.hpp" + +#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#include "kernels/a64_ffinterleaved_bf16fp32_mmla_8x12.hpp" +#include "kernels/sve_ffinterleaved_bf16fp32_mmla_8x3VL.hpp" +#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS + +namespace arm_gemm { + +static const GemmImplementation<bfloat16, bfloat16> gemm_bf16bf16_methods[] = +{ +#ifdef __aarch64__ +#ifdef ARM_COMPUTE_ENABLE_BF16 +#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +GemmImplementation<bfloat16, bfloat16>::with_estimate( + GemmMethod::GEMM_INTERLEAVED, + "a64_ffinterleaved_bf16fp32_mmla_8x12", + KernelWeightFormat::VL256_BL64, + [](const GemmArgs &args) { return args._ci->has_bf16(); }, + [](const GemmArgs &args) { return GemmInterleavedFixedFormat<cls_a64_ffinterleaved_bf16fp32_mmla_8x12, bfloat16, bfloat16>::estimate_cycles<bfloat16>(args); }, + [](const GemmArgs &args) { return new GemmInterleavedFixedFormat<cls_a64_ffinterleaved_bf16fp32_mmla_8x12, bfloat16, bfloat16>(args); } +), +GemmImplementation<bfloat16, bfloat16>::with_estimate( + GemmMethod::GEMM_INTERLEAVED, + "sve_ffinterleaved_bf16fp32_mmla_8x3VL", + KernelWeightFormat::VL2VL_BL64, + [](const GemmArgs &args) { return args._ci->has_svebf16(); }, + [](const GemmArgs &args) { return GemmInterleavedFixedFormat<cls_sve_ffinterleaved_bf16fp32_mmla_8x3VL, bfloat16, bfloat16>::estimate_cycles<bfloat16>(args); }, + [](const GemmArgs &args) { return new GemmInterleavedFixedFormat<cls_sve_ffinterleaved_bf16fp32_mmla_8x3VL, bfloat16, bfloat16>(args); } +), +#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#endif // ARM_COMPUTE_ENABLE_BF16 +#endif // __aarch64__ +{ + GemmMethod::DEFAULT, + "", + nullptr, + nullptr, + nullptr +} +}; + +template<> +const GemmImplementation<bfloat16, bfloat16> *gemm_implementation_list<bfloat16, bfloat16>() { + return gemm_bf16bf16_methods; +} + +/* Explicitly instantiate the external functions for these types. */ +template UniqueGemmCommon<bfloat16, bfloat16> gemm<bfloat16, bfloat16, Nothing>(const GemmArgs &args, const Nothing &); +template bool has_opt_gemm<bfloat16, bfloat16, Nothing>(WeightFormat &weight_format, const GemmArgs &args, const Nothing &); +template KernelDescription get_gemm_method<bfloat16, bfloat16, Nothing>(const GemmArgs &args, const Nothing &); +template std::vector<KernelDescription> get_compatible_kernels<bfloat16, bfloat16, Nothing>(const GemmArgs &args, const Nothing &); + +} // namespace arm_gemm |