aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
diff options
context:
space:
mode:
authorMichael Tyler <michael.tyler@arm.com>2023-04-12 17:43:17 +0100
committermichael.tyler <michael.tyler@arm.com>2023-06-05 15:57:58 +0000
commit74921eee924625426429044decefe3673561b174 (patch)
tree654da1a95e3d42d6af8ad1ff27bb40d77b1fd8c5 /src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
parentdf5d9878008be9b60586df97ebfff197abb5195e (diff)
downloadComputeLibrary-74921eee924625426429044decefe3673561b174.tar.gz
Update CPU kernel implementations and guard directives
Resolves COMPMID-6023 Change-Id: I868975d14c4f98af6716726feda22405a6a4c891 Signed-off-by: Michael Tyler <michael.tyler@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9686 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp')
-rw-r--r--src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp62
1 files changed, 31 insertions, 31 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index 647103d3a4..5df848d1dd 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -196,38 +196,38 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
"add x5, x5, #0x10\n"
"cbz x3, 4f\n"
"3:" // Oddments
- "ldr h6, [x11, x4]\n"
- "ldr h5, [x10, x4]\n"
- "fadd v17.8h, v6.8h, v5.8h\n"
+ "ldr h17, [x11, x4]\n"
+ "ldr h16, [x10, x4]\n"
+ "fadd v18.8h, v17.8h, v16.8h\n"
"subs x3, x3, #0x1\n"
- "ldr h4, [x27, x4]\n"
- "ldr h3, [x26, x4]\n"
- "fadd v16.8h, v4.8h, v3.8h\n"
- "fadd v19.8h, v17.8h, v16.8h\n"
- "ldr h2, [x15, x4]\n"
- "ldr h1, [x14, x4]\n"
- "fadd v18.8h, v2.8h, v1.8h\n"
- "fadd v21.8h, v18.8h, v19.8h\n"
- "ldr h0, [x12, x4]\n"
- "ldr h31, [x28, x4]\n"
- "fadd v17.8h, v0.8h, v31.8h\n"
- "ldr h30, [x9, x4]\n"
- "ldr h29, [x25, x4]\n"
- "fadd v22.8h, v30.8h, v29.8h\n"
- "ldr h28, [x23, x4]\n"
- "ldr h27, [x22, x4]\n"
- "fadd v16.8h, v28.8h, v27.8h\n"
- "fadd v20.8h, v16.8h, v19.8h\n"
- "ldr h26, [x16, x4]\n"
- "ldr h25, [x13, x4]\n"
- "fadd v19.8h, v26.8h, v17.8h\n"
- "fadd v18.8h, v25.8h, v22.8h\n"
- "ldr h24, [x24, x4]\n"
- "ldr h23, [x21, x4]\n"
- "fadd v17.8h, v24.8h, v17.8h\n"
- "fadd v16.8h, v23.8h, v22.8h\n"
- "fadd v19.8h, v21.8h, v19.8h\n"
- "fadd v18.8h, v21.8h, v18.8h\n"
+ "ldr h17, [x27, x4]\n"
+ "ldr h16, [x26, x4]\n"
+ "fadd v16.8h, v17.8h, v16.8h\n"
+ "fadd v18.8h, v18.8h, v16.8h\n"
+ "ldr h17, [x15, x4]\n"
+ "ldr h16, [x14, x4]\n"
+ "fadd v16.8h, v17.8h, v16.8h\n"
+ "fadd v23.8h, v16.8h, v18.8h\n"
+ "ldr h17, [x12, x4]\n"
+ "ldr h16, [x28, x4]\n"
+ "fadd v22.8h, v17.8h, v16.8h\n"
+ "ldr h17, [x9, x4]\n"
+ "ldr h16, [x25, x4]\n"
+ "fadd v21.8h, v17.8h, v16.8h\n"
+ "ldr h17, [x23, x4]\n"
+ "ldr h16, [x22, x4]\n"
+ "fadd v16.8h, v17.8h, v16.8h\n"
+ "fadd v20.8h, v16.8h, v18.8h\n"
+ "ldr h17, [x16, x4]\n"
+ "ldr h16, [x13, x4]\n"
+ "fadd v19.8h, v17.8h, v22.8h\n"
+ "fadd v18.8h, v16.8h, v21.8h\n"
+ "ldr h17, [x24, x4]\n"
+ "ldr h16, [x21, x4]\n"
+ "fadd v17.8h, v17.8h, v22.8h\n"
+ "fadd v16.8h, v16.8h, v21.8h\n"
+ "fadd v19.8h, v23.8h, v19.8h\n"
+ "fadd v18.8h, v23.8h, v18.8h\n"
"add x4, x4, #0x2\n"
"fadd v17.8h, v17.8h, v20.8h\n"
"fadd v16.8h, v16.8h, v20.8h\n"