Update cpu depthwise kernels

Resolves: COMPMID-4688

Signed-off-by: Freddie Liardet <frederick.liardet@arm.com>
Change-Id: I9e22f967f5b7ccaebff2fc49f0253f621d62d820
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6030
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>

1 files changed, 151 insertions, 159 deletions

diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp
index 0d5d4176aa..ceba36d897 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp
@@ -25,7 +25,7 @@
 #include <cstddef>
 #include <cstdint>
 
-#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS)
+#if __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS)
 
 namespace arm_conv {
 namespace depthwise {
@@ -89,257 +89,249 @@ void sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl(
   __asm__ __volatile__(
     "ldr x19, [%x[params_struct], %[offsetof_args_outptrs]]\n"
     "ptrue p3.b\n"
-    "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n"
-    "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n"
+    "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n"
+    "add x14, %x[params_struct], %[offsetof_Args_inptrs]\n"
     "ld1rh { z19.h }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
-    "mov x14, #0x0\n"
+    "mov x13, #0x0\n"
     "ld1rh { z18.h }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
-    "cnth x13\n"
-    "ldp x12, x11, [x19, #0x0]\n"
-    "sub x10, XZR, x13\n"
-    "ldp x9, x28, [x19, #0x10]\n"
+    "cnth x12\n"
+    "ldp x11, x10, [x19, #0x0]\n"
+    "sub x9, XZR, x12\n"
+    "ldp x28, x27, [x19, #0x10]\n"
     "whilelt p2.h, XZR, %x[n_channels]\n"
-    "ld1h { z17.h }, p3/Z, [x16]\n" // Load from weights and bias
-    "mov z31.d, z17.d\n"
-    "ld1h { z0.h }, p3/Z, [x16, #1, MUL VL]\n" // Load from weights and bias
-    "cmp x13, %x[n_channels]\n"
-    "mov z30.d, z17.d\n"
-    "ld1h { z1.h }, p3/Z, [x16, #2, MUL VL]\n" // Load from weights and bias
-    "mov z29.d, z17.d\n"
-    "ld1h { z2.h }, p3/Z, [x16, #3, MUL VL]\n" // Load from weights and bias
-    "mov z28.d, z17.d\n"
-    "ld1h { z3.h }, p3/Z, [x16, #4, MUL VL]\n" // Load from weights and bias
-    "ld1h { z4.h }, p3/Z, [x16, #5, MUL VL]\n" // Load from weights and bias
-    "ld1h { z5.h }, p3/Z, [x16, #6, MUL VL]\n" // Load from weights and bias
-    "ld1h { z6.h }, p3/Z, [x16, #7, MUL VL]\n" // Load from weights and bias
-    "addvl x16, x16, #16\n"
-    "ldp x27, x26, [x15, #0x0]\n"
-    "ld1h { z7.h }, p3/Z, [x16, #-8, MUL VL]\n" // Load from weights and bias
-    "ld1h { z8.h }, p3/Z, [x16, #-7, MUL VL]\n" // Load from weights and bias
-    "addvl x16, x16, #-6\n"
-    "ld1h { z9.h }, p2/Z, [x27, x14, LSL #1]\n"
-    "ld1h { z10.h }, p2/Z, [x26, x14, LSL #1]\n"
-    "ldp x25, x23, [x15, #0x10]\n"
-    "ldp x22, x21, [x15, #0x20]\n"
-    "ldp x20, x19, [x15, #0x30]\n"
-    "ld1h { z11.h }, p2/Z, [x25, x14, LSL #1]\n"
-    "ld1h { z12.h }, p2/Z, [x23, x14, LSL #1]\n"
-    "ld1h { z13.h }, p2/Z, [x22, x14, LSL #1]\n"
-    "ld1h { z14.h }, p2/Z, [x21, x14, LSL #1]\n"
-    "ld1h { z15.h }, p2/Z, [x20, x14, LSL #1]\n"
-    "ld1h { z16.h }, p2/Z, [x19, x14, LSL #1]\n"
+    "ld1h { z17.h }, p3/Z, [x15]\n"
+    "cmp x12, %x[n_channels]\n"
+    "ld1h { z0.h }, p3/Z, [x15, #1, MUL VL]\n"
+    "ld1h { z1.h }, p3/Z, [x15, #2, MUL VL]\n"
+    "ld1h { z2.h }, p3/Z, [x15, #3, MUL VL]\n"
+    "ld1h { z3.h }, p3/Z, [x15, #4, MUL VL]\n"
+    "ld1h { z4.h }, p3/Z, [x15, #5, MUL VL]\n"
+    "ld1h { z5.h }, p3/Z, [x15, #6, MUL VL]\n"
+    "ld1h { z6.h }, p3/Z, [x15, #7, MUL VL]\n"
+    "addvl x15, x15, #16\n"
+    "ldp x26, x25, [x14, #0x0]\n"
+    "ld1h { z7.h }, p3/Z, [x15, #-8, MUL VL]\n"
+    "ld1h { z8.h }, p3/Z, [x15, #-7, MUL VL]\n"
+    "addvl x15, x15, #-6\n"
+    "ld1h { z9.h }, p2/Z, [x26, x13, LSL #1]\n"
+    "ld1h { z10.h }, p2/Z, [x25, x13, LSL #1]\n"
+    "ldp x24, x23, [x14, #0x10]\n"
+    "ldp x22, x21, [x14, #0x20]\n"
+    "ldp x20, x19, [x14, #0x30]\n"
+    "ld1h { z11.h }, p2/Z, [x24, x13, LSL #1]\n"
+    "ld1h { z12.h }, p2/Z, [x23, x13, LSL #1]\n"
+    "ld1h { z13.h }, p2/Z, [x22, x13, LSL #1]\n"
+    "ld1h { z14.h }, p2/Z, [x21, x13, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x20, x13, LSL #1]\n"
+    "ld1h { z16.h }, p2/Z, [x19, x13, LSL #1]\n"
     "bge 2f\n"
     "1:"  // Channel loop
-    "fmla z31.h, p3/M, z8.h, z9.h\n"
-    "ldr x24, [x15, #0x40]\n"
-    "whilelt p1.h, x13, %x[n_channels]\n"
-    "fmla z30.h, p3/M, z6.h, z9.h\n"
-    "ldr x20, [x15, #0x48]\n"
-    "inch x10\n"
-    "fmla z29.h, p3/M, z2.h, z9.h\n"
-    "ldr x23, [x15, #0x50]\n"
+    "movprfx z31, z17\n fmla z31.h, p3/M, z8.h, z9.h\n"
+    "ldr x26, [x14, #0x40]\n"
+    "whilelt p1.h, x12, %x[n_channels]\n"
+    "movprfx z30, z17\n fmla z30.h, p3/M, z6.h, z9.h\n"
+    "ldr x25, [x14, #0x48]\n"
+    "inch x9\n"
+    "movprfx z29, z17\n fmla z29.h, p3/M, z2.h, z9.h\n"
+    "ldr x24, [x14, #0x50]\n"
     "mov p0.b, p2.b\n"
-    "fmla z28.h, p3/M, z0.h, z9.h\n"
-    "ldr x19, [x15, #0x58]\n"
-    "ldr x22, [x15, #0x60]\n"
+    "movprfx z28, z17\n fmla z28.h, p3/M, z0.h, z9.h\n"
+    "ldr x23, [x14, #0x58]\n"
+    "ldr x22, [x14, #0x60]\n"
     "fmla z31.h, p3/M, z0.h, z10.h\n"
-    "ldr x21, [x15, #0x68]\n"
+    "ldr x21, [x14, #0x68]\n"
     "fmla z30.h, p3/M, z1.h, z12.h\n"
-    "ld1h { z12.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "ld1h { z12.h }, p2/Z, [x25, x13, LSL #1]\n"
     "fmla z31.h, p3/M, z1.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x24, x14, LSL #1]\n"
-    "ldr x20, [x15, #0x70]\n"
+    "ld1h { z11.h }, p2/Z, [x26, x13, LSL #1]\n"
+    "ldr x20, [x14, #0x70]\n"
     "fmla z30.h, p3/M, z2.h, z13.h\n"
-    "ld1h { z13.h }, p2/Z, [x23, x14, LSL #1]\n"
+    "ld1h { z13.h }, p2/Z, [x24, x13, LSL #1]\n"
     "fmla z31.h, p3/M, z3.h, z14.h\n"
-    "ld1h { z14.h }, p2/Z, [x19, x14, LSL #1]\n"
-    "ldr x19, [x15, #0x78]\n"
+    "ld1h { z14.h }, p2/Z, [x23, x13, LSL #1]\n"
+    "ldr x19, [x14, #0x78]\n"
     "fmla z30.h, p3/M, z0.h, z16.h\n"
-    "ldr x27, [x15, #0x80]\n"
+    "ldr x26, [x14, #0x80]\n"
     "fmla z29.h, p3/M, z3.h, z14.h\n"
-    "ldr x26, [x15, #0x88]\n"
-    "ldr x25, [x15, #0x90]\n"
+    "ldr x25, [x14, #0x88]\n"
+    "ldr x24, [x14, #0x90]\n"
     "fmla z31.h, p3/M, z4.h, z15.h\n"
-    "ld1h { z15.h }, p2/Z, [x22, x14, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x22, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z4.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x21, x14, LSL #1]\n"
+    "ld1h { z11.h }, p2/Z, [x21, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z0.h, z15.h\n"
-    "ld1h { z14.h }, p2/Z, [x26, x14, LSL #1]\n"
-    "ldr x23, [x15, #0x98]\n"
+    "ld1h { z14.h }, p2/Z, [x25, x13, LSL #1]\n"
+    "ldr x23, [x14, #0x98]\n"
     "fmla z31.h, p3/M, z2.h, z16.h\n"
-    "ld1h { z16.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "ld1h { z16.h }, p2/Z, [x20, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z5.h, z12.h\n"
-    "ld1h { z12.h }, p2/Z, [x27, x14, LSL #1]\n"
+    "ld1h { z12.h }, p2/Z, [x26, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z4.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x23, x14, LSL #1]\n"
-    "ldr x22, [x15, #0xa0]\n"
+    "ld1h { z11.h }, p2/Z, [x23, x13, LSL #1]\n"
+    "ldr x22, [x14, #0xa0]\n"
     "fmla z31.h, p3/M, z5.h, z13.h\n"
-    "ldr x21, [x15, #0xa8]\n"
+    "ldr x21, [x14, #0xa8]\n"
     "fmla z30.h, p3/M, z3.h, z13.h\n"
-    "ld1h { z13.h }, p2/Z, [x19, x14, LSL #1]\n"
+    "ld1h { z13.h }, p2/Z, [x19, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z1.h, z16.h\n"
-    "ldr x20, [x15, #0xb0]\n"
-    "ldr x19, [x15, #0xb8]\n"
+    "ldr x20, [x14, #0xb0]\n"
+    "ldr x19, [x14, #0xb8]\n"
     "fmla z31.h, p3/M, z6.h, z15.h\n"
     "fmla z28.h, p3/M, z4.h, z13.h\n"
-    "ld1h { z15.h }, p2/Z, [x25, x14, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x24, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z7.h, z12.h\n"
-    "ld1h { z13.h }, p2/Z, [x22, x14, LSL #1]\n"
-    "ldr x24, [x15, #0xc0]\n"
+    "ld1h { z13.h }, p2/Z, [x22, x13, LSL #1]\n"
+    "ldr x26, [x14, #0xc0]\n"
     "fmla z31.h, p3/M, z7.h, z16.h\n"
-    "ld1h { z16.h }, p2/Z, [x21, x14, LSL #1]\n"
+    "ld1h { z16.h }, p2/Z, [x21, x13, LSL #1]\n"
     "fmla z28.h, p3/M, z1.h, z12.h\n"
-    "ldp x27, x26, [x15, #0x0]\n"
+    "ld1h { z17.h }, p3/Z, [x15]\n"
     "fmla z29.h, p3/M, z6.h, z15.h\n"
-    "ld1h { z15.h }, p2/Z, [x19, x14, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x19, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z8.h, z11.h\n"
-    "ldp x25, x23, [x15, #0x10]\n"
-    "ldp x22, x21, [x15, #0x20]\n"
+    "ld1h { z0.h }, p3/Z, [x15, #1, MUL VL]\n"
+    "ld1h { z1.h }, p3/Z, [x15, #2, MUL VL]\n"
     "fmla z28.h, p3/M, z5.h, z14.h\n"
     "fmax z31.h, p3/M, z31.h, z19.h\n"
-    "ld1h { z14.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "ld1h { z14.h }, p2/Z, [x20, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z7.h, z13.h\n"
-    "ld1h { z9.h }, p1/Z, [x27, x13, LSL #1]\n"
+    "ld1h { z4.h }, p3/Z, [x15, #5, MUL VL]\n"
     "fmax z30.h, p3/M, z30.h, z19.h\n"
-    "ld1h { z10.h }, p1/Z, [x26, x13, LSL #1]\n"
-    "ld1h { z12.h }, p1/Z, [x23, x13, LSL #1]\n"
     "fmla z28.h, p3/M, z2.h, z11.h\n"
-    "fmin z31.h, p3/M, z31.h, z18.h\n"
-    "ld1h { z11.h }, p2/Z, [x24, x14, LSL #1]\n"
-    "inch x14\n"
+    "ld1h { z11.h }, p2/Z, [x26, x13, LSL #1]\n"
+    "inch x13\n"
     "fmla z29.h, p3/M, z5.h, z16.h\n"
-    "ld1h { z13.h }, p1/Z, [x22, x13, LSL #1]\n"
-    "whilelt p2.h, x14, %x[n_channels]\n"
+    "ldp x26, x25, [x14, #0x0]\n"
+    "whilelt p2.h, x13, %x[n_channels]\n"
+    "fmin z31.h, p3/M, z31.h, z18.h\n"
+    "ldp x24, x23, [x14, #0x10]\n"
     "fmin z30.h, p3/M, z30.h, z18.h\n"
-    "ldp x20, x19, [x15, #0x30]\n"
-    "ld1h { z17.h }, p3/Z, [x16]\n" // Load from weights and bias
+    "ldp x22, x21, [x14, #0x20]\n"
+    "ldp x20, x19, [x14, #0x30]\n"
     "fmla z28.h, p3/M, z3.h, z16.h\n"
-    "st1h { z31.h }, p0, [x12, x10, LSL #1]\n"
-    "mov z31.d, z17.d\n"
-    "ld1h { z16.h }, p1/Z, [x19, x13, LSL #1]\n"
+    "ld1h { z9.h }, p1/Z, [x26, x12, LSL #1]\n"
     "fmla z29.h, p3/M, z8.h, z15.h\n"
-    "st1h { z30.h }, p0, [x11, x10, LSL #1]\n"
-    "mov z30.d, z17.d\n"
-    "ld1h { z0.h }, p3/Z, [x16, #1, MUL VL]\n" // Load from weights and bias
+    "ld1h { z10.h }, p1/Z, [x25, x12, LSL #1]\n"
     "fmla z28.h, p3/M, z7.h, z14.h\n"
-    "ld1h { z14.h }, p1/Z, [x21, x13, LSL #1]\n"
-    "ld1h { z1.h }, p3/Z, [x16, #2, MUL VL]\n" // Load from weights and bias
+    "ld1h { z12.h }, p1/Z, [x23, x12, LSL #1]\n"
+    "ld1h { z13.h }, p1/Z, [x22, x12, LSL #1]\n"
     "fmax z29.h, p3/M, z29.h, z19.h\n"
-    "ld1h { z2.h }, p3/Z, [x16, #3, MUL VL]\n" // Load from weights and bias
+    "ld1h { z14.h }, p1/Z, [x21, x12, LSL #1]\n"
     "fmla z28.h, p3/M, z6.h, z15.h\n"
-    "ld1h { z15.h }, p1/Z, [x20, x13, LSL #1]\n"
-    "ld1h { z3.h }, p3/Z, [x16, #4, MUL VL]\n" // Load from weights and bias
+    "ld1h { z15.h }, p1/Z, [x20, x12, LSL #1]\n"
+    "ld1h { z16.h }, p1/Z, [x19, x12, LSL #1]\n"
     "fmin z29.h, p3/M, z29.h, z18.h\n"
-    "ld1h { z4.h }, p3/Z, [x16, #5, MUL VL]\n" // Load from weights and bias
-    "ld1h { z5.h }, p3/Z, [x16, #6, MUL VL]\n" // Load from weights and bias
+    "st1h { z31.h }, p0, [x11, x9, LSL #1]\n"
     "fmla z28.h, p3/M, z8.h, z11.h\n"
-    "ld1h { z11.h }, p1/Z, [x25, x13, LSL #1]\n"
-    "inch x13\n"
+    "ld1h { z11.h }, p1/Z, [x24, x12, LSL #1]\n"
+    "inch x12\n"
     "fmax z28.h, p3/M, z28.h, z19.h\n"
-    "st1h { z29.h }, p0, [x9, x10, LSL #1]\n"
-    "cmp x13, %x[n_channels]\n"
-    "mov z29.d, z17.d\n"
-    "ld1h { z6.h }, p3/Z, [x16, #7, MUL VL]\n" // Load from weights and bias
-    "addvl x16, x16, #16\n"
+    "st1h { z30.h }, p0, [x10, x9, LSL #1]\n"
+    "cmp x12, %x[n_channels]\n"
     "fmin z28.h, p3/M, z28.h, z18.h\n"
-    "ld1h { z7.h }, p3/Z, [x16, #-8, MUL VL]\n" // Load from weights and bias
-    "ld1h { z8.h }, p3/Z, [x16, #-7, MUL VL]\n" // Load from weights and bias
-    "addvl x16, x16, #-6\n"
-    "st1h { z28.h }, p0, [x28, x10, LSL #1]\n"
-    "mov z28.d, z17.d\n"
+    "st1h { z29.h }, p0, [x28, x9, LSL #1]\n"
+    "ld1h { z2.h }, p3/Z, [x15, #3, MUL VL]\n"
+    "ld1h { z3.h }, p3/Z, [x15, #4, MUL VL]\n"
+    "ld1h { z5.h }, p3/Z, [x15, #6, MUL VL]\n"
+    "ld1h { z6.h }, p3/Z, [x15, #7, MUL VL]\n"
+    "addvl x15, x15, #16\n"
+    "st1h { z28.h }, p0, [x27, x9, LSL #1]\n"
+    "ld1h { z7.h }, p3/Z, [x15, #-8, MUL VL]\n"
+    "ld1h { z8.h }, p3/Z, [x15, #-7, MUL VL]\n"
+    "addvl x15, x15, #-6\n"
     "blt 1b\n"
     "2:"  // Channel tail
-    "fmla z31.h, p3/M, z8.h, z9.h\n"
-    "ldr x24, [x15, #0x40]\n"
-    "inch x10\n"
-    "fmla z30.h, p3/M, z6.h, z9.h\n"
-    "ldr x20, [x15, #0x48]\n"
+    "movprfx z31, z17\n fmla z31.h, p3/M, z8.h, z9.h\n"
+    "ldr x26, [x14, #0x40]\n"
+    "inch x9\n"
+    "movprfx z30, z17\n fmla z30.h, p3/M, z6.h, z9.h\n"
+    "ldr x25, [x14, #0x48]\n"
     "mov p0.b, p2.b\n"
-    "fmla z29.h, p3/M, z2.h, z9.h\n"
-    "ldr x23, [x15, #0x50]\n"
-    "fmla z28.h, p3/M, z0.h, z9.h\n"
-    "ldr x19, [x15, #0x58]\n"
-    "ldr x22, [x15, #0x60]\n"
+    "movprfx z29, z17\n fmla z29.h, p3/M, z2.h, z9.h\n"
+    "ldr x24, [x14, #0x50]\n"
+    "movprfx z28, z17\n fmla z28.h, p3/M, z0.h, z9.h\n"
+    "ldr x23, [x14, #0x58]\n"
+    "ldr x22, [x14, #0x60]\n"
     "fmla z31.h, p3/M, z0.h, z10.h\n"
-    "ldr x21, [x15, #0x68]\n"
+    "ldr x21, [x14, #0x68]\n"
     "fmla z30.h, p3/M, z1.h, z12.h\n"
-    "ld1h { z12.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "ld1h { z12.h }, p2/Z, [x25, x13, LSL #1]\n"
     "fmla z31.h, p3/M, z1.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x24, x14, LSL #1]\n"
-    "ldr x20, [x15, #0x70]\n"
+    "ld1h { z11.h }, p2/Z, [x26, x13, LSL #1]\n"
+    "ldr x20, [x14, #0x70]\n"
     "fmla z30.h, p3/M, z2.h, z13.h\n"
-    "ld1h { z13.h }, p2/Z, [x23, x14, LSL #1]\n"
+    "ld1h { z13.h }, p2/Z, [x24, x13, LSL #1]\n"
     "fmla z31.h, p3/M, z3.h, z14.h\n"
-    "ld1h { z14.h }, p2/Z, [x19, x14, LSL #1]\n"
-    "ldr x19, [x15, #0x78]\n"
+    "ld1h { z14.h }, p2/Z, [x23, x13, LSL #1]\n"
+    "ldr x19, [x14, #0x78]\n"
     "fmla z30.h, p3/M, z0.h, z16.h\n"
-    "ldr x27, [x15, #0x80]\n"
+    "ldr x26, [x14, #0x80]\n"
     "fmla z29.h, p3/M, z3.h, z14.h\n"
-    "ldr x26, [x15, #0x88]\n"
-    "ldr x25, [x15, #0x90]\n"
+    "ldr x25, [x14, #0x88]\n"
+    "ldr x24, [x14, #0x90]\n"
     "fmla z31.h, p3/M, z4.h, z15.h\n"
-    "ld1h { z15.h }, p2/Z, [x22, x14, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x22, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z4.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x21, x14, LSL #1]\n"
+    "ld1h { z11.h }, p2/Z, [x21, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z0.h, z15.h\n"
-    "ld1h { z14.h }, p2/Z, [x26, x14, LSL #1]\n"
-    "ldr x23, [x15, #0x98]\n"
+    "ld1h { z14.h }, p2/Z, [x25, x13, LSL #1]\n"
+    "ldr x23, [x14, #0x98]\n"
     "fmla z31.h, p3/M, z2.h, z16.h\n"
-    "ld1h { z16.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "ld1h { z16.h }, p2/Z, [x20, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z5.h, z12.h\n"
-    "ld1h { z12.h }, p2/Z, [x27, x14, LSL #1]\n"
+    "ld1h { z12.h }, p2/Z, [x26, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z4.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x23, x14, LSL #1]\n"
-    "ldr x22, [x15, #0xa0]\n"
+    "ld1h { z11.h }, p2/Z, [x23, x13, LSL #1]\n"
+    "ldr x22, [x14, #0xa0]\n"
     "fmla z31.h, p3/M, z5.h, z13.h\n"
-    "ldr x21, [x15, #0xa8]\n"
+    "ldr x21, [x14, #0xa8]\n"
     "fmla z30.h, p3/M, z3.h, z13.h\n"
-    "ld1h { z13.h }, p2/Z, [x19, x14, LSL #1]\n"
+    "ld1h { z13.h }, p2/Z, [x19, x13, LSL #1]\n"
     "fmla z29.h, p3/M, z1.h, z16.h\n"
-    "ldr x20, [x15, #0xb0]\n"
-    "ldr x19, [x15, #0xb8]\n"
+    "ldr x20, [x14, #0xb0]\n"
+    "ldr x19, [x14, #0xb8]\n"
     "fmla z31.h, p3/M, z6.h, z15.h\n"
     "fmla z28.h, p3/M, z4.h, z13.h\n"
-    "ld1h { z15.h }, p2/Z, [x25, x14, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x24, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z7.h, z12.h\n"
-    "ld1h { z13.h }, p2/Z, [x22, x14, LSL #1]\n"
-    "ldr x24, [x15, #0xc0]\n"
+    "ld1h { z13.h }, p2/Z, [x22, x13, LSL #1]\n"
+    "ldr x26, [x14, #0xc0]\n"
     "fmla z31.h, p3/M, z7.h, z16.h\n"
-    "ld1h { z16.h }, p2/Z, [x21, x14, LSL #1]\n"
+    "ld1h { z16.h }, p2/Z, [x21, x13, LSL #1]\n"
     "fmla z28.h, p3/M, z1.h, z12.h\n"
     "fmla z29.h, p3/M, z6.h, z15.h\n"
-    "ld1h { z15.h }, p2/Z, [x19, x14, LSL #1]\n"
+    "ld1h { z15.h }, p2/Z, [x19, x13, LSL #1]\n"
     "fmla z30.h, p3/M, z8.h, z11.h\n"
     "fmla z28.h, p3/M, z5.h, z14.h\n"
-    "ld1h { z14.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "ld1h { z14.h }, p2/Z, [x20, x13, LSL #1]\n"
     "fmax z31.h, p3/M, z31.h, z19.h\n"
     "fmla z29.h, p3/M, z7.h, z13.h\n"
     "fmax z30.h, p3/M, z30.h, z19.h\n"
     "fmla z28.h, p3/M, z2.h, z11.h\n"
-    "ld1h { z11.h }, p2/Z, [x24, x14, LSL #1]\n"
+    "ld1h { z11.h }, p2/Z, [x26, x13, LSL #1]\n"
     "fmin z31.h, p3/M, z31.h, z18.h\n"
-    "st1h { z31.h }, p0, [x12, x10, LSL #1]\n"
+    "st1h { z31.h }, p0, [x11, x9, LSL #1]\n"
     "fmla z29.h, p3/M, z5.h, z16.h\n"
     "fmla z28.h, p3/M, z3.h, z16.h\n"
     "fmin z30.h, p3/M, z30.h, z18.h\n"
-    "st1h { z30.h }, p0, [x11, x10, LSL #1]\n"
+    "st1h { z30.h }, p0, [x10, x9, LSL #1]\n"
     "fmla z28.h, p3/M, z7.h, z14.h\n"
     "fmla z29.h, p3/M, z8.h, z15.h\n"
     "fmla z28.h, p3/M, z6.h, z15.h\n"
     "fmax z29.h, p3/M, z29.h, z19.h\n"
     "fmla z28.h, p3/M, z8.h, z11.h\n"
     "fmin z29.h, p3/M, z29.h, z18.h\n"
-    "st1h { z29.h }, p0, [x9, x10, LSL #1]\n"
+    "st1h { z29.h }, p0, [x28, x9, LSL #1]\n"
     "fmax z28.h, p3/M, z28.h, z19.h\n"
     "fmin z28.h, p3/M, z28.h, z18.h\n"
-    "st1h { z28.h }, p0, [x28, x10, LSL #1]\n"
+    "st1h { z28.h }, p0, [x27, x9, LSL #1]\n"
     :
     : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (&params_struct)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z28", "z29", "z30", "z31"
   );
 }
 
 }  // namespace depthwise
 }  // namespace arm_conv
 
-#endif  // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS)
+#endif  // __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS)