COMPMID-556: Cherry-picked minor fixes from Github

- Added --api 21 to documentation
- Removed include of a runtime header in Core
- cherry-picked 2 small fixes from Github

commit 869d424d6fd5df7b15a858f2c5f853536f7a0aca
Author: giorgio-arena <arena.cpp@gmail.com>
Date:   Mon Oct 23 16:58:59 2017 +0100

    Update 00_introduction.dox

commit f054c210e493111061a458b887f7c4edaca06a9f
Author: Forrest Iandola <fiandola@gmail.com>
Date:   Mon Oct 16 00:44:24 2017 -0700

    fix comment

    typo
    kernerl's --> kernel's

Change-Id: I0a3893148a9565acbfd18d340da41845ce3ad44f
Reviewed-on: http://mpd-gerrit.cambridge.arm.com/93460
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: Kaizen <jeremy.johnson+kaizengerrit@arm.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp b/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp
index 8642a19f39..60a3a1b636 100644
--- a/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp
+++ b/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp
@@ -1082,7 +1082,7 @@ public:
                     the third thread [16,24] and the fourth thread [25,31].
 
                     The algorithm outer loop iterates over Z, P, Y, X where P is the depth/3rd dimension of each kernel. This order is not arbitrary, the main benefit of this
-                    is that we setup the neon registers containing the kernerl's values only once and then compute each XY using the preloaded registers as opposed as doing this for every XY value.
+                    is that we setup the neon registers containing the kernel's values only once and then compute each XY using the preloaded registers as opposed as doing this for every XY value.
 
                     The algorithm does not require allocating any additional memory amd computes the results directly in-place in two stages:
                         1) Convolve plane 0 with kernel 0 and initialize the corresponding output plane with these values.