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| author | Isabella Gottardi <isabella.gottardi@arm.com> | 2018-02-12 14:59:19 +0000 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:49:16 +0000 |
| commit | 3f217ec4ff11e20fe686beb9a28d0bbd80a56cd6 (patch) | |
| tree | 81db8baab925af5b416b66d0328be2eb49543824 /src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp | |
| parent | d9eb27597eabe5b7c17520f4f9b3f8a282d72573 (diff) | |
| download | ComputeLibrary-3f217ec4ff11e20fe686beb9a28d0bbd80a56cd6.tar.gz | |
COMPMID-908 - Merge Activation layer with Convolution Layer (NEON. CL, GLES)
Change-Id: Iab06d0768ecf805b841e601185608aae88cf9166
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/120874
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Diffstat (limited to 'src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp')
| -rw-r--r-- | src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp b/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp index bef30d5042..67a1530431 100644 --- a/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp +++ b/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp @@ -50,7 +50,8 @@ BorderSize GCDirectConvolutionLayerKernel<kernel_size>::border_size( } template <unsigned int kernel_size> -void GCDirectConvolutionLayerKernel<kernel_size>::configure(const IGCTensor *input, const IGCTensor *weights, const IGCTensor *bias, IGCTensor *output, const PadStrideInfo &conv_info) +void GCDirectConvolutionLayerKernel<kernel_size>::configure(const IGCTensor *input, const IGCTensor *weights, const IGCTensor *bias, IGCTensor *output, + const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info) { ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F16, DataType::F32); ARM_COMPUTE_ERROR_ON(weights->info()->dimension(2) != input->info()->dimension(2)); @@ -58,6 +59,7 @@ void GCDirectConvolutionLayerKernel<kernel_size>::configure(const IGCTensor *inp ARM_COMPUTE_ERROR_ON(weights->info()->num_dimensions() > 4); ARM_COMPUTE_ERROR_ON_MSG((kernel_size == 3 && std::get<0>(conv_info.stride()) > 2), "Strides larger than 2 not supported in 3x3 direct convolution!"); ARM_COMPUTE_ERROR_ON(kernel_size != weights->info()->dimension(0)); + ARM_COMPUTE_ERROR_ON(act_info.enabled() && act_info.activation() != ActivationLayerInfo::ActivationFunction::RELU && act_info.activation() != ActivationLayerInfo::ActivationFunction::LOGISTIC); if(bias != nullptr) { @@ -108,6 +110,16 @@ void GCDirectConvolutionLayerKernel<kernel_size>::configure(const IGCTensor *inp std::string dt_name = (input->info()->data_type() == DataType::F32) ? "DATA_TYPE_FP32" : "DATA_TYPE_FP16"; options.emplace(("#define " + dt_name)); + // Activation information in case of a fused activation + if(act_info.enabled()) + { + options.emplace("#define FUSED_ACTIVATION"); + options.emplace(("#define " + string_from_activation_func(act_info.activation()))); + options.emplace(("#define ACT_OP " + lower_string(string_from_activation_func(act_info.activation())) + "_op")); + options.emplace(("#define A_VAL " + float_to_string_with_full_precision(act_info.a()))); + options.emplace(("#define B_VAL " + float_to_string_with_full_precision(act_info.b()))); + } + unsigned int num_elems_read_per_iteration_x = kernel_size * _conv_stride_x; unsigned int num_elems_read_per_iteration_y = 1; unsigned int num_elems_written_per_iteration_x = 1; |