Add Texture Pipe Support for Matmul Lhs T/NT Rhs T kernels

Resolves: COMPMID-5952, COMPMID-5956
Change-Id: Idbd14538e7660792254072fa9631a6f03966f89b
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9371
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>

1 files changed, 14 insertions, 15 deletions

diff --git a/src/core/CL/cl_kernels/common/mat_mul.cl b/src/core/CL/cl_kernels/common/mat_mul.cl
index 90ebf80a6a..90d485e815 100644
--- a/src/core/CL/cl_kernels/common/mat_mul.cl
+++ b/src/core/CL/cl_kernels/common/mat_mul.cl
@@ -160,11 +160,12 @@ __kernel void mat_mul_native_nt_nt(
  * @note The block's dimensions used for the LHS and RHS matrices (M0, N0 and K0) must be passed at compile time using -DN0, -DM0 and -DK0 (e.g. -DN0=8, -DM0=4, -DK0=4).
  * @note The number of leftover outputs rows/columns must be passed using -DPARTIAL_STORE_N0 and -DPARTIAL_STORE_M0 (e.g. -DPARTIAL_STORE_N0=2, -DPARTIAL_STORE_M0=3)
  * @note The dimension K must be passed at compile time using -DK (e.g. -DK=6)
+ * @note The tensor type ("BUFFER" or "IMAGE") of the rhs tensor must be passed at compile time using -DRHS_TENSOR_TYPE (e.g. -DRHS_TENSOR_TYPE=BUFFER)
  * @note The kernel name in uppercase must be passed at compile time (e.g. -DMAT_MUL_NATIVE_NT_T)
  * @note Only the following configurations of M0, N0 and K0 are currently supported:
  *  - M0 > 0
  *  - N0 = 1, 2, 3, 4, 8, 16
- *  - K0 = 1, 2, 3, 4, 8, 16
+ *  - K0 = 1, 2, 3, 4, 8, 16 (only 4, 8, 16 if RHS_TENSOR_TYPE=IMAGE)
  * @note Values > 8 for M0, N0 and K0 are not expected to be efficient
  *
  * @param[in]  lhs_ptr                           Pointer to the lhs matrix. Supported data types: F32/F16
@@ -174,6 +175,7 @@ __kernel void mat_mul_native_nt_nt(
  * @param[in]  lhs_h                             The height of the lhs tensor
  * @param[in]  lhs_n                             Number of the matrices (buffers) in the batch
  * @param[in]  lhs_offset_first_element_in_bytes The offset of the first element in the lhs matrix
+ * @param[in]  rhs_img                           (Optional) Read only cl_image object for the rhs tensor. Included when RHS_TENSOR_TYPE=IMAGE
  * @param[in]  rhs_ptr                           Pointer to the rhs matrix. Supported data types: same as @p lhs_ptr
  * @param[in]  rhs_stride_y                      Stride of the rhs matrix in Y (2nd) dimension (in bytes)
  * @param[in]  rhs_stride_z                      Stride of the rhs tensor in Z (3rd) dimension (in bytes)
@@ -190,7 +192,7 @@ __kernel void mat_mul_native_nt_nt(
  * @param[in]  dst_offset_first_element_in_bytes The offset of the first element in the dst matrix
  */
 __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
-                                  TENSOR3D_T(rhs, BUFFER),
+                                  TENSOR3D_T(rhs, RHS_TENSOR_TYPE),
                                   TENSOR3D_T(dst, BUFFER))
 
 {
@@ -200,7 +202,6 @@ __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
 
     // Compute LHS/RHS/DST matrix address
     lhs_offset_first_element_in_bytes += y * lhs_stride_y + z * lhs_stride_z;
-    rhs_offset_first_element_in_bytes += x * rhs_stride_y + z * rhs_stride_z;
     dst_offset_first_element_in_bytes += x * sizeof(DATA_TYPE) + y * dst_stride_y + z * dst_stride_z;
 
     // Initialize the accumulators
@@ -211,6 +212,7 @@ __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
         acc[i].v = 0.f;
     })
 
+    const int rhs_z = z * rhs_h;
     int k;
     for(k = 0; k <= K - K0; k += K0)
     {
@@ -229,7 +231,7 @@ __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
 
         // Load tile from the lhs/rhs tensors
         T_LOAD(DATA_TYPE, M0, K0, BUFFER, lhs, 0, 0, 1, lhs_stride_y, a);
-        T_LOAD(DATA_TYPE, N0, K0, BUFFER, rhs, 0, 0, 1, rhs_stride_y, b);
+        T_LOAD(DATA_TYPE, N0, K0, RHS_TENSOR_TYPE, rhs, k, x + rhs_z, 1, rhs_stride_y, b);
 
 #if GPU_ARCH == GPU_ARCH_MIDGARD
         // This part is written to decrease the number of loop unrollings caused
@@ -251,7 +253,6 @@ __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
 #endif // GPU_ARCH == GPU_ARCH_MIDGARD
 
         lhs_offset_first_element_in_bytes += K0 * sizeof(DATA_TYPE);
-        rhs_offset_first_element_in_bytes += K0 * sizeof(DATA_TYPE);
     }
 
 #if K % K0 != 0
@@ -273,7 +274,7 @@ __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
 
         // Load tile from the lhs/rhs tensors
         T_LOAD(DATA_TYPE, M0, 1, BUFFER, lhs, 0, 0, 1, lhs_stride_y, a);
-        T_LOAD(DATA_TYPE, N0, 1, BUFFER, rhs, 0, 0, 1, rhs_stride_y, b);
+        T_LOAD(DATA_TYPE, N0, 1, BUFFER, rhs, k, x + rhs_z, 1, rhs_stride_y, b);
 
 #if GPU_ARCH == GPU_ARCH_MIDGARD
         // See the main loop for the explanation of this part
@@ -288,7 +289,6 @@ __kernel void mat_mul_native_nt_t(TENSOR3D_T(lhs, BUFFER),
 #endif // GPU_ARCH == GPU_ARCH_MIDGARD
 
         lhs_offset_first_element_in_bytes += 1 * sizeof(DATA_TYPE);
-        rhs_offset_first_element_in_bytes += 1 * sizeof(DATA_TYPE);
     }
 #endif // K % K0 != 0
 
@@ -464,11 +464,12 @@ __kernel void mat_mul_native_t_nt(
  * @note The block's dimensions used for the LHS and RHS matrices (M0, N0 and K0) must be passed at compile time using -DN0, -DM0 and -DK0 (e.g. -DN0=8, -DM0=4, -DK0=4).
  * @note The number of leftover outputs rows/columns must be passed using -DPARTIAL_STORE_N0 and -DPARTIAL_STORE_M0 (e.g. -DPARTIAL_STORE_N0=2, -DPARTIAL_STORE_M0=3)
  * @note The dimension K must be passed at compile time using -DK (e.g. -DK=6)
+ * @note The tensor type ("BUFFER" or "IMAGE") of the rhs tensor must be passed at compile time using -DRHS_TENSOR_TYPE (e.g. -DRHS_TENSOR_TYPE=BUFFER)
  * @note The kernel name in uppercase must be passed at compile time (e.g. -DMAT_MUL_NATIVE_T_NT)
  * @note Only the following configurations of M0, N0 and K0 are currently supported:
  *  - M0 = 1, 2, 3, 4, 8, 16
  *  - N0 = 1, 2, 3, 4, 8, 16
- *  - K0 = 1, 2, 3, 4, 8, 16
+ *  - K0 = 1, 2, 3, 4, 8, 16 (only 4, 8, 16 if RHS_TENSOR_TYPE=IMAGE)
  * @note Values > 8 for M0, N0 and K0 are not expected to be efficient
  *
  * @param[in]  lhs_ptr                           Pointer to the lhs matrix. Supported data types: F32/F16
@@ -478,6 +479,7 @@ __kernel void mat_mul_native_t_nt(
  * @param[in]  lhs_h                             The height of the lhs tensor
  * @param[in]  lhs_n                             Number of the matrices (buffers) in the batch
  * @param[in]  lhs_offset_first_element_in_bytes The offset of the first element in the lhs matrix
+ * @param[in]  rhs_img                           (Optional) Read only cl_image object for the rhs tensor. Included when RHS_TENSOR_TYPE=IMAGE
  * @param[in]  rhs_ptr                           Pointer to the rhs matrix. Supported data types: same as @p lhs_ptr
  * @param[in]  rhs_stride_y                      Stride of the rhs matrix in Y (2nd) dimension (in bytes)
  * @param[in]  rhs_stride_z                      Stride of the rhs tensor in Z (3rd) dimension (in bytes)
@@ -495,7 +497,7 @@ __kernel void mat_mul_native_t_nt(
  */
 __kernel void mat_mul_native_t_t(
     TENSOR3D_T(lhs, BUFFER),
-    TENSOR3D_T(rhs, BUFFER),
+    TENSOR3D_T(rhs, RHS_TENSOR_TYPE),
     TENSOR3D_T(dst, BUFFER))
 {
     const uint x = GET_SPATIAL_IDX(0, N0, PARTIAL_STORE_N0);
@@ -504,7 +506,6 @@ __kernel void mat_mul_native_t_t(
 
     // Compute LHS/RHS/DST matrix address
     lhs_offset_first_element_in_bytes += y * sizeof(DATA_TYPE) + z * lhs_stride_z;
-    rhs_offset_first_element_in_bytes += x * rhs_stride_y + z * rhs_stride_z;
     dst_offset_first_element_in_bytes += x * sizeof(DATA_TYPE) + y * dst_stride_y + z * dst_stride_z;
 
     // Initialize the accumulators
@@ -515,6 +516,7 @@ __kernel void mat_mul_native_t_t(
         acc[i].v = 0.f;
     })
 
+    const int rhs_z = z * rhs_h;
     int k;
     for(k = 0; k <= K - K0; k += K0)
     {
@@ -533,8 +535,7 @@ __kernel void mat_mul_native_t_t(
 
         // Load tile from the lhs/rhs tensors
         T_LOAD(DATA_TYPE, K0, M0, BUFFER, lhs, 0, 0, 1, lhs_stride_y, a);
-        T_LOAD(DATA_TYPE, N0, K0, BUFFER, rhs, 0, 0, 1, rhs_stride_y, b);
-
+        T_LOAD(DATA_TYPE, N0, K0, RHS_TENSOR_TYPE, rhs, k, x + rhs_z, 1, rhs_stride_y, b);
 #if GPU_ARCH == GPU_ARCH_MIDGARD
         // For explanation, see mat_mul_native_nt_t
         TILE(DATA_TYPE, M0, K0, at);
@@ -562,7 +563,6 @@ __kernel void mat_mul_native_t_t(
 #endif // GPU_ARCH == GPU_ARCH_MIDGARD
 
         lhs_offset_first_element_in_bytes += K0 * lhs_stride_y;
-        rhs_offset_first_element_in_bytes += K0 * sizeof(DATA_TYPE);
     }
 
 #ifdef K % K0 != 0
@@ -584,7 +584,7 @@ __kernel void mat_mul_native_t_t(
 
         // Load tile from the lhs/rhs tensors
         T_LOAD(DATA_TYPE, 1, M0, BUFFER, lhs, 0, 0, 1, lhs_stride_y, a);
-        T_LOAD(DATA_TYPE, N0, 1, BUFFER, rhs, 0, 0, 1, rhs_stride_y, b);
+        T_LOAD(DATA_TYPE, N0, 1, BUFFER, rhs, k, x + rhs_z, 1, rhs_stride_y, b);
 
 #if GPU_ARCH == GPU_ARCH_MIDGARD
         // For explanation, see mat_mul_native_nt_t
@@ -607,7 +607,6 @@ __kernel void mat_mul_native_t_t(
 #endif // GPU_ARCH == GPU_ARCH_MIDGARD
 
         lhs_offset_first_element_in_bytes += 1 * lhs_stride_y;
-        rhs_offset_first_element_in_bytes += 1 * sizeof(DATA_TYPE);
     }
 #endif // K % K0 != 0