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| author | Giorgio Arena <giorgio.arena@arm.com> | 2018-06-20 11:46:42 +0100 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:53:57 +0000 |
| commit | d051e97e36b9981f411093904cc019c2c7f9ac75 (patch) | |
| tree | 5ed3b8cb513928aac450f5ff9440e5a3fa017217 /src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl | |
| parent | f1c2bf0971dd1c996da149faf3dd669d566074c7 (diff) | |
| download | ComputeLibrary-d051e97e36b9981f411093904cc019c2c7f9ac75.tar.gz | |
COMPMID-811 Add NHWC data format support for CL depthwise convolution
Change-Id: I574f7945f0be009c638d860028bce8b52b4120fd
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/136484
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Diffstat (limited to 'src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl')
| -rw-r--r-- | src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl b/src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl index b58dc7af72..ae87420774 100644 --- a/src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl +++ b/src/core/CL/cl_kernels/direct_convolution_1x1_3x3_5x5_quantized.cl @@ -296,7 +296,12 @@ __kernel void output_stage_quantized( #if defined(HAS_BIAS) // Load and add bias +#if defined(NCHW) int bias_value = *((__global int *)(vector_offset(&bias, get_global_id(2)))); +#else // defined(NCHW) + int16 bias_value = vload16(0, ((__global int *)(vector_offset(&bias, get_global_id(0) * 16)))); +#endif // defined(NCHW) + vals += (int16)(bias_value); #endif //defined(HAS_BIAS) |