COMPMID-1540 Implement YOLOLayer on NEON

Change-Id: Ice28996959dc666fff5e8ae486c1ff8093db083f
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148367
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>

12 files changed, 628 insertions, 0 deletions

diff --git a/arm_compute/core/NEON/NEKernels.h b/arm_compute/core/NEON/NEKernels.h
index bbeb604140..2b76c0bd29 100644
--- a/arm_compute/core/NEON/NEKernels.h
+++ b/arm_compute/core/NEON/NEKernels.h
@@ -117,5 +117,6 @@
 #include "arm_compute/core/NEON/kernels/NEWeightsReshapeKernel.h"
 #include "arm_compute/core/NEON/kernels/NEWidthConcatenateLayerKernel.h"
 #include "arm_compute/core/NEON/kernels/NEWinogradConvolutionLayerKernel.h"
+#include "arm_compute/core/NEON/kernels/NEYOLOLayerKernel.h"
 
 #endif /* __ARM_COMPUTE_NEKERNELS_H__ */
diff --git a/arm_compute/core/NEON/kernels/NEYOLOLayerKernel.h b/arm_compute/core/NEON/kernels/NEYOLOLayerKernel.h
new file mode 100644
index 0000000000..c0cfcc049e
--- /dev/null
+++ b/arm_compute/core/NEON/kernels/NEYOLOLayerKernel.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEYOLOLAYERKERNEL_H__
+#define __ARM_COMPUTE_NEYOLOLAYERKERNEL_H__
+
+#include "arm_compute/core/NEON/INEKernel.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Interface for the YOLO layer kernel. */
+class NEYOLOLayerKernel : public INEKernel
+{
+public:
+    const char *name() const override
+    {
+        return "NEYOLOLayerKernel";
+    }
+    /** Constructor */
+    NEYOLOLayerKernel();
+    /** Prevent instances of this class from being copied (As this class contains pointers) */
+    NEYOLOLayerKernel(const NEYOLOLayerKernel &) = delete;
+    /** Default move constructor */
+    NEYOLOLayerKernel(NEYOLOLayerKernel &&) = default;
+    /** Prevent instances of this class from being copied (As this class contains pointers) */
+    NEYOLOLayerKernel &operator=(const NEYOLOLayerKernel &) = delete;
+    /** Default move assignment operator */
+    NEYOLOLayerKernel &operator=(NEYOLOLayerKernel &&) = default;
+    /** Default destructor */
+    ~NEYOLOLayerKernel() = default;
+    /** Set the input and output tensor.
+     *
+     * @note If the output tensor is a nullptr or is equal to the input, the activation function will be performed in-place
+     *
+     * @param[in, out] input       Source tensor. In case of @p output tensor = nullptr, this tensor will store the result
+     *                             of the activation function. Data types supported: F16/F32.
+     * @param[out]     output      Destination tensor. Data type supported: same as @p input
+     * @param[in]      act_info    Activation layer parameters.
+     * @param[in]      num_classes Number of classes to activate (must be submultiple of @p input channels)
+     */
+    void configure(ITensor *input, ITensor *output, const ActivationLayerInfo &act_info, int32_t num_classes);
+    /** Static function to check if given info will lead to a valid configuration of @ref NEYOLOLayerKernel
+     *
+     * @param[in] input       Source tensor info. In case of @p output tensor info = nullptr, this tensor will store the result
+     *                        of the activation function. Data types supported: F16/F32.
+     * @param[in] output      Destination tensor info. Data type supported: same as @p input
+     * @param[in] act_info    Activation layer information.
+     * @param[in] num_classes Number of classes to activate (must be submultiple of @p input channels)
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &act_info, int32_t num_classes);
+
+    // Inherited methods overridden:
+    void run(const Window &window, const ThreadInfo &info) override;
+
+private:
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+    /** Function to run YOLO layer on fp16
+     *
+     * @param[in] window Region on which to execute the kernel.
+     */
+    void yolo_layer_fp16_nchw(const Window &window);
+    /** Function to run batch normalization on fp16 on tensors with NHWC format
+     *
+     * @param[in] window Region on which to execute the kernel.
+     */
+    void yolo_layer_fp16_nhwc(const Window &window);
+#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
+    /** Function to run YOLO layer on fp32
+     *
+     * @param[in] window Region on which to execute the kernel.
+     */
+    void yolo_layer_fp32_nchw(const Window &window);
+    /** Function to run YOLO layer on fp32 on tensors with NHWC format
+     *
+     * @param[in] window Region on which to execute the kernel.
+     */
+    void yolo_layer_fp32_nhwc(const Window &window);
+    /** Common signature for all the yolo layer functions
+     *
+     * @param[in] window Region on which to execute the kernel.
+     */
+    using YOLOFunctionPtr = void (NEYOLOLayerKernel::*)(const Window &window);
+
+private:
+    YOLOFunctionPtr     _func;
+    ITensor            *_input;
+    ITensor            *_output;
+    ActivationLayerInfo _act_info;
+    int32_t             _num_classes;
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_NEYOLOLAYERKERNEL_H__ */
diff --git a/arm_compute/core/NEON/kernels/detail/NEActivationFunctionDetail.h b/arm_compute/core/NEON/kernels/detail/NEActivationFunctionDetail.h
index 71d5a9eef7..9344235d09 100644
--- a/arm_compute/core/NEON/kernels/detail/NEActivationFunctionDetail.h
+++ b/arm_compute/core/NEON/kernels/detail/NEActivationFunctionDetail.h
@@ -54,6 +54,97 @@ struct dummy
         ARM_COMPUTE_UNUSED(vval);
     }
 };
+/** Linear activation object */
+template <typename T, int S>
+struct linear
+{
+    /** NEON vector type. */
+    using ExactType = typename wrapper::traits::neon_vector<T, S>::type;
+    /** NEON vector tag type. */
+    using ExactTagType = typename wrapper::traits::neon_vector<T, S>::tag_type;
+
+    /** Construct a Linear activation object.
+     *
+     * @param[in] act_info Activation layer information.
+     */
+    explicit linear(ActivationLayerInfo act_info)
+        : valpha(wrapper::vdup_n(static_cast<T>(act_info.a()), ExactTagType{})),
+          vbeta(wrapper::vdup_n(static_cast<T>(act_info.b()), ExactTagType{}))
+    {
+    }
+
+    /** Run activation function.
+     *
+     * @param[in] vval Vector of values.
+     */
+    void operator()(ExactType &vval)
+    {
+        vval = wrapper::vmla(vval, valpha, vbeta);
+    }
+
+    /** Vector of alphas. */
+    const ExactType valpha;
+    /** Vector of betas. */
+    const ExactType vbeta;
+};
+/** Square activation object */
+template <typename T, int S>
+struct square
+{
+    /** NEON vector type. */
+    using ExactType = typename wrapper::traits::neon_vector<T, S>::type;
+    /** NEON vector tag type. */
+    using ExactTagType = typename wrapper::traits::neon_vector<T, S>::tag_type;
+
+    /** Construct a Square activation object.
+     *
+     * @param[in] act_info Activation layer information.
+     */
+    explicit square(ActivationLayerInfo act_info)
+    {
+        ARM_COMPUTE_UNUSED(act_info);
+    }
+
+    /** Run activation function.
+     *
+     * @param[in] vval Vector of values.
+     */
+    void operator()(ExactType &vval)
+    {
+        vval = wrapper::vmul(vval, vval);
+    }
+};
+/** Logistic activation object */
+template <typename T, int S>
+struct logistic
+{
+    /** NEON vector type. */
+    using ExactType = typename wrapper::traits::neon_vector<T, S>::type;
+    /** NEON vector tag type. */
+    using ExactTagType = typename wrapper::traits::neon_vector<T, S>::tag_type;
+
+    /** Construct a Logistic activation object.
+     *
+     * @param[in] act_info Activation layer information.
+     */
+    explicit logistic(ActivationLayerInfo act_info)
+        : vone(wrapper::vdup_n(static_cast<T>(1.f), ExactTagType{}))
+    {
+        ARM_COMPUTE_UNUSED(act_info);
+    }
+
+    /** Run activation function.
+     *
+     * @param[in] vval Vector of values.
+     */
+    void operator()(ExactType &vval)
+    {
+        vval = wrapper::vinv(wrapper::vadd(vone, wrapper::vexpq(wrapper::vnegq(vval))));
+    }
+
+    /** Vector of ones. */
+    const ExactType vone;
+};
 /** RELU activation object */
 template <typename T, int S>
 struct relu
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/add.h b/arm_compute/core/NEON/wrapper/intrinsics/add.h
new file mode 100644
index 0000000000..da730f133c
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/add.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_ADD_H__
+#define __ARM_COMPUTE_WRAPPER_ADD_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VADD_IMPL(stype, vtype, prefix, postfix)      \
+    inline vtype vadd(const vtype &a, const vtype &b) \
+    {                                                 \
+        return prefix##_##postfix(a, b);              \
+    }
+
+VADD_IMPL(uint8x8_t, uint8x8_t, vadd, u8)
+VADD_IMPL(int8x8_t, int8x8_t, vadd, s8)
+VADD_IMPL(uint16x4_t, uint16x4_t, vadd, u16)
+VADD_IMPL(int16x4_t, int16x4_t, vadd, s16)
+VADD_IMPL(uint32x2_t, uint32x2_t, vadd, u32)
+VADD_IMPL(int32x2_t, int32x2_t, vadd, s32)
+VADD_IMPL(uint64x1_t, uint64x1_t, vadd, u64)
+VADD_IMPL(int64x1_t, int64x1_t, vadd, s64)
+VADD_IMPL(float32x2_t, float32x2_t, vadd, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VADD_IMPL(float16x4_t, float16x4_t, vadd, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+VADD_IMPL(uint8x16_t, uint8x16_t, vaddq, u8)
+VADD_IMPL(int8x16_t, int8x16_t, vaddq, s8)
+VADD_IMPL(uint16x8_t, uint16x8_t, vaddq, u16)
+VADD_IMPL(int16x8_t, int16x8_t, vaddq, s16)
+VADD_IMPL(uint32x4_t, uint32x4_t, vaddq, u32)
+VADD_IMPL(int32x4_t, int32x4_t, vaddq, s32)
+VADD_IMPL(uint64x2_t, uint64x2_t, vaddq, u64)
+VADD_IMPL(int64x2_t, int64x2_t, vaddq, s64)
+VADD_IMPL(float32x4_t, float32x4_t, vaddq, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VADD_IMPL(float16x8_t, float16x8_t, vaddq, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+#undef VADD_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_ADD_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/exp.h b/arm_compute/core/NEON/wrapper/intrinsics/exp.h
new file mode 100644
index 0000000000..85aa9c739a
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/exp.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_EXP_H__
+#define __ARM_COMPUTE_WRAPPER_EXP_H__
+
+#include "arm_compute/core/NEON/NEMath.h"
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VEXPQ_IMPL(vtype, postfix)     \
+    inline vtype vexpq(const vtype &a) \
+    {                                  \
+        return vexpq_##postfix(a);     \
+    }
+
+VEXPQ_IMPL(float32x4_t, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VEXPQ_IMPL(float16x8_t, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+#undef VEXPQ_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_EXP_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
index b302b366cd..58bfba9645 100644
--- a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
+++ b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
@@ -24,11 +24,17 @@
 #ifndef __ARM_COMPUTE_WRAPPER_INTRINSICS_H__
 #define __ARM_COMPUTE_WRAPPER_INTRINSICS_H__
 
+#include "arm_compute/core/NEON/wrapper/intrinsics/add.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/and.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/dup_n.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/exp.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/inv.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/load.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/max.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/min.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/mla.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/mul.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/neg.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/store.h"
 
 #endif /* __ARM_COMPUTE_WRAPPER_INTRINSICS_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/inv.h b/arm_compute/core/NEON/wrapper/intrinsics/inv.h
new file mode 100644
index 0000000000..a86a9d4671
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/inv.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_INV_H__
+#define __ARM_COMPUTE_WRAPPER_INV_H__
+
+#include "arm_compute/core/NEON/NEMath.h"
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VINV_IMPL(vtype, prefix, postfix) \
+    inline vtype vinv(const vtype &a)     \
+    {                                     \
+        return prefix##_##postfix(a);     \
+    }
+
+VINV_IMPL(float32x2_t, vinv, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VINV_IMPL(float16x4_t, vinv, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+VINV_IMPL(float32x4_t, vinvq, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VINV_IMPL(float16x8_t, vinvq, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+#undef VINV_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_INV_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/mla.h b/arm_compute/core/NEON/wrapper/intrinsics/mla.h
new file mode 100644
index 0000000000..32a650b57f
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/mla.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_MLA_H__
+#define __ARM_COMPUTE_WRAPPER_MLA_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VMLA_IMPL(stype, vtype, prefix, postfix)                      \
+    inline vtype vmla(const vtype &a, const vtype &b, const vtype &c) \
+    {                                                                 \
+        return prefix##_##postfix(a, b, c);                           \
+    }
+
+VMLA_IMPL(uint8x8_t, uint8x8_t, vmla, u8)
+VMLA_IMPL(int8x8_t, int8x8_t, vmla, s8)
+VMLA_IMPL(uint16x4_t, uint16x4_t, vmla, u16)
+VMLA_IMPL(int16x4_t, int16x4_t, vmla, s16)
+VMLA_IMPL(uint32x2_t, uint32x2_t, vmla, u32)
+VMLA_IMPL(int32x2_t, int32x2_t, vmla, s32)
+VMLA_IMPL(float32x2_t, float32x2_t, vmla, f32)
+
+VMLA_IMPL(uint8x16_t, uint8x16_t, vmlaq, u8)
+VMLA_IMPL(int8x16_t, int8x16_t, vmlaq, s8)
+VMLA_IMPL(uint16x8_t, uint16x8_t, vmlaq, u16)
+VMLA_IMPL(int16x8_t, int16x8_t, vmlaq, s16)
+VMLA_IMPL(uint32x4_t, uint32x4_t, vmlaq, u32)
+VMLA_IMPL(int32x4_t, int32x4_t, vmlaq, s32)
+VMLA_IMPL(float32x4_t, float32x4_t, vmlaq, f32)
+
+#undef VMLA_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_MLA_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/mul.h b/arm_compute/core/NEON/wrapper/intrinsics/mul.h
new file mode 100644
index 0000000000..c1908fc7b3
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/mul.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_MUL_H__
+#define __ARM_COMPUTE_WRAPPER_MUL_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VMUL_IMPL(stype, vtype, prefix, postfix)      \
+    inline vtype vmul(const vtype &a, const vtype &b) \
+    {                                                 \
+        return prefix##_##postfix(a, b);              \
+    }
+
+VMUL_IMPL(uint8x8_t, uint8x8_t, vmul, u8)
+VMUL_IMPL(int8x8_t, int8x8_t, vmul, s8)
+VMUL_IMPL(uint16x4_t, uint16x4_t, vmul, u16)
+VMUL_IMPL(int16x4_t, int16x4_t, vmul, s16)
+VMUL_IMPL(uint32x2_t, uint32x2_t, vmul, u32)
+VMUL_IMPL(int32x2_t, int32x2_t, vmul, s32)
+VMUL_IMPL(float32x2_t, float32x2_t, vmul, f32)
+
+VMUL_IMPL(uint8_t, uint8x16_t, vmulq, u8)
+VMUL_IMPL(int8_t, int8x16_t, vmulq, s8)
+VMUL_IMPL(uint16_t, uint16x8_t, vmulq, u16)
+VMUL_IMPL(int16_t, int16x8_t, vmulq, s16)
+VMUL_IMPL(uint32_t, uint32x4_t, vmulq, u32)
+VMUL_IMPL(int32_t, int32x4_t, vmulq, s32)
+VMUL_IMPL(float32x4_t, float32x4_t, vmulq, f32)
+
+#undef VMUL_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_MUL_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/neg.h b/arm_compute/core/NEON/wrapper/intrinsics/neg.h
new file mode 100644
index 0000000000..0ea1d429fe
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/neg.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_NEG_H__
+#define __ARM_COMPUTE_WRAPPER_NEG_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VNEG_IMPL(vtype, postfix)     \
+    inline vtype vneg(const vtype &a) \
+    {                                 \
+        return vneg_##postfix(a);     \
+    }
+
+VNEG_IMPL(int8x8_t, s8)
+VNEG_IMPL(int16x4_t, s16)
+VNEG_IMPL(int32x2_t, s32)
+VNEG_IMPL(float32x2_t, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VNEG_IMPL(float16x4_t, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+#undef VNEG_IMPL
+#define VNEGQ_IMPL(vtype, postfix)     \
+    inline vtype vnegq(const vtype &a) \
+    {                                  \
+        return vnegq_##postfix(a);     \
+    }
+
+VNEGQ_IMPL(int8x16_t, s8)
+VNEGQ_IMPL(int16x8_t, s16)
+VNEGQ_IMPL(int32x4_t, s32)
+VNEGQ_IMPL(float32x4_t, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VNEGQ_IMPL(float16x8_t, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+#undef VNEGQ_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_NEG_H__ */
diff --git a/arm_compute/runtime/NEON/NEFunctions.h b/arm_compute/runtime/NEON/NEFunctions.h
index 89a5c4aaaf..d9b7269efc 100644
--- a/arm_compute/runtime/NEON/NEFunctions.h
+++ b/arm_compute/runtime/NEON/NEFunctions.h
@@ -119,5 +119,6 @@
 #include "arm_compute/runtime/NEON/functions/NEWarpPerspective.h"
 #include "arm_compute/runtime/NEON/functions/NEWidthConcatenateLayer.h"
 #include "arm_compute/runtime/NEON/functions/NEWinogradConvolutionLayer.h"
+#include "arm_compute/runtime/NEON/functions/NEYOLOLayer.h"
 
 #endif /* __ARM_COMPUTE_NEFUNCTIONS_H__ */
\ No newline at end of file
diff --git a/arm_compute/runtime/NEON/functions/NEYOLOLayer.h b/arm_compute/runtime/NEON/functions/NEYOLOLayer.h
new file mode 100644
index 0000000000..e09dd42f8f
--- /dev/null
+++ b/arm_compute/runtime/NEON/functions/NEYOLOLayer.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEYOLOLAYER_H__
+#define __ARM_COMPUTE_NEYOLOLAYER_H__
+
+#include "arm_compute/runtime/NEON/INESimpleFunction.h"
+
+#include "arm_compute/core/NEON/kernels/NEYOLOLayerKernel.h"
+#include "arm_compute/core/Types.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to run @ref NEYOLOLayerKernel */
+class NEYOLOLayer : public INESimpleFunction
+{
+public:
+    /** Set the input and output tensor.
+     *
+     * @note If the output tensor is a nullptr or is equal to the input, the activation function will be performed in-place
+     *
+     * @param[in, out] input       Source tensor. In case of @p output tensor = nullptr, this tensor will store the result
+     *                             of the activation function. Data types supported: F16/F32.
+     * @param[out]     output      Destination tensor. Data type supported: same as @p input
+     * @param[in]      act_info    Activation layer parameters.
+     * @param[in]      num_classes Number of classes to activate (must be submultiple of @p input channels)
+     */
+    void configure(ITensor *input, ITensor *output, const ActivationLayerInfo &act_info, int32_t num_classes);
+    /** Static function to check if given info will lead to a valid configuration of @ref NEYOLOLayer
+     *
+     * @param[in] input       Source tensor info. In case of @p output tensor info = nullptr, this tensor will store the result
+     *                        of the activation function. Data types supported: F16/F32.
+     * @param[in] output      Destination tensor info. Data type supported: same as @p input
+     * @param[in] act_info    Activation layer information.
+     * @param[in] num_classes Number of classes to activate (must be submultiple of @p input channels)
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &act_info, int32_t num_classes);
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEYOLOLAYER_H__ */