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| author | Giorgio Arena <giorgio.arena@arm.com> | 2021-11-18 18:02:13 +0000 |
|---|---|---|
| committer | Yair Schwarzbaum <yair.schwarzbaum@arm.com> | 2022-01-12 06:52:04 +0000 |
| commit | 5ae8d804d67f57fbfa793800ddcc21a5aff954dd (patch) | |
| tree | 1defbe7f788645f6f0fb4c3f79be6c4b8ecfb709 /arm_compute | |
| parent | 3475ffe40b7db99c782cbaf351aa7b4e341562ef (diff) | |
| download | ComputeLibrary-5ae8d804d67f57fbfa793800ddcc21a5aff954dd.tar.gz | |
Enable kernel selection testing (Phase #1)
Change-Id: I1d65fb9d3a7583cf8d4163ca7c0fbee27dc52633
Signed-off-by: Yair Schwarzbaum <yair.schwarzbaum@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6767
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute')
| -rw-r--r-- | arm_compute/core/CPP/CPPTypes.h | 12 | ||||
| -rw-r--r-- | arm_compute/core/Utils.h | 45 |
2 files changed, 55 insertions, 2 deletions
diff --git a/arm_compute/core/CPP/CPPTypes.h b/arm_compute/core/CPP/CPPTypes.h index 82a6a6c324..a021bdf5e4 100644 --- a/arm_compute/core/CPP/CPPTypes.h +++ b/arm_compute/core/CPP/CPPTypes.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2021 Arm Limited. + * Copyright (c) 2017-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -30,6 +30,11 @@ namespace arm_compute { +namespace cpuinfo +{ +struct CpuIsaInfo; +} // namespace cpuinfo + #define ARM_COMPUTE_CPU_MODEL_LIST \ X(GENERIC) \ X(GENERIC_FP16) \ @@ -134,6 +139,11 @@ public: * @return Current thread's @ref CPUModel */ CPUModel get_cpu_model() const; + /** Gets the current cpu's ISA information + * + * @return Current cpu's ISA information + */ + cpuinfo::CpuIsaInfo get_isa() const; /** Gets the L1 cache size * * @return the size of the L1 cache diff --git a/arm_compute/core/Utils.h b/arm_compute/core/Utils.h index 88cb295c44..b24955d778 100644 --- a/arm_compute/core/Utils.h +++ b/arm_compute/core/Utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2021 Arm Limited. + * Copyright (c) 2016-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -1200,6 +1200,49 @@ inline unsigned int adjust_vec_size(unsigned int vec_size, size_t dim0) return vec_size; } +/** Returns the suffix string of CPU kernel implementation names based on the given data type + * + * @param[in] data_type The data type the CPU kernel implemetation uses + * + * @return the suffix string of CPU kernel implementations + */ +inline std::string cpu_impl_dt(const DataType &data_type) +{ + std::string ret = ""; + + switch(data_type) + { + case DataType::F32: + ret = "fp32"; + break; + case DataType::F16: + ret = "fp16"; + break; + case DataType::U8: + ret = "u8"; + break; + case DataType::S16: + ret = "s16"; + break; + case DataType::S32: + ret = "s32"; + break; + case DataType::QASYMM8: + ret = "qu8"; + break; + case DataType::QASYMM8_SIGNED: + ret = "qs8"; + break; + case DataType::QSYMM16: + ret = "qs16"; + break; + default: + ARM_COMPUTE_ERROR("Unsupported."); + } + + return ret; +} + #ifdef ARM_COMPUTE_ASSERTS_ENABLED /** Print consecutive elements to an output stream. * |