COMPMID-875: Deconvolution 4x4 not working

-Enforces the use of the ConvolutionLayer function in the
DeconvolutionLayer.
-Adds tests for 4x4 Deconvolution.
-Alters the ConvolutionLayer validation to support even kernels.

Change-Id: Id27e285f078e690b8dd58490dd8ea6d875b3cec6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118632
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/arm_compute/runtime/NEON/functions/NEDeconvolutionLayer.h b/arm_compute/runtime/NEON/functions/NEDeconvolutionLayer.h
index 091a928db6..1b3297e8d0 100644
--- a/arm_compute/runtime/NEON/functions/NEDeconvolutionLayer.h
+++ b/arm_compute/runtime/NEON/functions/NEDeconvolutionLayer.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, 2018 ARM Limited.
+ * Copyright (c) 2017-2018 ARM Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -24,6 +24,7 @@
 #ifndef __ARM_COMPUTE_NEDECONVOLUTIONLAYER_H__
 #define __ARM_COMPUTE_NEDECONVOLUTIONLAYER_H__
 
+#include "arm_compute/runtime/NEON/functions/NEConvolutionLayer.h"
 #include "arm_compute/runtime/NEON/functions/NEDirectConvolutionLayer.h"
 
 #include "arm_compute/core/Types.h"
@@ -95,11 +96,13 @@ public:
 
 private:
     MemoryGroup              _memory_group;
-    NEDirectConvolutionLayer _conv_f;
+    NEDirectConvolutionLayer _direct_conv_f;
+    NEConvolutionLayer       _conv_f;
     Tensor                   _scaled_output;
     ITensor                 *_input;
     PadStrideInfo            _info;
     std::pair<unsigned int, unsigned int> _inner_border;
+    bool _run_direct_convolution;
 };
 } // arm_compute
 #endif /* __ARM_COMPUTE_NEDECONVOLUTIONLAYER_H__ */