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| author | Michalis Spyrou <michalis.spyrou@arm.com> | 2019-11-29 16:17:13 +0000 |
|---|---|---|
| committer | Michalis Spyrou <michalis.spyrou@arm.com> | 2019-12-04 16:54:55 +0000 |
| commit | f4643379c5f210d552ee3e8395f831ff5c168de7 (patch) | |
| tree | 081bc30a8643b1c89754aeabee863a17c4b446fc /arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h | |
| parent | f01201abec0a102f6e7a517971f83fef1eaffd50 (diff) | |
| download | ComputeLibrary-f4643379c5f210d552ee3e8395f831ff5c168de7.tar.gz | |
COMPMID-2826 Comply with DCL51-CPP
Rename all header guards to be compliant with DCL51-CPP
Change-Id: I47b09375bb1b8d39d80c275ce69a3f25fb385d75
Signed-off-by: Michalis Spyrou <micspy01@e123758.cambridge.arm.com>
Reviewed-on: https://review.mlplatform.org/c/2393
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h')
| -rw-r--r-- | arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h b/arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h index 1684894a5c..c4f6ac7c66 100644 --- a/arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h +++ b/arm_compute/core/NEON/kernels/detail/NEDirectConvolutionDetail.h @@ -22,8 +22,8 @@ * SOFTWARE. */ -#ifndef __ARM_COMPUTE_NEDIRECTCONVOLUTIONDETAIL_H__ -#define __ARM_COMPUTE_NEDIRECTCONVOLUTIONDETAIL_H__ +#ifndef ARM_COMPUTE_NEDIRECTCONVOLUTIONDETAIL_H +#define ARM_COMPUTE_NEDIRECTCONVOLUTIONDETAIL_H #include "arm_compute/core/AccessWindowStatic.h" #include "arm_compute/core/NEON/NEFixedPoint.h" @@ -290,12 +290,12 @@ inline float32x4x2_t convolve_3x3<2>(const float *in_top, const float *in_mid, c const float32x4_t vlow_end = vld1q_f32(in_low + 8); float32x4x2_t out = + { { - { - vmulq_f32(vtop.val[0], m0.val[0]), - vdupq_n_f32(0) - } - }; + vmulq_f32(vtop.val[0], m0.val[0]), + vdupq_n_f32(0) + } + }; out.val[0] = vmlaq_f32(out.val[0], vtop.val[1], m0.val[1]); out.val[0] = vmlaq_f32(out.val[0], vextq_f32(vtop.val[0], vtop_end, 1), m0.val[2]); @@ -869,12 +869,12 @@ inline float16x8x2_t convolve_3x3<2>(const float16_t *in_top, const float16_t *i const float16x8_t vlow_end = vld1q_f16(in_low + 16); float16x8x2_t out = + { { - { - vmulq_f16(vtop.val[0], m0.val[0]), - vdupq_n_f16(0) - } - }; + vmulq_f16(vtop.val[0], m0.val[0]), + vdupq_n_f16(0) + } + }; out.val[0] = vaddq_f16(out.val[0], vmulq_f16(vtop.val[1], m0.val[1])); out.val[0] = vaddq_f16(out.val[0], vmulq_f16(vextq_f16(vtop.val[0], vtop_end, 1), m0.val[2])); @@ -974,4 +974,4 @@ inline int get_input_num_elems_processed(unsigned int num_elems_written_per_iter } } } // namespace arm_compute -#endif /* __ARM_COMPUTE_NEDIRECTCONVOLUTIONDETAIL_H__ */ +#endif /* ARM_COMPUTE_NEDIRECTCONVOLUTIONDETAIL_H */ |