COMPMID-2599: Implement a new and generic depthwise convolution on OpenCL (Fp32/FP16-NHWC)

Part 1

Change-Id: I5e1d27a7006199e9229e455a1df9bfc2ed4e8341
Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Reviewed-on: https://review.mlplatform.org/c/1898
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

1 files changed, 12 insertions, 0 deletions

diff --git a/arm_compute/core/KernelDescriptors.h b/arm_compute/core/KernelDescriptors.h
index f9f8c141ec..3affc30f71 100644
--- a/arm_compute/core/KernelDescriptors.h
+++ b/arm_compute/core/KernelDescriptors.h
@@ -62,5 +62,17 @@ struct GEMMKernelInfo
     bool                broadcast_bias{ false };          /**< Flag used to broadcase the bias addition */
     ActivationLayerInfo activation_info{};                /**< Activation function to perform after the matrix multiplication */
 };
+
+/** Descriptor used by the depthwise convolution kernels */
+struct DWCKernelInfo
+{
+    ActivationLayerInfo activation_info{}; /**< Activation function to perform after the depthwise convolution */
+};
+
+/** Descriptor used by the depthwise convolution kernels to retrieve the number of output elements processed by each thread */
+struct DWCWeightsKernelInfo
+{
+    unsigned int n0{ 0 }; /**< Number of columns processed by each thread */
+};
 } // namespace arm_compute
 #endif /* __ARM_COMPUTE_CORE_KERNEL_DESCRIPTORS_H__ */