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5 daysChange the table parameter from attribute to tensor typeTatWai Chong
also add testing support for table parameter as input. Signed-off-by: TatWai Chong <tatwai.chong@arm.com> Change-Id: Ie4f6d3cf0b68803fa3353cfa0e9f7f38a83b1539
2024-05-17Add missing signed/unsigned data types of input/output for RESCALE opWon Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: I1498313f56626011d39f765fed71f82be53b3d8d
2024-05-01Fix MAXIMUM/MINIMUM handling of NaNs and zeroesJeremy Johnson
Change FP_SPECIAL testing to be used for DOT_PRODUCT cases only. Use default EXACT matching - where zeroes of different signs will be ignored when testing for equality Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I0461c42258611cae597f693507075b3ef15fbe19
2024-04-19Update float8 header and namespaceWon Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: I75840f6b4ff11a63c4c874f8ded23afb5a71ad55
2024-04-18[reference_model] Remove output_shape from transpose_conv2dSuraj Sudhir
Signed-off-by: Suraj Sudhir <suraj.sudhir@arm.com> Change-Id: Ib2b95e73b226d64c4db5ad1ed22c123e04d7e6f9
2024-04-18Update compliance verify checksJeremy Johnson
Cope with large error bounds with small reference values. Change how error bounds of NaN are avoided for ABS_ERRORs. Update SIN/COS compliance to latest spec and use input value as magnitude. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I55aca59e0255e1cfd255b08edb845c3e33ca7eff
2024-04-18RFFT2D, refmodel. Correct code when size is oneDmitriy Smirnov
When width or height are one then H/2 or W/2 are not integral. Signed-off-by: Dmitriy Smirnov <dmitriy.smirnov@arm.com> Change-Id: I1a849bec7cbb1d55fd5f085ebe58be45ea0b508e
2024-04-15[ref model] fix const/pad/clamp attribute serializationTai Ly
This changes to use native type serialization and deserialization for pad_const, clamp min_val/max_val and const data attribute values whereby fp16 values are stored as 2 bytes each, fp8 values are stored in 1 byte each, etc. Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: Ia95d320fe8c546ce1d1ccc035d6e9bcaadcc9ca3
2024-04-08Fix the wrong QMax and QMin type assignment in rescale opTatWai Chong
Signed integer type is used to retain QMax and QMin no matter what the value of `output_unsigned` is, but the value of QMax and QMin are unsigned integer when output_unsigned is true. Also add a handful of arithmetic helpers to align the pseudo code. Change-Id: Ie3cd444a290ddae08884186cd4b349a88acad032 Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2024-04-08Modify Rescale signedness check to look at attributesEric Kunze
Also simplify the check to align the pesudo code structure. Signed-off-by: Eric Kunze <eric.kunze@arm.com> Signed-off-by: TatWai Chong <tatwai.chong@arm.com> Change-Id: I6023046026d2784dedd963b2b4d34a1117d45c23
2024-04-02Show actual runtime value of shapeType tensorsJerry Ge
* Enable showing actual runtime shapeType tensor value when the --dump_intermediates=1 flag is on Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: Ibd5aa8aa27505364fbbf9d1addd0bdef0deda885
2024-03-28Take into account of `output_unsigned` in rescale operationTatWai Chong
Set QMin and QMax based on the value of attribute `output_unsigned`. Change-Id: I7f21f3edd7311295285fb3988b3c800de114777a Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2024-03-20[ref model] Add acc_type to Conv OpsTai Ly
This patch implements changes required by the new acc_type field in ConvAttribute and TransposeConvAttribute Signed-off-by: Tai Ly <tai.ly@arm.com> Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ib13dbeec4d8920e0ddbcca02b727e7277f2c8d62
2024-03-17[ref model] Change Clamp and Pad attribute fieldsTai Ly
This implements changes due to ClampAttribute and PadAttribute field changes. Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: Ide01e2a27fe3c1ea7794e7a4b6780b7eae436caf
2024-03-15Add missing FP8 definition and instantiation for FULLY_CONNNECTED opWon Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: I7efc03f16136b2b74f8dfef79a6e7e147c93f4ed
2024-03-07Add INT48 and INT4 datatype support to IDENTITYevacha01
Added support to ref model and testing Signed-off-by: evacha01 <evan.chandler@arm.com> Change-Id: Iece53d07c8986332fdd8f1ce5ed6265349df1b6a
2024-03-06[ref model] Change RescaleOp attrs to inputsTai Ly
This patch implements changes required for RescaleOp's multiplier and shift changing from attributes to inputs Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: I178919727e3220c749dad0ebce141e695868fee0
2024-03-05Add Tosa Sin/Cos operatorsJerry Ge
- Add Tosa Sin/Cos operators to reference_model - Add conformances tests Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: I3f597ddf5dac2c64d6dd6aa15781b40b8468eaa6
2024-03-01Testing support for MUL with shift as inputJeremy Johnson
Always create the shift as a tensor for all types in testing. In the reference model, set the shift operand to be available for all types, but only read in the shift tensor for i32. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Signed-off-by: TatWai Chong <tatwai.chong@arm.com> Change-Id: Ia267cbf8b63ca0a9c97b38e8fb4db83eeb8c0538
2024-02-29Fix padding value for PAD op and tensor writing to npy for FP8Won Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: I55f663c19a1d2579d24b25c7f0d476e56e7e6dd2
2024-02-27[reference_model] tosa.fb name changesTai Ly
This patch adjusts reference model for attribute name changes in tosa.fb schema, and for obsoleted slice/tile/reshape attributes also updated examples due to the breaking tosa flatbuffers changes Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: I105eb99a4c35f289c5078aed0a7f9cbb6dfe9123
2024-02-26[ref_model] Change resize attrs to inputsTai Ly
This patch implements changes needed for resize op's scale/offset/border changing from attributes to inputs Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: I20db0687fad40711f3ded644af51096292dd05b3
2024-02-23Fix comparing unsigned int and int in slice evaluationTatWai Chong
also check if tensors of start and size are allocated. Change-Id: I6a72d11ebcb8d0725fe267058dfd792102459427 Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2024-02-22Change the shift of mul to tensor typeTatWai Chong
Right shift result on i32_t data type only, i.e. other data types don't carry the shift operand. In the spec, the shift type is a tensor in MT profile and is an attribute in BI/MI profiles. Currently we treat the shift as tensor throughout. In implementation, since `ternaryExpr` is not implemented in Eigen, decompose the original calculation into multiply and shift operation seperately, and execute them via `binaryExpr`. Change-Id: I349f4969545134ac5f13bc83032cd75cca3e7ba0 Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2024-02-21Add support for FP8 to reference modelWon Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: I99b70f94aff2ccd4af64875697e124eb60bc5b08
2024-02-08Fix REDUCE ops to support 8k MAX_RANKJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I365da379f599e5eca1841e6d299b4005a7b0f082
2024-02-08Main Compliance: RFFT2D supportJeremy Johnson
Correct ref model to produce imaginery values of zero as specification indicates at certain output positions. Fix up precise and abs modes for RFFT2D in ref model to produce correct results and bounds using abs weights. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I33767e4219a260278f7933f28b1799223a95a3cc
2024-02-07Main Compliance: Update POW error boundJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I8f7678706e517d7f8d9742dcddd0ea5875b30a00
2024-02-07Main Compliance: FFT2D supportJeremy Johnson
Improve access to DOT_PRODUCT generator index and location for debugging. Enable multiple result files for compliance and improve output. Fix up precise and abs modes for FFT2D in ref model to produce correct results and bounds using abs weights. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ide0c9f9f80397e5f1e07ca30a1036d6014b5784d
2024-01-31Change the start and size of slice to tosa shape typeTatWai Chong
This offers dynamism support for slice op. Change-Id: I4521c072c663a01e03e575e0cbbc8671c832f646 Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
2024-01-30[ref model] Change PadOp's padding to ShapeTai Ly
Changed to use pad input of PadOp for testing. The pad input is now a tensor of tosa.shape type. moved padding error checking from checkTensorAttributes to eval modified pad's PadOutputShapeMismatch test generation to avoid generating output shapes with dimensions <= 0 Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: I437c86d9a012903458a648667f6693db67b97d76
2024-01-25Fix logical right shift operator for signed negative integersWon Jeon
Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: Id37100ba8bc2ac64b1f54788c6f765fedfab0816
2024-01-18[reference model] Add shape operatorsTai Ly
- fixed up reshape conformance tests to use shape input instead of attribute - fixed up tile conformance tests to use shape input instead of attribute - fixed output and output rank of dim op - allow rank 0 and rank 1 tensors for tosa.shape values (for shape = {}) - added initialization of rank 0 const_shape tensors (for shape = {}) - Update conformance tests to use new rescale attributes Signed-off-by: Tai Ly <tai.ly@arm.com> Signed-off-by: Won Jeon <won.jeon@arm.com> Change-Id: I6cce0d2a9ab066fe20a2abf9d2cfde3eb3d8c18b
2024-01-11CLAMP limits should be expressed in in_out_tEric Kunze
int8/int16 should be used for the clamping, not int32_t Signed-off-by: Eric Kunze <eric.kunze@arm.com> Change-Id: I18209ca76cc83d95dc61f20f88344aafdbd72033
2024-01-08Main Conformance: Re-adjust TANH compliance checkJeremy Johnson
Add lower bound to ABS ERROR checks to allow for cancellation of small values in error bounds checking. Re-adjust the error bounds multiplier to match the specification. Fix up naming of verify library info structs. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I3e178c3d7d59fef9c3696178646b23ed2a3ffc61
2024-01-03Fix Cast Float to Int overflowsJerry Ge
- For Casting from Float to Integers, if the input float is greater than INT_MAX, an overflow will happen when calling rint which causes the clipplings to be ineffectives - Moved all the range checks and clippings before rint to avoid this issue Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: Ic189d59685b6d36464e3ef26766665148a660a14
2023-12-15Fix Cast FP32 to Int32 OverflowJerry Ge
- With input of 2147483648.00, the output overflows to -2147483648 - The root cause is the following: - std::rint still returns float, the existing implementation is forcing a cast from that float to int32_t - when the input is over INT32_MAX, the output right after rint will overflow which casues the clipplings later to be ineffective - Instead, perform the range check before rint Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: Ib5a8cfd98aea17e326f8b11097beeb2d2b3efac9
2023-12-14Remove inferred dimension from RESHAPEJeremy Johnson
Test generation changed to only produce static reshape tests Reference model changed to produce ERROR_IF on inferred shapes Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I92c92a40e7c0e457961bc654630040dff79a750b
2023-12-12Main Conformance: Adjust TANH compliance valueJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I35d14e3e9f80198c1da3d267f12bc7a9a055e698
2023-12-11Enforce no output rewrite REQUIRE in SCATTERJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I3555e7216d403d436bf6e39d4b16bb000645c4bb
2023-12-05Fix Format Specifiers for MUL REQUIRES outputJack Frankland
Use platform agnostic format specifiers for `int64_t`. Change-Id: I002d94c1a0c0431ec09fc165a584a8f4b3ddc17d Signed-off-by: Jack Frankland <jack.frankland@arm.com>
2023-12-04Change TANH, SIGMOID to ABS_ERROR complianceJeremy Johnson
Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Icf04afc7fdae8f506ba4710aaa085d6ea53bb5bf
2023-11-22Correct Fully Connected Validation LogicJack Frankland
The bias operand of the fully connected operator must be a 1D tensor either equal to the output channel size or of size 1. Previously we asserted the former case, we now include the second case. Signed-off-by: Jack Frankland <jack.frankland@arm.com> Change-Id: I07dbc8a3aa1650703e5c50e1e7f36bb9539fd5db
2023-11-16Support loading shared libraries for custom operatorsJerry Ge
- Add a new command line option to allow users to specify a custom defined dll library - Add a custom registry to store all registered libraries - Add a dummy example (custom_op_example.cpp) for demonstrating this new feature Signed-off-by: Jerry Ge <jerry.ge@arm.com> Change-Id: I7c360835933f77e33fcbd772cabfe01d82282d47
2023-11-16Main Compliance testing support for EXP & POWJeremy Johnson
Added new ABS_ERROR mode to verify lib and ref model. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: Ifb78290675833d3df7df91a4d6cef336b02b64a4
2023-11-14[reference_model] Add local_bound supportTai Ly
Add support for local_bound attributes. Signed-off-by: Tai Ly <tai.ly@arm.com> Change-Id: Ie1acb65ca2495fb7d1512bf120568c695635d631
2023-10-24Catch when CONSTs aren't initializedJeremy Johnson
CONST data should be either data in the flatbuffer file or loaded in via an input file. This check catches if neither of these have been done, instead of marking uninitialized data as valid. Signed-off-by: Jeremy Johnson <jeremy.johnson@arm.com> Change-Id: I97dc2254f0b58c05c39cc0281a331a394c2a4b3c
2023-10-23Fix AvgPool2D regressionJames Ward
Signed-off-by: James Ward <james.ward@arm.com> Change-Id: I414899d0f504af00da185e0fc4119f3bde2bae3a
2023-10-20Fix AVG_POOL2D bad_alloc with large kernel sizesJames Ward
- Nested looping instead of using Eigen extract_image_patches to avoid OOM errors Signed-off-by: James Ward <james.ward@arm.com> Change-Id: Id4d78d5b5dd04a00134f29b1d29f814195515b1f
2023-09-13Add integer divide with floor for coordinate calculationTatWai Chong
Align with the change in the spec. Define idiv_floor to give equivalent behavior to the floating-point floor function for image coordinate calculation. Change-Id: Ice06d354d58b1bb0dfedab55c9cc9eac1598b50c Signed-off-by: TatWai Chong <tatwai.chong@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-02 19:24:21 +0000