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authorMikael Olsson <mikael.olsson@arm.com>2024-01-22 14:48:28 +0100
committerMikael Olsson <mikael.olsson@arm.com>2024-01-22 15:06:26 +0100
commitad5b6f2a6ca5f9ed1312224767490073315d68b9 (patch)
tree9de1190a8c808275712724a0d58859b3e9041e38
parent36638b51327efcb77951c2ed293ab1032d079e67 (diff)
downloadethos-u-core-platform-ad5b6f2a6ca5f9ed1312224767490073315d68b9.tar.gz
Change threadx_demo to use ThreadX lib init file
Instead of using its own low level initialization file for ThreadX, the ThreadX demo has been changed to use the one provided by the ThreadX library. The initialization file from the ThreadX library, assumes some specific symbol names are present in the linker script so the script for the Corstone-300 platform, which is the only one that currently supports the ThreadX demo, has been updated accordingly. To still be able to use the HardFault_Handler from the platform target, the handler provided by the ThreadX library is marked as a weak symbol before linking. Change-Id: I757b74bc30e295bc1f7126fc5d9330e381d7a886 Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
-rw-r--r--applications/threadx_demo/CMakeLists.txt9
-rw-r--r--applications/threadx_demo/tx_initialize_low_level.c116
-rw-r--r--targets/corstone-300/platform.ld5
3 files changed, 11 insertions, 119 deletions
diff --git a/applications/threadx_demo/CMakeLists.txt b/applications/threadx_demo/CMakeLists.txt
index ef20b57..41fabdd 100644
--- a/applications/threadx_demo/CMakeLists.txt
+++ b/applications/threadx_demo/CMakeLists.txt
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2021-2022 Arm Limited.
+# SPDX-FileCopyrightText: Copyright 2021-2022, 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
#
# SPDX-License-Identifier: Apache-2.0
#
@@ -24,10 +24,15 @@ endif()
ethosu_add_executable_test(threadx_demo PRIVATE
SOURCES main.cpp
- SOURCES tx_initialize_low_level.c
LIBRARIES inference_process threadx)
target_include_directories(threadx_demo PRIVATE models/mobilenet_v2)
+# Make ThreadX's HardFault_Handler a weak symbol to use the platform target's handler instead
+add_custom_command(TARGET threadx_demo PRE_LINK
+ COMMAND ${CMAKE_OBJCOPY} -W HardFault_Handler $<TARGET_FILE:threadx>
+ DEPENDS threadx
+)
+
# Use the fast memory to support both 11.12.57 and 11.13.x release
# of the FVP
# The size is defined to force the .bss.tensor_arena to be placed in DDR
diff --git a/applications/threadx_demo/tx_initialize_low_level.c b/applications/threadx_demo/tx_initialize_low_level.c
deleted file mode 100644
index f709cb2..0000000
--- a/applications/threadx_demo/tx_initialize_low_level.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/****************************************************************************
- * Includes
- ****************************************************************************/
-#include "tx_api.h"
-#include <stdio.h>
-
-/****************************************************************************
- * Defines
- ****************************************************************************/
-#define SYSTEM_CLOCK 6000000
-#define SYSTICK_CYCLES ((SYSTEM_CLOCK / 100) - 1)
-
-/****************************************************************************
- * Externs
- ****************************************************************************/
-void _tx_timer_interrupt(void);
-
-/****************************************************************************
- * Functions
- ****************************************************************************/
-
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
-/* _tx_initialize_low_level Cortex-M4/GNU */
-/* 6.1 */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function is responsible for any low-level processor */
-/* initialization, including setting up interrupt vectors, setting */
-/* up a periodic timer interrupt source, saving the system stack */
-/* pointer for use in ISR processing later, and finding the first */
-/* available RAM memory address for tx_application_define. */
-/* this function has an empty implementation in this example. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
-/* None */
-/* */
-/* CALLS */
-/* */
-/* None */
-/* */
-/* CALLED BY */
-/* */
-/* _tx_initialize_kernel_enter ThreadX entry function */
-/* */
-/**************************************************************************/
-VOID _tx_initialize_low_level(VOID) {
- __asm__ volatile(
- /* Disable interrupts during ThreadX initialization. */
- " CPSID i\n"
- /* Enable the cycle count register. */
- " LDR r0, =0xE0001000\n" // Build address of DWT register
- " LDR r1, [r0]\n" // Pickup the current value
- " ORR r1, r1, #1\n" // Set the CYCCNTENA bit
- " STR r1, [r0]\n" // Enable the cycle count register
- /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
- " MOV r0, #0xE000E000\n" // Build address of NVIC registers
- " LDR r1, =59999\n" // 59,999 = SYSTICK_CYCLES = ((6,000,000 / 100) -1)
- " STR r1, [r0, #0x14]\n" // Setup SysTick Reload Value
- " MOV r1, #0x7\n" // Build SysTick Control Enable Value
- " STR r1, [r0, #0x10]\n" // Setup SysTick Control
- /* Configure handler priorities. */
- " LDR r1, =0x00000000\n" // Rsrv, UsgF, BusF, MemM
- " STR r1, [r0, #0xD18]\n" // Setup System Handlers 4-7 Priority Registers
- " LDR r1, =0xFF000000\n" // SVCl, Rsrv, Rsrv, Rsrv
- " STR r1, [r0, #0xD1C]\n" // Setup System Handlers 8-11 Priority Registers
- // Note: SVC must be lowest priority, which is 0xFF
- " LDR r1, =0x40FF0000\n" // SysT, PnSV, Rsrv, DbgM
- " STR r1, [r0, #0xD20]\n" // Setup System Handlers 12-15 Priority Registers
- // Note: PnSV must be lowest priority, which is 0xFF
- /* Return to caller. */
- " BX lr\n");
-}
-
-/* SysTick_Handler has a generic interrupt handler template. */
-/* to implement a new handler, replace the call to */
-/* _tx_timer_interrupt to some other c function */
-VOID SysTick_Handler(VOID) {
-#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
- _tx_execution_isr_enter(); // Call the ISR enter function
-#endif
-
- _tx_timer_interrupt();
-
-#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
- _tx_execution_isr_exit(); // Call the ISR exit function
-#endif
-
- return;
-}
diff --git a/targets/corstone-300/platform.ld b/targets/corstone-300/platform.ld
index 8d77329..f5a4c1d 100644
--- a/targets/corstone-300/platform.ld
+++ b/targets/corstone-300/platform.ld
@@ -1,5 +1,5 @@
/*
- * SPDX-FileCopyrightText: Copyright 2009-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ * SPDX-FileCopyrightText: Copyright 2009-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -134,6 +134,7 @@ SECTIONS
{
.text :
{
+ _vectors = .;
KEEP(*(.vectors))
*(.text*)
@@ -323,6 +324,8 @@ SECTIONS
} > DTCM :null
PROVIDE(__stack = __StackTop);
+ __RAM_segment_used_end__ = .;
+
/* Check if data + heap + stack exceeds DTCM limit */
ASSERT(__StackLimit >= __HeapLimit, "region DTCM overflowed with stack")
}