Add memory area to run_platform.py

Control the placement of the model and the arena for baremetal application
in SRAM/DRAM by 4 configurable options:
a. Model in SRAM and Arena in SRAM
b. Model in SRAM and Arena in DRAM
c. Model in DRAM and Arena in DRAM w/o Scratch buffer
d. Model in DRAM and Arena in DRAM with Scratch buffer in SRAM

Change-Id: Ia154be8a1c88cb13aeee62e701c2db7719a9d71c

4 files changed, 85 insertions, 23 deletions

diff --git a/scripts/run_platform.py b/scripts/run_platform.py
index a084faa..bb2f06f 100755
--- a/scripts/run_platform.py
+++ b/scripts/run_platform.py
@@ -39,14 +39,15 @@ def run_cmd(cmd, **kwargs):
     print(f"Running command: {cmd_str}")
     return subprocess.run(cmd, check=True, **kwargs)
 
-
-def build_core_platform(output_folder, target, toolchain, pmu):
+def build_core_platform(output_folder, target, toolchain, memory_model, memory_arena, pmu):
     build_folder = output_folder/"model"/"build"
     cmake_cmd = ["cmake",
                  CORE_PLATFORM_PATH/"targets"/target,
                  f"-B{build_folder}",
                  f"-DCMAKE_TOOLCHAIN_FILE={CORE_PLATFORM_PATH/'cmake'/'toolchain'/(toolchain + '.cmake')}",
-                 f"-DBAREMETAL_PATH={output_folder}"]
+                 f"-DBAREMETAL_PATH={output_folder}",
+                 f"-DMEMORY_MODEL={memory_model}",
+                 f"-DMEMORY_ARENA={memory_arena}"]
     if pmu:
         for i in range(len(pmu)):
             cmake_cmd += [f"-DETHOSU_PMU_EVENT_{i}={pmu[i]}"]
@@ -141,10 +142,12 @@ def main():
     }
     parser = argparse.ArgumentParser()
     parser.add_argument("-o", "--output-folder", type=pathlib.Path, default="output", help="Output folder for build and generated files")
-    parser.add_argument("--pmu", type=int, action='append', help="PMU Event Counters")
     parser.add_argument("--network-path", type=pathlib.Path, required=True, help="Path to .tflite file")
     parser.add_argument("--target", choices=target_mapping, default="corstone-300", help=f"Configure target")
     parser.add_argument("--toolchain", choices=["armclang", "arm-none-eabi-gcc"], default="armclang", help=f"Configure toolchain")
+    parser.add_argument("--memory_model", choices=["sram", "dram"], default="dram", help=f"Configure memory_model")
+    parser.add_argument("--memory_arena", choices=["sram", "dram"], default="sram", help=f"Configure memory_arena")
+    parser.add_argument("--pmu", type=int, action='append', help="PMU Event Counters")
     parser.add_argument("--custom-input", type=pathlib.Path, help="Custom input to network")
     parser.add_argument("--custom-output", type=pathlib.Path, help="Custom expected output data for network")
 
@@ -154,7 +157,7 @@ def main():
     try:
         optimize_network(args.output_folder, args.network_path, target_mapping[args.target])
         generate_reference_data(args.output_folder, args.network_path, args.custom_input, args.custom_output)
-        build_core_platform(args.output_folder, args.target, args.toolchain, args.pmu)
+        build_core_platform(args.output_folder, args.target, args.toolchain, args.memory_model, args.memory_arena, args.pmu)
         run_model(args.output_folder)
     except subprocess.CalledProcessError as err:
         print(f"Command: '{err.cmd}' failed", file=sys.stderr)
diff --git a/targets/corstone-300/CMakeLists.txt b/targets/corstone-300/CMakeLists.txt
index e5276fe..bd73481 100644
--- a/targets/corstone-300/CMakeLists.txt
+++ b/targets/corstone-300/CMakeLists.txt
@@ -69,10 +69,33 @@ target_compile_definitions(ethosu_target_common INTERFACE
     ETHOSU_PMU_EVENT_2=${ETHOSU_PMU_EVENT_2}
     ETHOSU_PMU_EVENT_3=${ETHOSU_PMU_EVENT_3})
 
+set(MEMORY_MODEL "dram" CACHE STRING "Memory config for model")
+set(MEMORY_ARENA "dram" CACHE STRING "Memory config for arena")
+
 target_compile_definitions(ethosu_target_common INTERFACE
     ETHOSU_NPU_TA_COUNT=${ETHOSU_TARGET_NPU_TA_COUNT}
     ETHOSU_NPU_COUNT=${ETHOSU_TARGET_NPU_COUNT})
 
+# Model memory configuration
+# For ETHOSU_MODEL: 0 - SRAM, 1 - DRAM
+if (MEMORY_MODEL STREQUAL "dram")
+    target_compile_definitions(ethosu_target_common INTERFACE
+    ETHOSU_MODEL=1)
+else()
+    target_compile_definitions(ethosu_target_common INTERFACE
+    ETHOSU_MODEL=0)
+endif()
+
+# Arena memory configuration
+# For ETHOSU_ARENA: 0 - SRAM, 1 - DRAM
+if (MEMORY_ARENA STREQUAL "dram")
+    target_compile_definitions(ethosu_target_common INTERFACE
+    ETHOSU_ARENA=1)
+else()
+    target_compile_definitions(ethosu_target_common INTERFACE
+    ETHOSU_ARENA=0)
+endif()
+
 # Linker script
 set(LINK_FILE platform CACHE STRING "Link file")
 
diff --git a/targets/corstone-300/platform.ld b/targets/corstone-300/platform.ld
index 8d44c1b..ec58acc 100644
--- a/targets/corstone-300/platform.ld
+++ b/targets/corstone-300/platform.ld
@@ -65,6 +65,16 @@
  *        memory banks.
  */
 
+#ifndef ETHOSU_MODEL
+  /* default value - '1', for DRAM */
+  #define ETHOSU_MODEL  1
+#endif
+
+#ifndef ETHOSU_ARENA
+  /* default value - '1', for DRAM */
+  #define ETHOSU_ARENA  1
+#endif
+
 __STACK_SIZE = 0x00008000;
 __HEAP_SIZE  = 0x00008000;
 
@@ -239,25 +249,32 @@ SECTIONS
   .sram.bss :
   {
     . = ALIGN(16);
-#ifdef ETHOSU_FAST_MEMORY_SIZE
-    *(.bss.ethosu_scratch);
-#else
+#if (ETHOSU_MODEL == 0)
+  * (network_model_sec)
+#endif
+
+#if (ETHOSU_ARENA == 0)
     *(.bss.tensor_arena)
 #endif
+
+    *(.bss.ethosu_scratch);
     *.(output_data_sec)
   } > SRAM :null
 
   .ddr :
   {
-#ifdef ETHOSU_FAST_MEMORY_SIZE
+#if (ETHOSU_ARENA == 1)
     . = ALIGN(16);
     *(.bss.tensor_arena)
 #endif
+
     . = ALIGN(4);
     *(input_data_sec)
     . = ALIGN(16);
+#if (ETHOSU_MODEL == 1)
     *(network_model_sec)
-    *(expected_output_data_sec)
+#endif
+    * (expected_output_data_sec)
   } > DDR :rom_dram
 
   __eddr_data = ALIGN (16) ;
diff --git a/targets/corstone-300/platform.scatter b/targets/corstone-300/platform.scatter
index 8a6bc88..fab12d1 100644
--- a/targets/corstone-300/platform.scatter
+++ b/targets/corstone-300/platform.scatter
@@ -65,6 +65,16 @@
  *        memory banks.
  */
 
+#ifndef ETHOSU_MODEL
+  /* default value - '1', for DRAM */
+  #define ETHOSU_MODEL  1
+#endif
+
+#ifndef ETHOSU_ARENA
+  /* default value - '1', for DRAM */
+  #define ETHOSU_ARENA  1
+#endif
+
 #ifndef STACK_SIZE
 #define STACK_SIZE 0x8000
 #endif
@@ -157,14 +167,20 @@ APP_IMAGE LR_START LR_SIZE
     }
 
     ; 2MB SSE-300 SRAM (3 cycles read latency) from M55/U55
-    SRAM SRAM_START UNINIT SRAM_SIZE
+    SRAM SRAM_START SRAM_SIZE
     {
-#ifndef ETHOSU_FAST_MEMORY_SIZE
-        ; Place tensor arena in SRAM if we do not have a fast memory area
+    #if (ETHOSU_MODEL == 0)
+        ; Place network model in SRAM
+        * (network_model_sec)
+    #endif
+
+    #if (ETHOSU_ARENA == 0)
+        ; Place tensor arena in SRAM
         * (.bss.tensor_arena)
-#else
-        * (.bss.ethosu_scratch)
-#endif
+    #endif
+
+    ; Place scratch buffer in SRAM
+    * (.bss.ethosu_scratch)
     }
 
     ARM_LIB_HEAP  (STACK_HEAP - STACK_SIZE - __STACKSEAL_SIZE - HEAP_SIZE) EMPTY ALIGN 8 HEAP_SIZE {}
@@ -185,19 +201,22 @@ LOAD_REGION_1 DDR_START DDR_SIZE
     {
     }
 #else //trustzone secure or non-trustzone
+    ; Place model and its affiliates in DRAM
     {
+    #if (ETHOSU_MODEL == 1)
         * (network_model_sec)
+    #endif
         * (input_data_sec)
         * (expected_output_data_sec)
         * (output_data_sec)
     }
 
-#ifdef ETHOSU_FAST_MEMORY_SIZE
-    ; Place tensor arena in DRAM if we have a fast memory area
-    ARENA +0 UNINIT ALIGN 16
-    {
-        * (.bss.tensor_arena)
-    }
-#endif
+    #if (ETHOSU_ARENA == 1)
+        ; Place tensor arena in DRAM if we have a fast memory area
+        ARENA +0 UNINIT ALIGN 16
+        {
+            * (.bss.tensor_arena)
+        }
+    #endif
 #endif
 }