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path: root/src/backends/reference/test/RefEndToEndTests.cpp
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2024-05-08IVGCVSW-8235 ScatterNd Operator Implementation (CL)Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I59fe96b0a272fa6984bfc172bf3e110476f3ce7b
2024-04-23IVGCVSW-8294 Fix quantized Conv2d TOSA mappingJohn Mcloughlin
* TosaConv2d * TosaQuantization * TosaRescale Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c7ceca1f7df62896b41a84e6a6448afd8c32b74
2024-03-12IVGCVSW-8233 ScatterNd End to End tests addedTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id89233954dd8da600c2f82e718df849b098c8af4
2024-02-09IVGCVSW-7569 GpuFsa Op: Add Reshape OperatorDeclan-ARM
* Add Reshape EndToEnd tests to all backends Signed-off-by: Declan-ARM <decmce01@arm.com> Change-Id: Ic6d07ba8de0cf3271ed0e4c6d604e070ccb968e3
2024-02-08IVGCVSW-7624 GpuFsa Op: Add Softmax operatorJohn Mcloughlin
* Added softmax operator support * Added test cases Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I51d530b110c4cb812f5aab31ad1ee4022d81d19e
2024-02-08Add and tidy up activation and elementwise binary end to end testsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9714c4c57e923ac775dcde2951de07cea35c40ee
2024-02-07IVGCVSW-7623: GpuFsa Op: Add Pool2d operatorTeresa Charlin
* Add Pool2d EndToEnd tests to all backends * Add utility functions for the attributes in a separate file * Remove some unnecessary includes Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0f82ebbf7b3301c6368462fb4fb4d4d02b246fc6
2024-01-31IVGCVSW-7568 Implement Sub ElementwiseBinary operator GpuFsaJohn Mcloughlin
* Added support for Gpu Sub operator * Added unit tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I1efaa485772a3716e3781566843bd50bd9bab811
2024-01-30IVGCVSW-7550 GpuFsa Op: Add ElementWiseBinary Operator ADDTracy Narine
* Adding support for Gpu Add operator * Added tests for layer support, end to end and optimization Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ie9328d269c5c0ff60a7e10133b728ac9265033af
2024-01-26IVGCVSW-7571 GpuFsa Op: Add Depthwise Conv2dTianle Cheng
* Added DepthwiseConv2d support for GpuFsa backend. * Updated DepthwiseConv2d End-to-End test Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I646839980d138ae235a00990c97c6e66a4418a5e
2024-01-17IVGCVSW-7344 Add LeakyRelu Activation support to TOSA Reference BackendTracy Narine
* Adding a one to many FP32 tosa mapping for Leaky Relu * Added a few utilities that are needed * Added new tests Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: If1d7c57a523961581777a244416a7346a9310803
2024-01-02Fix for Resize with align corners = true creates a memory leak when using ↵Teresa Charlin
valgrind * Add end to end unit test to CpuRef, CpuAcc and GpuAcc backends Resolves: IVGCVSW-8193 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7be226f084ec814ac72c2c9b3c47c07b3baf0aa5
2023-12-21Add Quantize Support to TOSA Ref BackendTeresa Charlin
* Adding a one to many tosa mapping for Quantize * Added tests * Resolves IVGCVSW-7175 Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia0852fefb618b4a29c2601b9de8b6b2731229801
2023-12-21Remove the 2 resize tests with align corners from RefEndToEnd.Teresa Charlin
* Relates to IVGCVSW-8193 and IVGCVSW-7346 Change-Id: Ieccee93672a5c73297c4ce69d1eaec588e858df0 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I44df03acd348532a54b66541d91610d382a222b7
2023-12-14Add Split support to TOSA Reference BackendKevin May
* Resolves IVGCVSW-7918 Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Ic2afaa55f7ee88ce4c9b8ea696eef5f28663f8c6
2023-12-13Add Resize Nearest Neighbour support to TOSA Reference BackendTeresa Charlin
* Add support for quantized data in TosaRefPreCompiledWorkloadGetOutput. * Remove extra includes from all TOSA operators headers. * Added positive and negative unit tests for resize. * Resolves: IVGCVSW-7346 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib6e30d018a7a1bf26b380fc794560aae108b26c3
2023-09-08IVGCVSW-7525 Add broadcast_to to TFLite ParserIdriss Chaouch
* Changing the optimizer * Changing EndToEnd Tests Signed-off-by: Idriss Chaouch <idriss.chaouch@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ib581794280322a39cfc5ea3c4e6a6398cf723d5e
2023-08-31IVGCVSW-7525 Add broadcast_to operatorIdriss Chaouch
Signed-off-by: Idriss Chaouch <idriss.chaouch@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I94ec5f9120b2d736fdf98d00ec5137a4efd739b8
2023-08-01Enable Slice EndToEndTests in all backends and Signed32 in CpuRefRyan OShea
* Enable SliceEndToEnd tests on CpuRef, CpuAcc, GpuAcc * Enable Signed32 support for slice in CpuRefLayerSupport Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ie9907c65dcb0eb2f2f346b22541ebfc692a109cb
2023-07-26IVGCVSW-7836 Add ReverseV2 End-to-End TestsDeclan-ARM
* create implementation header * add copyright notice * add pragma once and anonymous namespace * create network function declaration * complete body of network function * create end-to-end function declaration * complete body of end-to-end function * add references to tests for supported data types Signed-off-by: Declan-ARM <decmce01@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I376e48efd8b6ca9e0e0b05b516be599c0acdbd16
2023-07-25IVGCVSW-7887 Add TILE End to End testsCian McGriskin
* Fix error in InferOutputShapes Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: I1b38285d82d22715c6502dc63b7bab981e3258e4
2023-07-14IVGCVSW-7830 Add backend optimizations to remove Reshapes where possibleMike Kelly
* Added optimization to remove reshapes for Neon and Ref Backends by using overridden TensorInfos * Added ability to delete Subgraphs during Optimization * Fixed naming error in NeonEndToEndTests and CLEndToEndTests * Added LayerNameAndTypeCheck for testing. * Fixed error where layers were not marked as altered when removed in CLBackend Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I1ac25cd4ec9821470d961831ae2c8d24882276cc
2023-05-17IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE.John Mcloughlin
* Added 2 new operators as ElementWiseBinary ops * Ref End to End and unit tests * Serialize and Deserialize tests * Delegate and Opaque Delegate tests * TfLite Parser tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I537158127f602f0c41ca0402aa31655cd3bd4281
2023-05-08IVGCVSW-7307 Add CpuAcc Batch MatMul WorkloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I992ae9aae1174214607bf29305f21cdeaf3fdc1b
2023-03-14IVGCVSW-3808 Add ElementwiseBinaryLayerMike Kelly
!android-nn-driver:9329 * Added ElementwiseBinaryLayer that can represent all ElementwiseBinary operations including Add, Div, Sub, Maximum, Mul and Minimum. * Updated Delegate to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated Deserializer to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated OnnxParser to use ElementwiseBinaryLayer instead of the Add layer. * Updated TfLiteParser to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated CL and Neon tests to use ElementwiseBinaryLayer. * Updated CL and Neon Backend Specific Optimizations to accept ElementBinaryLayers as well as Add, Div, Mul, Sub, Maximum and Minimum layers. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I7cbb96b60eb01f0e2b57b0541016d48a08b86c75
2023-01-13IVGCVSW-7173 Add Rsqrt to Tosa Ref BackendDavid Monahan
* Added ElementwiseUnary support with a mapping for Rsqrt * Added unittests * Added Rsqrt EndtoEnd tests for all backends * Changed TosaRefLayerSupport to default to false on unsupported layers Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I3eaa9c684647ead61520a563815581aa68bee51b
2023-01-12IVGCVSW-5128 Add EndToEnd test for REDUCE_SUMTeresa Charlin
* Call Reshape EndToEnd test from 3 backends * Tidy up some naming of tests. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5546af35e89d352d3f1529368518aecc0a4a534b
2022-12-08IVGCVSW-7168 Add Conv2d and Constant support to TOSA Reference BackendMatthew Sloyan
* Added TOSA Conv2d and Constant mappings. * Added unique naming to mappings based on previous and following layers, so they are connected correctly. * Updated existing mappings with new naming convention. * Added all mappings to one main block in OptimizeSubgraphView. * Removed isMain from mapping functions. * Added Conv2d EndToEnd test. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I27c3e238407c32379ce25a1f01dad11523ef5d2b
2022-12-07IVGCVSW-6853 Rewrite BuildArmComputePermutationVector()Teresa Charlin
* Some pemutation vectors were not converted correctly. * Add Transpose end to end test. * Comments added with an example to clarify the differences betweeen Transpose and Permute Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c0954ca6ce00ef5f2a6f3625abe6f4fd27b5cdf
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-11-09IVGCVSW-7318 Support basic addition model in the TOSA Reference BackendRyan OShea
* Create Simple Addition EndtoEnd test * Create EndToEndTest file in TosaRef/test directory * Add AdditionEndToEnd test to CpuRef,CpuAcc,GpuAcc,TosaRef Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic44e2b457c25dcb41bb3b17c05cce0e74bf17a80
2022-11-01IVGCVSW-6496 Add EndToEnd Layer test for Batch MatMul WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6a541db9a602609282cc6f33af930ca141b83c41
2022-05-03IVGCVSW-6856 Add GATHERNd FrontEnd and Ref ImplementationTeresa Charlin
* Add front end * Add reference workload * Add unit tests * Add EndToEnd test Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4cebd17b18476df86162e2dda3366c10e80bd2f8
2022-02-07IVGCVSW-6698 EndToEnd tests on ref to ensure allocated data can be reusedDavid Monahan
Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I2cda579d18be765fbc2783d9fd80ff8e5372a8a8
2022-02-03IVGCVSW-6696 Add Forced Import EndToEnd tests to Ref, Neon, and CLDavid Monahan
* Created EndToEnd tests with Misaligned buffers but import is forced * Added the Aligned Tests from a previous patch to avoid merge conflicts * Previous Aligned EndToEnd test for ref has been added to backendsCommon and is now used for neon as well * Added to Ref, Neon, and Gpu Backends * Neon tests only check for copies as reconfigure has not been implemented for the Neon backend yet Signed-off-by: David Monahan <David.Monahan@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I12ddf5780201044834d6d1bbeebce60a4614efd1
2022-01-31IVGCVSW-6552 Add support of aligned host memoryNarumol Prangnawarat
* Add AllocatedData functions to OutputHandler * Enable import aligned memory in ImportInputs * Enable import aligned memory in ImportOutputs * Allow to import input and output if the memory is aligned * Implement Reconfigure function on ClConvolution2dWorkload * End-to-end test on Ref and Cl to ensure that input and output memory are imported when aligned Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718
2021-11-08IVGCVSW-6420: Constant flag in tensor info is not set correctlyCathal Corbett
!android-nn-driver:6532 !armnn-internal-tests:372451 * Made fix to 2 out of 3 ConstTensor() constructors in Tensor.hpp to throw InvalidArgumentException when TensorInfo isConstant parameter is false. * Added new ConstTensor() constructor in Tensor.cpp to accept vector<>.data() using template<typename MemoryType>. * Fixed runtime->GetOutputTensorInfo()/GetInputTensorInfo() methods and called submethods to return TensorInfo& rather than TensorInfo. * Fixed all failing unit tests for CpuRef/CpuAcc/GpuAcc to ensure any ConstTensor created has it's TensorInfo isConstant set to true. * Added unit tests in TensorTest.cpp to ensure ConstTensor constructors throw InvalidArgumentException when TensorInfo isConstat parameter is false. * Added unit test to ensure an empty ConstTensor constructor will set TensorInfo isConatant to true. * Indentation fixes. * Fix to arm_tensor.i to add isConstant parameter to TensorInfo constructor. Added methods IsConstant() and SetConstant(). * Fix to const_tensor.py to throw ValueError when TensorInfo isConstant is set to false when constructing a ConstTensor. * Fixed PyArmnn unit tests to set TensorInfo isConstant to True when ConstTensor is used. * Added unit tests in test_const_tensor.py to ensure ConstTensor constructors throw ValueError when TensorInfo isConstat parameter is false. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I44e440dd0422c366d31bbdbc77ad2b4db0bde148
2021-10-20Add ConstTensorsAsInput support for Conv3dMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteParser. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added Conv3d EndToEnd test. * Added NCDHW DataLayout and unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I10cdd354ca5f1c748730f92ffdb36bf810f83c8e
2021-10-14IVGCVSW-6416 AddFullyConnected API crashes without connected weights/bias layersCathal Corbett
* Created method in Graph.cpp/hpp ConstructErrorMessageForUnconnectedInputs() to verify weights and bias are set for FullyConnected layers. * Above method called in Graph.cpp InferTensorInfos() to print a more descriptive message when the weights or bias for a FullyConnectedLayer is not set. * Added try-catch in TestUtils.cpp Connect() to ensure input slot is available when connecting two layers. This ensures we catch the case where bias is is not enabled and we try and set a bias layer. * Added unit tests to check for LayerValidationError when weights or bias is not set on a FullyConnectedLayer. * Added unit test to check for LayerValidationError when bias is not enabled and we try and connect bias to FullyConnected Layer. * Seperated FullyConnected EndToEnd unit test method into two methods. First, performs tests on EndToEnd examples asserting output value. Second, performs tests on error catching. * Added comments to created methods. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I5207d8c5ebacfff598556742ccd4f53eef7dee0c
2021-10-08IVGCVSW-6417: Catch AddFullyConnected API error when weights TensorInfo ↵Cathal Corbett
isn't set * Updated code in Graph.cpp InferTensorInfos() to be more descriptive. * Added method VerifyConstantLayerSetTensorInfo() in Graph.cpp/hpp to error when ConstantLayer TensorInfo is not set. * Updated Optimize() in Network.cpp to call VerifyConstantLayerSetTensorInfo(). * Added unit test with ConstantLayer TensorInfo not set to catch error in VerifyConstantLayerSetTensorInfo(). * Added comments around method VerifyConstantLayerSetTensorInfo(). Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I366596243f7c5823676222e2d0cce1335bc8c325
2021-09-29IVGCVSW-3716 Add EndToEnd Layer test for Channel Shuffle WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I43d052d020f90c13688901929cd22c715471ef4f
2021-08-06IVGCVSW-6119 ConstTensorsAsInput: FullyConnectedMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Schema with IsConstant and ConstantTensorsAsInputs. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added dynamic or constant input EndToEnd tests. !android-nn-driver:5959 Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ibf3cf437df1100e4b322b0d303c575c6339f9696
2021-06-11IVGCVSW-5963 'Move unit tests to new framework'Sadik Armagan
* Used doctest in ArmNN unit tests Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ia9cf5fc72775878885c5f864abf2c56b3a935f1a
2021-05-26IVGCVSW-6009 Integrate threadpool into ExNetKevin May
* Remove concurrent flag from ExecuteNetwork as it is possible to deduce if SimultaneousIterations > 1 * Add void RunAsync() * Refactor some unit tests Change-Id: I7021d4821b0e460470908294cbd9462850e8b361 Signed-off-by: Keith Davis <keith.davis@arm.com> Signed-off-by: Kevin May <kevin.may@arm.com>
2021-05-19IVGCVSW-5964 Removing some obsolete Boost references.Colm Donelan
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Ic0a2e62e3808caf89ee429ec184d947a04340248
2021-05-06IVGCVSW-5813 Add Async Queue to IRuntimeKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Icc0d131c8ee2e9748e2f14762a75962b39c10f9d
2021-04-14IVGCVSW-5787 Add/Update Execute() implementations in RefActivationWorkloadFinn Williams
* Added multithreaded StridedSliceEndToEndTest Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I4579db7b5959e0a22256f1bda00238c22e611dec
2021-03-29IVGCVSW-5790 Merge async prototypeMike Kelly
* Added thread safe execution mechanism for armnn * Removed duplicate function bool Compare(T a, T b, float tolerance) * Added StridedSliceAsyncEndToEndTest * Fixed memory leak Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I2d367fc77ee7c01b8953138543e76af5e691211f
2021-03-25IVGCVSW-5736 and IVGCVSW-5743 'NonConstWeights: Update front-end and ↵Sadik Armagan
TfLiteDelegate support for FullyConnected Operator' * Added front-end support for non-const weights for FULLY_CONNECTED operator * Added FULLY_CONNECTED end-to-end test * Updated FULLY_CONNECTED operator support in TfLite Arm NN Delegate for non-const weights * Updated the version numbers Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iffa5b9aa9297aca4c02d923cce4636c88ac21faa
2020-07-31IVGCVSW-4712 Fill layer datatype adjustmentsTeresa Charlin
* Input layer to be int32 instead of same type as output * Enable float16 end to end tests * Neon and Cl layer support check for backend Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6bc889077c8da63eeff66bd45730ce5d8783c419
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