IVGCVSW-3808 Add ElementwiseBinaryLayer

!android-nn-driver:9329

 * Added ElementwiseBinaryLayer that can represent all ElementwiseBinary
   operations including Add, Div, Sub, Maximum, Mul and Minimum.
 * Updated Delegate to use ElementwiseBinaryLayer instead of the Add,
   Div, Sub, Maximum, Mul and Minimum layers.
 * Updated Deserializer to use ElementwiseBinaryLayer instead of the Add,
   Div, Sub, Maximum, Mul and Minimum layers.
 * Updated OnnxParser to use ElementwiseBinaryLayer instead of the Add
   layer.
 * Updated TfLiteParser to use ElementwiseBinaryLayer instead of the Add,
   Div, Sub, Maximum, Mul and Minimum layers.
 * Updated CL and Neon tests to use ElementwiseBinaryLayer.
 * Updated CL and Neon Backend Specific Optimizations to accept
   ElementBinaryLayers as well as Add, Div, Mul, Sub, Maximum and Minimum
   layers.

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I7cbb96b60eb01f0e2b57b0541016d48a08b86c75

8 files changed, 80 insertions, 10 deletions

diff --git a/include/armnn/BackendHelper.hpp b/include/armnn/BackendHelper.hpp
index cf60b01ddd..85aabe0dd2 100644
--- a/include/armnn/BackendHelper.hpp
+++ b/include/armnn/BackendHelper.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017-2019,2021-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -161,6 +161,12 @@ public:
                              const TensorInfo& output,
                              Optional<std::string&> reasonIfUnsupported = EmptyOptional());
 
+    bool IsElementwiseBinarySupported(const TensorInfo& input0,
+                                      const TensorInfo& input1,
+                                      const TensorInfo& output,
+                                      const ElementwiseBinaryDescriptor& descriptor,
+                                      Optional<std::string&> reasonIfUnsupported = EmptyOptional());
+
     bool IsElementwiseUnarySupported(const TensorInfo& input,
                                      const TensorInfo& output,
                                      const ElementwiseUnaryDescriptor& descriptor,
diff --git a/include/armnn/Descriptors.hpp b/include/armnn/Descriptors.hpp
index 7c6942ce58..9ff894f1b0 100644
--- a/include/armnn/Descriptors.hpp
+++ b/include/armnn/Descriptors.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 #pragma once
@@ -105,6 +105,26 @@ struct ComparisonDescriptor : BaseDescriptor
     ComparisonOperation m_Operation;
 };
 
+/// A ElementwiseBinaryDescriptor for the ElementwiseBinaryLayer
+struct ElementwiseBinaryDescriptor : BaseDescriptor
+{
+    ElementwiseBinaryDescriptor()
+            : ElementwiseBinaryDescriptor(BinaryOperation::Add)
+    {}
+
+    ElementwiseBinaryDescriptor(BinaryOperation operation)
+            : m_Operation(operation)
+    {}
+
+    bool operator ==(const ElementwiseBinaryDescriptor &rhs) const
+    {
+        return m_Operation == rhs.m_Operation;
+    }
+
+    /// Specifies the elementwiseBinary operation to execute
+    BinaryOperation m_Operation;
+};
+
 /// A ElementwiseUnaryDescriptor for the ElementwiseUnaryLayer
 struct ElementwiseUnaryDescriptor : BaseDescriptor
 {
diff --git a/include/armnn/DescriptorsFwd.hpp b/include/armnn/DescriptorsFwd.hpp
index 08833504bb..2c25a49f00 100644
--- a/include/armnn/DescriptorsFwd.hpp
+++ b/include/armnn/DescriptorsFwd.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -20,6 +20,7 @@ struct Convolution2dDescriptor;
 struct Convolution3dDescriptor;
 struct DepthwiseConvolution2dDescriptor;
 struct DetectionPostProcessDescriptor;
+struct ElementwiseBinaryDescriptor;
 struct ElementwiseUnaryDescriptor;
 struct FakeQuantizationDescriptor;
 struct FillDescriptor;
diff --git a/include/armnn/INetwork.hpp b/include/armnn/INetwork.hpp
index c944d09d41..4eac0cfe2a 100644
--- a/include/armnn/INetwork.hpp
+++ b/include/armnn/INetwork.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 #pragma once
@@ -349,9 +349,16 @@ public:
         const ConstTensor& anchors,
         const char* name = nullptr);
 
+    /// Add an ElementwiseBinary layer to the network.
+    /// @param name - Optional name for the layer.
+    /// @param desc - Descriptor for the elementwiseBinary operations.
+    /// @return - Interface for configuring the layer.
+    IConnectableLayer* AddElementwiseBinaryLayer(const ElementwiseBinaryDescriptor& elementwiseUnaryDescriptor,
+                                                 const char* name = nullptr);
+
     /// Add an ElementwiseUnary layer to the network.
     /// @param name - Optional name for the layer.
-    /// @param desc - Descriptor for the elementwiseUnary operation.
+    /// @param desc - Descriptor for the elementwiseUnary operations.
     /// @return - Interface for configuring the layer.
     IConnectableLayer* AddElementwiseUnaryLayer(const ElementwiseUnaryDescriptor& elementwiseUnaryDescriptor,
                                                 const char* name = nullptr);
diff --git a/include/armnn/Types.hpp b/include/armnn/Types.hpp
index 4dc613bef3..3c64e82a1e 100644
--- a/include/armnn/Types.hpp
+++ b/include/armnn/Types.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2018-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 #pragma once
@@ -133,6 +133,16 @@ enum class UnaryOperation
     Sin        = 7
 };
 
+enum class BinaryOperation
+{
+    Add     = 0,
+    Div     = 1,
+    Maximum = 2,
+    Minimum = 3,
+    Mul     = 4,
+    Sub     = 5
+};
+
 enum class PoolingAlgorithm
 {
     Max     = 0,
@@ -385,6 +395,7 @@ using InferenceTimingPair = std::pair<HighResolutionClock, HighResolutionClock>;
 
 /// This list uses X macro technique.
 /// See https://en.wikipedia.org/wiki/X_Macro for more info
+// New layers should be added at last position to minimize instability.
 #define LIST_OF_LAYER_TYPE \
     X(Activation) \
     X(Addition) \
@@ -458,8 +469,9 @@ using InferenceTimingPair = std::pair<HighResolutionClock, HighResolutionClock>;
     X(Pooling3d) \
     X(GatherNd) \
     X(BatchMatMul) \
+    X(ElementwiseBinary) \
 
-// New layers should be added at last to minimize instability.
+// New layers should be added at last position to minimize instability.
 
 /// When adding a new layer, adapt also the LastLayer enum value in the
 /// enum class LayerType below
@@ -469,7 +481,7 @@ enum class LayerType
     LIST_OF_LAYER_TYPE
 #undef X
     FirstLayer = Activation,
-    LastLayer = BatchMatMul
+    LastLayer = ElementwiseBinary
 };
 
 const char* GetLayerTypeAsCString(LayerType type);
diff --git a/include/armnn/TypesUtils.hpp b/include/armnn/TypesUtils.hpp
index 4dd5360591..fbe9e8f670 100644
--- a/include/armnn/TypesUtils.hpp
+++ b/include/armnn/TypesUtils.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2018-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 #pragma once
@@ -72,6 +72,20 @@ constexpr char const* GetComparisonOperationAsCString(ComparisonOperation operat
     }
 }
 
+constexpr char const* GetBinaryOperationAsCString(BinaryOperation operation)
+{
+    switch (operation)
+    {
+        case BinaryOperation::Add:      return "Add";
+        case BinaryOperation::Div:      return "Div";
+        case BinaryOperation::Maximum:  return "Maximum";
+        case BinaryOperation::Minimum:  return "Minimum";
+        case BinaryOperation::Mul:      return "Mul";
+        case BinaryOperation::Sub:      return "Sub";
+        default:                        return "Unknown";
+    }
+}
+
 constexpr char const* GetUnaryOperationAsCString(UnaryOperation operation)
 {
     switch (operation)
diff --git a/include/armnn/backends/WorkloadData.hpp b/include/armnn/backends/WorkloadData.hpp
index 7a0a765f8e..2abd26740a 100644
--- a/include/armnn/backends/WorkloadData.hpp
+++ b/include/armnn/backends/WorkloadData.hpp
@@ -663,6 +663,11 @@ struct ComparisonQueueDescriptor : QueueDescriptorWithParameters<ComparisonDescr
     void Validate(const WorkloadInfo& workloadInfo) const;
 };
 
+struct ElementwiseBinaryQueueDescriptor : QueueDescriptorWithParameters<ElementwiseBinaryDescriptor>
+{
+    void Validate(const WorkloadInfo& workloadInfo) const;
+};
+
 struct ElementwiseUnaryQueueDescriptor : QueueDescriptorWithParameters<ElementwiseUnaryDescriptor>
 {
     void Validate(const WorkloadInfo& workloadInfo) const;
diff --git a/include/armnnTestUtils/MockBackend.hpp b/include/armnnTestUtils/MockBackend.hpp
index e5378bf74a..05df1b46b1 100644
--- a/include/armnnTestUtils/MockBackend.hpp
+++ b/include/armnnTestUtils/MockBackend.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 #pragma once
@@ -320,6 +320,11 @@ public:
                                                     reasonIfUnsupported);
                 }
             }
+            case LayerType::ElementwiseBinary:
+            {
+                auto elementwiseDesc = *(PolymorphicDowncast<const ElementwiseBinaryDescriptor*>(&descriptor));
+                return (elementwiseDesc.m_Operation == BinaryOperation::Add);
+            }
             default:
                 return false;
         }