diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block4_fp32_bf16.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block4_fp32_bf16.hpp | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block4_fp32_bf16.hpp b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block4_fp32_bf16.hpp index 730bfd6342..ef1493b605 100644 --- a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block4_fp32_bf16.hpp +++ b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block4_fp32_bf16.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, 2023 Arm Limited. + * Copyright (c) 2021, 2023-2024 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -34,29 +34,29 @@ void interleave_block<8, 4, VLType::None, false>( "ldr x28, [%x[in], #0x0]\n" "ldr x27, [%x[in], #0x8]\n" "cmp %x[height], #0x8\n" - "add x28, x28, %x[row_offset], LSL #2\n" "ldr x26, [%x[in], #0x10]\n" "ldr x25, [%x[in], #0x18]\n" - "add x27, x27, %x[row_offset], LSL #2\n" - "add x26, x26, %x[row_offset], LSL #2\n" "ldr x24, [%x[in], #0x20]\n" "ldr x23, [%x[in], #0x28]\n" - "add x25, x25, %x[row_offset], LSL #2\n" - "add x24, x24, %x[row_offset], LSL #2\n" "ldr x22, [%x[in], #0x30]\n" "ldr x21, [%x[in], #0x38]\n" + "add x28, x28, %x[row_offset], LSL #2\n" + "add x27, x27, %x[row_offset], LSL #2\n" + "add x26, x26, %x[row_offset], LSL #2\n" + "add x25, x25, %x[row_offset], LSL #2\n" + "add x24, x24, %x[row_offset], LSL #2\n" "add x23, x23, %x[row_offset], LSL #2\n" "add x22, x22, %x[row_offset], LSL #2\n" "add x21, x21, %x[row_offset], LSL #2\n" "beq 1f\n" "cmp %x[height], #0x2\n" + "mov x21, x28\n" "csel x27, x27, x28, GE\n" "csel x26, x26, x28, GT\n" "cmp %x[height], #0x4\n" "csel x25, x25, x28, GE\n" "csel x24, x24, x28, GT\n" "cmp %x[height], #0x6\n" - "mov x21, x28\n" "csel x23, x23, x28, GE\n" "csel x22, x22, x28, GT\n" "1:" // no_pointer_adj @@ -79,36 +79,36 @@ void interleave_block<8, 4, VLType::None, false>( "prfm pldl1keep, [x21, #0x40]\n" "blt 3f\n" "2:" // Main loop head - "ldr q17, [x28], #0x10\n" - "ldr q16, [x26], #0x10\n" - ".inst 0x0ea16a37 // bfcvtn v23.4h, v17.4s\n" - ".inst 0x0ea16a16 // bfcvtn v22.4h, v16.4s\n" + "ldr q19, [x28], #0x10\n" + "ldr q18, [x26], #0x10\n" + "subs %x[width], %x[width], #0x4\n" "ldr q17, [x24], #0x10\n" "ldr q16, [x22], #0x10\n" - ".inst 0x0ea16a35 // bfcvtn v21.4h, v17.4s\n" - ".inst 0x0ea16a14 // bfcvtn v20.4h, v16.4s\n" - "ldr q19, [x27], #0x10\n" - "ldr q18, [x25], #0x10\n" - "subs %x[width], %x[width], #0x4\n" "cmp %x[width], #0x4\n" - "ldr q17, [x23], #0x10\n" - "ldr q16, [x21], #0x10\n" - ".inst 0x4ea16a77 // bfcvtn2 v23.8h, v19.4s\n" - ".inst 0x4ea16a56 // bfcvtn2 v22.8h, v18.4s\n" + "ldr q23, [x27], #0x10\n" + "ldr q22, [x25], #0x10\n" + "ldr q21, [x23], #0x10\n" + "ldr q20, [x21], #0x10\n" + ".inst 0x0ea16a73 // bfcvtn v19.4h, v19.4s\n" + ".inst 0x0ea16a52 // bfcvtn v18.4h, v18.4s\n" + ".inst 0x0ea16a31 // bfcvtn v17.4h, v17.4s\n" + ".inst 0x0ea16a10 // bfcvtn v16.4h, v16.4s\n" "prfm pldl1keep, [x28, #0x70]\n" "prfm pldl1keep, [x27, #0x70]\n" - ".inst 0x4ea16a35 // bfcvtn2 v21.8h, v17.4s\n" - ".inst 0x4ea16a14 // bfcvtn2 v20.8h, v16.4s\n" "prfm pldl1keep, [x26, #0x70]\n" "prfm pldl1keep, [x25, #0x70]\n" - "str q23, [%x[out_ptr], #0x0]\n" "prfm pldl1keep, [x24, #0x70]\n" "prfm pldl1keep, [x23, #0x70]\n" - "str q22, [%x[out_ptr], #0x10]\n" + ".inst 0x4ea16af3 // bfcvtn2 v19.8h, v23.4s\n" + ".inst 0x4ea16ad2 // bfcvtn2 v18.8h, v22.4s\n" "prfm pldl1keep, [x22, #0x70]\n" "prfm pldl1keep, [x21, #0x70]\n" - "str q21, [%x[out_ptr], #0x20]\n" - "str q20, [%x[out_ptr], #0x30]\n" + ".inst 0x4ea16ab1 // bfcvtn2 v17.8h, v21.4s\n" + ".inst 0x4ea16a90 // bfcvtn2 v16.8h, v20.4s\n" + "str q19, [%x[out_ptr], #0x0]\n" + "str q18, [%x[out_ptr], #0x10]\n" + "str q17, [%x[out_ptr], #0x20]\n" + "str q16, [%x[out_ptr], #0x30]\n" "add %x[out_ptr], %x[out_ptr], #0x40\n" "bge 2b\n" "3:" // Main loop skip @@ -150,9 +150,9 @@ void interleave_block<8, 4, VLType::None, false>( ".inst 0x0ea16a10 // bfcvtn v16.4h, v16.4s\n" ".inst 0x4ea16af3 // bfcvtn2 v19.8h, v23.4s\n" ".inst 0x4ea16ad2 // bfcvtn2 v18.8h, v22.4s\n" - "str q19, [%x[out_ptr], #0x0]\n" ".inst 0x4ea16ab1 // bfcvtn2 v17.8h, v21.4s\n" ".inst 0x4ea16a90 // bfcvtn2 v16.8h, v20.4s\n" + "str q19, [%x[out_ptr], #0x0]\n" "str q18, [%x[out_ptr], #0x10]\n" "str q17, [%x[out_ptr], #0x20]\n" "str q16, [%x[out_ptr], #0x30]\n" |