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| author | Michael Tyler <michael.tyler@arm.com> | 2023-04-12 17:43:17 +0100 |
|---|---|---|
| committer | michael.tyler <michael.tyler@arm.com> | 2023-06-05 15:57:58 +0000 |
| commit | 74921eee924625426429044decefe3673561b174 (patch) | |
| tree | 654da1a95e3d42d6af8ad1ff27bb40d77b1fd8c5 /src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp | |
| parent | df5d9878008be9b60586df97ebfff197abb5195e (diff) | |
| download | ComputeLibrary-74921eee924625426429044decefe3673561b174.tar.gz | |
Update CPU kernel implementations and guard directives
Resolves COMPMID-6023
Change-Id: I868975d14c4f98af6716726feda22405a6a4c891
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9686
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp index 74fce4ddf9..b33c4f6c2d 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/sve_transpose_interleave_1VL.hpp @@ -24,8 +24,7 @@ #pragma once -#ifdef __ARM_FEATURE_SVE - +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace { @@ -101,7 +100,6 @@ void sve_transpose_interleave_1VL(uint32_t *out, const uint32_t *in, size_t widt "bge 1b\n" "cbz %x[height], 12f\n" "6:" // Main loop skip - "7:" // Tail row loop: Head "mov x21, %x[width]\n" "cntw x20, ALL, MUL #2\n" @@ -138,7 +136,6 @@ void sve_transpose_interleave_1VL(uint32_t *out, const uint32_t *in, size_t widt "addvl %x[out], %x[out], #1\n" "bge 7b\n" "12:" // Done - : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out) : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [width] "r" (width) : "cc", "memory", "p0", "p1", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23" @@ -160,4 +157,5 @@ void Transform<1, 1, true, VLType::SVE>( ); } -#endif + +#endif // defined(ARM_COMPUTE_ENABLE_SVE) |