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authorSang-Hoon Park <sang-hoon.park@arm.com>2021-01-20 18:16:47 +0000
committerGeorgios Pinitas <georgios.pinitas@arm.com>2021-01-21 16:23:55 +0000
commit0094c023038cbb353f60e96d1301b4bb25c9e382 (patch)
tree18d0c8e312c16f82e272b959b9aca92c655a5b15
parentf47f718e87889b7d501a48e1d86b5d12b2e3f54c (diff)
downloadComputeLibrary-0094c023038cbb353f60e96d1301b4bb25c9e382.tar.gz
Add window parameter to scheduler
To support window configured outside of kernels, the parameter is added to scheduler. The existing operators pass window from kernels to preserve the current behavior. Partial Implements: COMPMID-4003 Change-Id: I4514e12fb5b0c60e4adfc1a51e53a8a5de356a0d Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4892 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
-rw-r--r--arm_compute/runtime/CPP/CPPScheduler.h4
-rw-r--r--arm_compute/runtime/IScheduler.h15
-rw-r--r--arm_compute/runtime/OMP/OMPScheduler.h5
-rw-r--r--arm_compute/runtime/SingleThreadScheduler.h5
-rw-r--r--src/runtime/CPP/CPPScheduler.cpp6
-rw-r--r--src/runtime/CPP/SingleThreadScheduler.cpp6
-rw-r--r--src/runtime/IScheduler.cpp11
-rw-r--r--src/runtime/NEON/INEOperator.cpp2
-rw-r--r--src/runtime/NEON/functions/NELogical.cpp8
-rw-r--r--src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp4
-rw-r--r--src/runtime/OMP/OMPScheduler.cpp8
-rw-r--r--src/runtime/cpu/operators/CpuConcatenate.cpp2
-rw-r--r--tests/framework/instruments/SchedulerTimer.cpp6
13 files changed, 46 insertions, 36 deletions
diff --git a/arm_compute/runtime/CPP/CPPScheduler.h b/arm_compute/runtime/CPP/CPPScheduler.h
index 764af818d9..9e8fd4174a 100644
--- a/arm_compute/runtime/CPP/CPPScheduler.h
+++ b/arm_compute/runtime/CPP/CPPScheduler.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2020 Arm Limited.
+ * Copyright (c) 2016-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -52,7 +52,7 @@ public:
void set_num_threads_with_affinity(unsigned int num_threads, BindFunc func) override;
unsigned int num_threads() const override;
void schedule(ICPPKernel *kernel, const Hints &hints) override;
- void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override;
+ void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override;
protected:
/** Will run the workloads in parallel using num_threads
diff --git a/arm_compute/runtime/IScheduler.h b/arm_compute/runtime/IScheduler.h
index 309aee3bb5..d3ba86a67b 100644
--- a/arm_compute/runtime/IScheduler.h
+++ b/arm_compute/runtime/IScheduler.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -35,6 +35,7 @@ namespace arm_compute
{
class ICPPKernel;
class ITensor;
+class Window;
/** Scheduler interface to run kernels */
class IScheduler
@@ -168,9 +169,10 @@ public:
*
* @param[in] kernel Kernel to execute.
* @param[in] hints Hints for the scheduler.
+ * @param[in] window Window to use for kernel execution.
* @param[in] tensors Vector containing the tensors to operate on.
*/
- virtual void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) = 0;
+ virtual void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) = 0;
/** Execute all the passed workloads
*
@@ -205,7 +207,14 @@ protected:
virtual void run_workloads(std::vector<Workload> &workloads) = 0;
CPUInfo _cpu_info;
- void schedule_common(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors);
+ /** Common scheduler logic to execute the given kernel
+ *
+ * @param[in] kernel Kernel to execute.
+ * @param[in] hints Hints for the scheduler.
+ * @param[in] window Window to use for kernel execution.
+ * @param[in] tensors Vector containing the tensors to operate on.
+ */
+ void schedule_common(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors);
private:
unsigned int _num_threads_hint = {};
diff --git a/arm_compute/runtime/OMP/OMPScheduler.h b/arm_compute/runtime/OMP/OMPScheduler.h
index 56a31cc076..b522b403a9 100644
--- a/arm_compute/runtime/OMP/OMPScheduler.h
+++ b/arm_compute/runtime/OMP/OMPScheduler.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -63,9 +63,10 @@ public:
*
* @param[in] kernel Kernel to execute.
* @param[in] hints Hints for the scheduler.
+ * @param[in] window Window to use for kernel execution.
* @param[in] tensors Vector containing the tensors to operate on.
*/
- void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override;
+ void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override;
protected:
/** Execute all the passed workloads
diff --git a/arm_compute/runtime/SingleThreadScheduler.h b/arm_compute/runtime/SingleThreadScheduler.h
index d45730e499..a9541d15a7 100644
--- a/arm_compute/runtime/SingleThreadScheduler.h
+++ b/arm_compute/runtime/SingleThreadScheduler.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -54,9 +54,10 @@ public:
*
* @param[in] kernel Kernel to execute.
* @param[in] hints Hints for the scheduler.
+ * @param[in] window Window to use for kernel execution.
* @param[in] tensors Vector containing the tensors to operate on.
*/
- void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override;
+ void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override;
protected:
/** Will run the workloads sequentially and in order.
diff --git a/src/runtime/CPP/CPPScheduler.cpp b/src/runtime/CPP/CPPScheduler.cpp
index e084cc6494..73e26ac187 100644
--- a/src/runtime/CPP/CPPScheduler.cpp
+++ b/src/runtime/CPP/CPPScheduler.cpp
@@ -352,14 +352,14 @@ void CPPScheduler::run_workloads(std::vector<IScheduler::Workload> &workloads)
}
#endif /* DOXYGEN_SKIP_THIS */
-void CPPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void CPPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
- schedule_common(kernel, hints, tensors);
+ schedule_common(kernel, hints, window, tensors);
}
void CPPScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
{
ITensorPack tensors;
- schedule_common(kernel, hints, tensors);
+ schedule_common(kernel, hints, kernel->window(), tensors);
}
} // namespace arm_compute
diff --git a/src/runtime/CPP/SingleThreadScheduler.cpp b/src/runtime/CPP/SingleThreadScheduler.cpp
index 96265ac757..70536b7ccc 100644
--- a/src/runtime/CPP/SingleThreadScheduler.cpp
+++ b/src/runtime/CPP/SingleThreadScheduler.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -53,12 +53,12 @@ void SingleThreadScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
kernel->run(kernel->window(), info);
}
-void SingleThreadScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void SingleThreadScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
ARM_COMPUTE_UNUSED(hints);
ThreadInfo info;
info.cpu_info = &_cpu_info;
- kernel->run_op(tensors, kernel->window(), info);
+ kernel->run_op(tensors, window, info);
}
void SingleThreadScheduler::run_workloads(std::vector<Workload> &workloads)
diff --git a/src/runtime/IScheduler.cpp b/src/runtime/IScheduler.cpp
index 43df3d5e23..eae34b98eb 100644
--- a/src/runtime/IScheduler.cpp
+++ b/src/runtime/IScheduler.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2020 Arm Limited.
+ * Copyright (c) 2016-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -55,14 +55,11 @@ unsigned int IScheduler::num_threads_hint() const
return _num_threads_hint;
}
-void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
ARM_COMPUTE_ERROR_ON_MSG(!kernel, "The child class didn't set the kernel");
- ARM_COMPUTE_UNUSED(kernel);
- ARM_COMPUTE_UNUSED(hints);
- ARM_COMPUTE_UNUSED(tensors);
#ifndef BARE_METAL
- const Window &max_window = kernel->window();
+ const Window &max_window = window;
if(hints.split_dimension() == IScheduler::split_dimensions_all)
{
/*
@@ -165,6 +162,8 @@ void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, ITensor
run_workloads(workloads);
}
}
+#else /* !BARE_METAL */
+ ARM_COMPUTE_UNUSED(kernel, hints, window, tensors);
#endif /* !BARE_METAL */
}
diff --git a/src/runtime/NEON/INEOperator.cpp b/src/runtime/NEON/INEOperator.cpp
index ff643d1c43..ccee8ffc21 100644
--- a/src/runtime/NEON/INEOperator.cpp
+++ b/src/runtime/NEON/INEOperator.cpp
@@ -44,7 +44,7 @@ void INEOperator::run(ITensorPack &tensors)
ARM_COMPUTE_ERROR("No inputs provided");
}
- NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, tensors);
+ NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, _kernel->window(), tensors);
}
void INEOperator::prepare(ITensorPack &constants)
diff --git a/src/runtime/NEON/functions/NELogical.cpp b/src/runtime/NEON/functions/NELogical.cpp
index 2c9ebd5f29..190998b042 100644
--- a/src/runtime/NEON/functions/NELogical.cpp
+++ b/src/runtime/NEON/functions/NELogical.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020 Arm Limited.
+ * Copyright (c) 2020-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -65,7 +65,7 @@ Status NELogicalAnd::validate(const ITensorInfo *input1, const ITensorInfo *inpu
void NELogicalAnd::run()
{
- NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+ NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
}
struct NELogicalOr::Impl : public LogicalArgs
@@ -98,7 +98,7 @@ Status NELogicalOr::validate(const ITensorInfo *input1, const ITensorInfo *input
void NELogicalOr::run()
{
- NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+ NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
}
struct NELogicalNot::Impl : public LogicalArgs
@@ -130,6 +130,6 @@ Status NELogicalNot::validate(const ITensorInfo *input, const ITensorInfo *outpu
void NELogicalNot::run()
{
- NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+ NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
}
} // namespace arm_compute
diff --git a/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp b/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
index 2600e2b946..427cd2eb77 100644
--- a/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
+++ b/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
@@ -78,11 +78,11 @@ void NEPoolingAssemblyDispatch::run(ITensorPack &tensors)
if(_is_global_pooling_layer)
{
- NEScheduler::get().schedule_op(_kernel.get(), Window::DimX, tensors);
+ NEScheduler::get().schedule_op(_kernel.get(), Window::DimX, _kernel->window(), tensors);
}
else
{
- NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, tensors);
+ NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, _kernel->window(), tensors);
}
}
} // namespace experimental
diff --git a/src/runtime/OMP/OMPScheduler.cpp b/src/runtime/OMP/OMPScheduler.cpp
index bf34b0114b..a8bd5a0d60 100644
--- a/src/runtime/OMP/OMPScheduler.cpp
+++ b/src/runtime/OMP/OMPScheduler.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -51,16 +51,16 @@ void OMPScheduler::set_num_threads(unsigned int num_threads)
void OMPScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
{
ITensorPack tensors;
- schedule_common(kernel, hints, tensors);
+ schedule_common(kernel, hints, kernel->window(), tensors);
}
-void OMPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void OMPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
ARM_COMPUTE_ERROR_ON_MSG(!kernel, "The child class didn't set the kernel");
ARM_COMPUTE_ERROR_ON_MSG(hints.strategy() == StrategyHint::DYNAMIC,
"Dynamic scheduling is not supported in OMPScheduler");
- const Window &max_window = kernel->window();
+ const Window &max_window = window;
const unsigned int num_iterations = max_window.num_iterations(hints.split_dimension());
const unsigned int num_threads = std::min(num_iterations, _num_threads);
diff --git a/src/runtime/cpu/operators/CpuConcatenate.cpp b/src/runtime/cpu/operators/CpuConcatenate.cpp
index 2094e65034..23eb3fceab 100644
--- a/src/runtime/cpu/operators/CpuConcatenate.cpp
+++ b/src/runtime/cpu/operators/CpuConcatenate.cpp
@@ -165,7 +165,7 @@ void CpuConcatenate::run(ITensorPack &tensors)
ITensorPack pack;
pack.add_tensor(TensorType::ACL_SRC, tensors.get_const_tensor(ACL_SRC_VEC + i));
pack.add_tensor(TensorType::ACL_DST, tensors.get_tensor(ACL_DST));
- NEScheduler::get().schedule_op(k.get(), Window::DimY, pack);
+ NEScheduler::get().schedule_op(k.get(), Window::DimY, k->window(), pack);
++i;
}
}
diff --git a/tests/framework/instruments/SchedulerTimer.cpp b/tests/framework/instruments/SchedulerTimer.cpp
index c81b807c3e..c31cd42d19 100644
--- a/tests/framework/instruments/SchedulerTimer.cpp
+++ b/tests/framework/instruments/SchedulerTimer.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -91,10 +91,10 @@ public:
_kernels.push_back(std::move(info));
}
- void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override
+ void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override
{
_timer.start();
- _real_scheduler.schedule_op(kernel, hints, tensors);
+ _real_scheduler.schedule_op(kernel, hints, window, tensors);
_timer.stop();
typename SchedulerClock<output_timestamps>::kernel_info info;