diff options
Diffstat (limited to 'source/hal/source/platform/simple/include/peripheral_memmap.h')
| -rw-r--r-- | source/hal/source/platform/simple/include/peripheral_memmap.h | 24 |
1 files changed, 4 insertions, 20 deletions
diff --git a/source/hal/source/platform/simple/include/peripheral_memmap.h b/source/hal/source/platform/simple/include/peripheral_memmap.h index 761fad9..e302e30 100644 --- a/source/hal/source/platform/simple/include/peripheral_memmap.h +++ b/source/hal/source/platform/simple/include/peripheral_memmap.h @@ -1,6 +1,6 @@ /* - * SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com> - * SPDX-License-Identifier: Apache-2.0 + * SPDX-FileCopyrightText: Copyright 2022, 2024 Arm Limited and/or its affiliates + * <open-source-office@arm.com> SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,23 +18,7 @@ #ifndef PERIPHERAL_MEMMAP_H #define PERIPHERAL_MEMMAP_H -#define DESIGN_NAME "Simple platform" - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -#define PL011_UART0_BASE (0x49303000) /* PL011 UART0 Base Address */ - -#define ETHOS_U_NPU_BASE (0x48102000) /* Ethos-U NPU base address*/ -#define ETHOS_U_NPU_TA0_BASE (0x48103000) /* Ethos-U NPU's timing adapter 0 base address */ -#define ETHOS_U_NPU_TA1_BASE (0x48103200) /* Ethos-U NPU's timing adapter 1 base address */ - -/******************************************************************************/ -/* Secure Peripheral memory map */ -/******************************************************************************/ - -#define SEC_ETHOS_U_NPU_BASE (0x58102000) /* Ethos-U NPU base address*/ -#define SEC_ETHOS_U_NPU_TA0_BASE (0x58103000) /* Ethos-U NPU's timing adapter 0 base address */ -#define SEC_ETHOS_U_NPU_TA1_BASE (0x58103200) /* Ethos-U NPU's timing adapter 1 base address */ +#define DESIGN_NAME "Simple platform" +#define PL011_UART0_BASE (0x49303000) /* PL011 UART0 Base Address */ #endif /* PERIPHERAL_MEMMAP_H */ |