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path: root/src/backends/cl/test/ClLayerTests.cpp
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2024-05-08IVGCVSW-8235 ScatterNd Operator Implementation (CL)Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I59fe96b0a272fa6984bfc172bf3e110476f3ce7b
2023-11-10IVGCVSW-7835 Add ReverseV2 CL and Neon WorkloadsTianle Cheng
* Added ReverseV2 to CL and Neon backends * Added Cl and Neon ReverseV2 Layer unit tests Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I646275c629caf17dac1950b0cd7083f23f87f387
2023-09-29IVGCVSW-8055 Add support for GELU activation function.Teresa Charlin
* Add support to CpuRef, CpuAcc and GpuAcc * Add support to tflite parser, classic and opaque tflite delegates * Add support to serializer and deserializer * Add Unit tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc60ef2ef2a051e6d9af6e15d24c46316ec19de4
2023-08-21IVGCVSW-7964 Fix UnidirectionalSequenceLstmNarumol Prangnawarat
* Fix incorrect batch size and time size * Fix incorrect time major when max time =1 * Fix incorrect permutation * Fix incorrect scratch buffer * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I510fae55528be412a58d020e82bd283852e7800b
2023-08-04IVGCVSW-2291 TILE Operator CL ImplementationCian McGriskin
* Added Tile Operator Implementation to CL * Added calls to the existing UnitTests * Added Documentation Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: If7d25c7aa669c24e7816e5d445c7a3b9ce6972d4
2023-07-10IVGCVSW-7785 3D tensors in BATCH_TO_SPACE and SPACE_TO_BATCH in CpuAcc & GpuAccTeresa Charlin
* Add Reshape layers before and after to extend support for 3D tensors, as ACL only supports 4D tensors for those layers * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4431185ce3a3b2f595d2a79bdda7095212d1c52d
2023-05-18IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAccJohn Mcloughlin
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
2023-05-08IVGCVSW-7308 Add GpuAcc Batch MatMul workloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7b7ac20deec8637dc46ca990d339d92c4587cbe4
2023-04-11IVGCVSW-7507 Pass m_Crops in BatchToSpaceND CpuAcc and GpuAcc workloadsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I902c9187eefe7595271312fdc16273f7aa3d41cd
2023-01-24IVGCVSW-7455 Workaround to allow CLBatchMatMul to parse some 4D modelsMike Kelly
* Added ability to reduce dimension sizes when calling BuildArmComputeTensorInfo or BuildArmComputeTensorShapes, this will attempt to remove leading 1s in order to squeeze the number of dimensions but retain the size. * Changed ClBatchMatMulWorkload to attempt to squeeze the number of dimensions to 3 as the CL Gemm Kernel can only support up to 3 dimensions. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I6b3d0886c5b97fdb686838fc3dc292833ddc4643
2023-01-09IVGCVSW-6493 Add GpuAcc Batch MatMul workload Fp32Teresa Charlin
* GpuAcc only supports up to 3D, so no 4D test have been added Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ie926cd45c350be624cbdc6cb27c89d2d3f60884b
2022-05-13IVGCVSW-6175 Add Pooling3d to NeonRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new NeonPooling3dWorkload header and source files * Add Pooling3d workload to NeonWorkloads.hpp * Add float32 tests for Pooling3d workload * Add Uint8 tests for Cl and NE pooling3d Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic992e1233d1eb8db52df2c8446183df1c907bc4d
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-10IVGCVSW-6861 Add GATHERNd CL workloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8ba7e56062c285c672dcaa9d13be319eb4f1fca6
2022-04-13IVGCVSW-6174 Add Cl Pooling3d WorkloadRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new ClPooling3dWorkload header and source files * Add Pooling3d workload to ClWorkloads.hpp * Add tests for Pooling3d workload * Add Pooling3d build function to ArmComputeTensorUtils Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500 Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
2022-03-03Revert "Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Cl"" This reverts commit 79cef69b1ec58f9ce010461eaaad04c896a4fe15. Reason for revert: 22.05 release. Change-Id: Id2ecbf563e8808694fb8605604e8c3c39c29cec2
2022-02-23Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Cl" This reverts commit ad9171701e6032b3ddf3573f85780bae30c512c6. Reason for revert: cannot update ACL pin until 22.02 release. !ComputeLibrary:7150 Change-Id: Ic19a3c2fe5d6f7e5568174f18ea73684b269f72d
2022-02-22IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 to ClCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I01690e6555978d93c41d09bbe5378683bc925f61
2022-02-07IVGCVSW-6635 Move MemCopyTestImpl from acl to armnnTestUtils.Colm Donelan
* Move MemCopyTestImpl.hpp from src/backends/aclCommon/test/ to include/armnnTestutils. * Refactor MemCopyTests in aclCommon, cl and Neon. * Introduce RefMemCopyTests to exercise this utility in x86 builds. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8824f013d3656658ed0a2904bb79384e3af68641
2021-12-14IVGCVSW-6453 'Move the ArmNN Test Utils code to a physically separate directory'Sadik Armagan
* Created include/armnnTestUtils directory * Moved Arm NN test utils files into armnnTestUtils directory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I03ac54c645c41c52650c4c03b6a58fb1481fef5d
2021-11-15IVGCVSW-6519 Extend pad workload for GpuAcc to support mirror paddingTeresa Charlin
* Add UnitTest for GpuAcc Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I235900dc62fb043c5ce9c8cd4f63dcc4e5393233
2021-10-27IVGCVSW-6169 Add GpuAcc Conv3d WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8b73dccc14ef71cc083896102e24afb2e56e72e2
2021-09-30IVGCVSW-6293 Add Unit test int8 Channel ShuffleTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Icf69b4c707014c5ae76425ad326bd2826381f305
2021-09-28IVGCVSW-3706 Add Channel Shuffle Workload to GpuAcc backendTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic37fc49a97a5ca570a23bc415d15ee3841534336
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf
2021-06-11IVGCVSW-5963 'Move unit tests to new framework'Sadik Armagan
* Used doctest in ArmNN unit tests Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ia9cf5fc72775878885c5f864abf2c56b3a935f1a
2021-06-02IVGCVSW-5962 Remove boost::multi_arraySadik Armagan
* Replaced all instances of boost::multi_array with flat vectors. * Updated LayerTestResult struct with new member variables. * Updated CompareTensor function to compare flat vectors and the shape. * Removed MakeTensor function from TensorHelpers.hpp. * Removed GetTensorShapeAsArray function from LayerTestResult.hpp. * Removed boost::array usage. * Removed boost::extents usages. * Removed boost::random usages. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iccde9d6640b534940292ff048fb80c00b38c4743
2021-04-22IVGCVSW-5420 'Add CL support for CAST'Sadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I1bbf1f2edf7282cb69b99e22de1b8a2fe6e443c2
2021-03-25IVGCVSW-5736 and IVGCVSW-5743 'NonConstWeights: Update front-end and ↵Sadik Armagan
TfLiteDelegate support for FullyConnected Operator' * Added front-end support for non-const weights for FULLY_CONNECTED operator * Added FULLY_CONNECTED end-to-end test * Updated FULLY_CONNECTED operator support in TfLite Arm NN Delegate for non-const weights * Updated the version numbers Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iffa5b9aa9297aca4c02d923cce4636c88ac21faa
2021-02-09MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'Sadik Armagan
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
2020-12-17IVGCVSW-4625 Add CL Rank WorkloadDavid Monahan
* Added CL implementation of Rank Workload * Removed references to memcpy_s as it's a windows only function Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia63666b9640d76a775f2ab98b3cd7e9f77b5a507
2020-11-18IVGCVSW-5092 Add CL Logical workloadJames Conroy
* Add CL Logical workloads for NOT, AND and OR. * Enable Layer and IsSupported tests on CL. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I8b7227b2487fdbbb55a4baf6e61f290313947de1
2020-11-18Fix logical vts skipNarumol Prangnawarat
* Add Boolean support for Reshape * Use LogicalUnary factory and data type for LogicalNot Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I8e072fde200b7716556ae67f79616458cf98ff20
2020-09-25IVGCVSW-4973 Enable QLstm projection unit tests on CLTeresa Charlin
*Cosmetic changes on ClQLstmWorkload Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I61f55343263e623aaae042d8dfe8c294540e98f1
2020-08-31IVGCVSW-5256 Use CreateTensorHandle() function from TensorHandleFactory in ↵Finn Williams
the tests for layers Q,R & T Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I6fc613d31785298a0b7ed18f1abdd59bafed1e8e
2020-08-31IVGCVSW-5231 Remove CreateTensorHandle in the test where there is ↵Keith Davis
NO_DEPRECATE_WARN * Done for all elementwise layers, Activation, BatchNorm, BatchToSpace Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Id1d15a0960233026aecf7a07e0d3f006e07e4abf
2020-08-31IVGCVSW-5253 Use CreateTensorHandle() function from TensorHandleFactory in ↵Finn Williams
the tests for layers M-P Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I324eee7d750e30f714e0d346b7da7b69866ff935
2020-08-31IVGCVSW-5252 Use CreateTensorHandle() function from TensorHandleFactory in ↵Finn Williams
the tests for layers between G-L Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I197351a479fb211787bd12a73c9618d2ded95898
2020-08-31IVGCVSW-5249 Use CreateTensorHandle from ITensorHandleFactory in the test ↵Keith Davis
for all layers between C-D Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I9583adf50e67e63e73833f400d1c50fbff57f60c
2020-08-31IVGCVSW-5250 Remove CreateTensorHandle in the test for layers between E-FFinn Williams
* Refactored Floor and FullyConnected tests Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Iad87254e638bdcb5d7b334b16ec87a0c981e48a0
2020-08-28IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'Sadik Armagan
* Re-factored SplaceToDepth, Splitter, Stack and StridedSlice unit tests to use TensorHandleFactory for creating TensorHandles Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ib22bb09cd2120c02c548099eaa06db6e6f00b15e
2020-08-27IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'Sadik Armagan
* Re-factored SoftmaxTestImpl to use TensorHandleFactory to create TensorHandles Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I83559a89187bbed0d6f34ca589ea81c694bf5683
2020-08-27IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'Sadik Armagan
* Re-factored SpaceToBatchNd tests to use TensorHandleFactory to create TensorHandles Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I096a6e30ecc97dd9b93b206157f16d912085703c
2020-08-27IVGCVSW-5251 'Remove CreateTensorHandle for ArgMinMaxTestImpl'Sadik Armagan
* Refactored ArgMinMax tests to use TensorHandleFactory instead of WorkloadFactory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ibff0f9370972f9a0a977c05275cb6168f8f88ae5
2020-08-26IVGCVSW-5250 Remove CreateTensorHandle in the test for layers between E-FFinn Williams
* Added new test function to pass in the ITensorHandleFactory Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I9b2e9250200e092541e29796ec53cabd0b677acf
2020-08-16IVGCVSW-5216 Remove CreateTensorHandle from TransposeTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iea9cc3a36021aac4b86ea5d8340dd8eb1f308283
2020-08-15IVGCVSW-5218 Remove CreateTensorHandle from DetectionPostProcess and PreluFrancis Murtagh
* Remove default arguments in Neon and CL causing ambiguity Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I314885719a16311b68c7bda37cd54b2ca0d14480
2020-08-10Update ACL pin to 4aed4aafa2ddb0b6f4b76aef5008c8bb45599ea4Teresa Charlin
* Use axis=-1 in all softmax tests as ACL only accepts this dimension (the most right dimension, in ACL is 0 and in ArmNN is -1). Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4be83f60aa9505b4bf2367c4489e6f12d644c6d4
2020-07-24IVGCVSW-3896 Add CL LOG_SOFTMAX WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c5704c6c7bcf1dd008061c037c81a712365aa74
generated by cgit v1.2.1 (git 2.23.0) at 2024-07-05 08:11:04 +0000