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2020-12-17IVGCVSW-5614 Enable Hard Swish and Elu activationsMatthew Sloyan
* Enabled Hard Swish and Elu in TfLiteDelegate * Added support for Elu in TfLiteParser Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: If09321b58568a98e14cabce610a1586556da041e
2020-12-17IVGCVSW-5532 Adding UnitTest fusing activationTeresa Charlin
* QASymmS8 and BoundedReLU * Float16 and ReLU in GpuAcc * Remove layerName, not needed as 1 test per combination Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I930c7a04d8d904f370f1b40c62cf9311c172bbdf
2020-12-16IVGCVSW-5595 Fix incorrect padding value for asymmetric quantized typeNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I85f0c30757043f8c27c78d607f0f9dbbdd35b9fb
2020-12-16Update ACL pin to 4d9687e70e2d71097cd43929d5f63377c3c44523Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib6d10096a5348f06d744c5629eb3b41f9c187059
2020-12-15Update ACL pin to aa51a5ba9a3f05be08b94859b53c398edee5d2e3Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ifff69c7ddce967f7a084c26837685e84f680e78a
2020-12-14Update ACL pin to ec241b48ea7481e797285788fd68e5e1d42382bbMatthew Sloyan
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I28b2eca636b5ca9156865871b60447707bfa8647
2020-12-11Sort subgraphview layers on constructionDerek Lamberti
Make it easier for backends to traverse the subgraph during optimization Change-Id: I140cb11f78bab5f19c801a5b55efffb38c63837f Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-12-10Update ACL pin to ec2256b81e6d6f655dcfbc76683738fbfeb82bccNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Idc5233a19a97a6feb42b6841e6aff9d793a88740
2020-12-09Default comparisons-files option to empty vectorDerek Lamberti
Change-Id: Iecd8d9b333fa4456d081b4787c1a5b5d0b4a2b79 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-12-09Update ACL pin to 98e33b97b92c912f058bfb3295adad1bcad3e80fNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I3c51a9a16908af2b1bc9250ada31b8ca46307fff
2020-12-08IVGCVSW-5598 ArmNN Doxygen doc needs updateJames Ward
Signed-off-by: James Ward <james.ward@arm.com> Change-Id: Iac19640fec7aabdfcbb88a0856d4fce3a15d3f27
2020-12-08IVGCVSW-5560 Fix TfLiteDelegate Reshape operator failureMatthew Sloyan
* Fixed issue when running certain models with 2D shape tensor. * Falls back to inbuilt options if encountered. * Fixed ExecuteNetwork so that error messages are logged if NULL. * Updated TfLiteDelegate docs to include Logical Operators. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: David Monahan <david.monahan@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I5dbaf30351f7fc86e6178a0caf46c152812088d3
2020-12-08IVGCVSW-5500 Fix transpose conv InferOutputShapeJames Conroy
* Use kernelShape[0] as channels for outputShape. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I070c7ff68ae365d9505a5eb28c76f9e52da1e5f9
2020-12-08Pyarmnn fix - parsers are optional extensionsNina Drozd
Signed-off-by: Nina Drozd <nina.drozd@arm.com> Change-Id: Ic999cb898933fa674f1cd3b4b85ab650154d587d
2020-12-08Update ACL pin to f7c5a41aebf8951ef783aa3d45f0bc4e98656e7bTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic4c7df887d460fd695ffec822437e0c8a5095baf
2020-12-07IVGCVSW-5381 TfLiteDelegate: Implement the Logical operatorsMatthew Sloyan
* Implemented Logical AND, NOT and OR operators. * NOT uses existing ElementwiseUnary VisitLayer function & tests. * AND/OR uses new LogicalBinary VisitLayer function & tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I5e7f1e78b30c36ac7f14c70a712b54f98d664b83
2020-12-03IVGCVSW-4626 Add Neon Rank WorkloadDavid Monahan
Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I5a85597e75d2b879ae234c6929686fabe99d7bc8
2020-12-03Update ACL pin to 96b16b65dd96351b8af1b2a785856ce13cc8ba84Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I2cafcbe087cb55e7252cbba2a7c8b649a98067e1
2020-12-03Update TF version in Cross compilation guideNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ic8efc05bfea3ac007aec03b0b6d3edd3a9e18819
2020-12-02IVGCVSW-5482 'Add a ClCompileContext parameter to each ClWorkload Constructor'Sadik Armagan
* Injected CLCompileContext object to each CL workload. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I4837dbd3d5b56cf743b3b89c944e3cdf8b11a42a
2020-11-30IVGCVSW-5587 Remove Tensorflow requirement from Arm NN TfLite delegateFinn Williams
* Added support for building the delegate with an external armnn path * Replaced potentially troublesome package manager * Explicitly set the privacy levels of delegate libraries * Fixed some error handling in ExecuteNetwork Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I2a7abc099796012cbb043c5b319f81778c9f3b56
2020-11-30IVGCVSW-5568 Revert "IVGCVSW-5563 Fix Crash on model with FullyConnected ↵Teresa Charlin
Sigmoid Activation" * This reverts commit be25d94aefe53f221304b1f5f344913b708f808b. * Add Unit Test: any receiver layer + any activation layer in float and QAsymmU8 * Tidy up fuse activation tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ie059d03b85cd17eaaafe5188bb173672a1fb9ae0
2020-11-30IVGCVSW-5374 Provide Android Build for DelegateKeith Davis
* Fix Arm Android Compiler errors Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: If5fae0fda08b6102eb46217564a096f87a3b6740
2020-11-30IVGCVSW-5393 'TfLiteDelegate: Implement the split operators'Sadik Armagan
* Added SPLIT and SPLIT_V support to armnn_delegate Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I2def9b8be783b25ef17a997e521c6027553035d3
2020-11-28Update ACL pin to ccff409625cbc721e5fc227b3617ebca01c9f47eTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifb3369a18c0348dd0cf0c1ce975cc838da87742f
2020-11-27IVGCVSW-5585 Add LICENSE file to third-party/stb libJim Flynn
Change-Id: Ifacd03d322284df6a7fa9e4ce5121b16ae8bc99f Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2020-11-27IVGCVSW-5499 Missing validation for zero strideTeresa Charlin
* Convolution * Depthwise Convolution Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I61b356fbffb176e9a05e08d9b6867d082b6712c8
2020-11-26IVGCVSW-5384 TfLiteDelegate: Implement the Gather operatorTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iaf2112363d2b191327711d8e083fee2a751c35c5
2020-11-26Bug fix TfLiteDelegate: wrong operator name in FullyConnected activationTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic52b27d462f498314050576b5195f759f5f00c63
2020-11-26IVGCVSW-5348 Update Doxygen DocuJames Ward
* update release version in Doxyfile Signed-off-by: James Ward <james.ward@arm.com> Change-Id: Iaaf06059eeba69b66b5ab211692a84c83ace9bb3
2020-11-26IVGCVSW-5457 Add How-To documentation for the TfLite DelegateJan Eilers
* Add guide.md to the delegate directory * Mentioned the guide in README.md Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Iaa373ecf28f57f4d8383489fecf43670ae8ca190
2020-11-26IVGCVSW-5481 'Add ClCompileContext to ClWorkloadFactory'Sadik Armagan
* Introduced CLCompileContext to ClWorkloadFactory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ied38f4336210502e5f518b9955ae6a5ba3d242b3
2020-11-26Doc update TfLiteDelegate: FullyConnected does not support fused activationTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ie83c3b366214ceff2366c0a20a052582749c4fa4
2020-11-25Revert "IVGCVSW-5348 Update Doxygen Docu"James Ward
This reverts commit 7435eccdf0c207eb4f688d8648a13ad29eec73a1. Reason for revert: not needed on master branch Change-Id: I5cf460b8e2db3647d774962e88285930b51903a4
2020-11-25IVGCVSW-5348 Update Doxygen DocuJames Ward
* Update Doxygen Documentation for 20.11 release Signed-off-by: James Ward <james.ward@arm.com> Change-Id: If717bd580b8a705934b2ce4c06b811195dde7fbc
2020-11-24Fix reshape delegate intermittent errorNarumol Prangnawarat
* Make sue that incorrect corrupted data from reshapeOptions is not used instead of shape from input tensor * Remove redundant check Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ib30f632b5fdb039a618234c1faae183c98033e57
2020-11-24Removing labels and replacing with links to model+labelsJakub Sujak
Change-Id: Iec6c0b7cf55e0aa3ec1f0013f2da40e93b9bbcfc Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
2020-11-24IVGCVSW-5347 Update Readme for 20.11Teresa Charlin
* Adding delegate readme.md and TensorFlowLiteDelegateSupport.md Change-Id: I1b8012440cf4cd6120902ad69c5b3a2a5e410d71 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
2020-11-23IVGCVSW-5574 Change directory for tensorflow libs for the delegateJan Eilers
* TENSORFLOW_ROOT is already in use with a different expected value Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I199987989678d8712a1f3e0a79ae066376429eec
2020-11-23IVGCVSW-5569 Fix Unittest failure while building using EthosNAcc backendNarumol Prangnawarat
* Correct the id when EthosN is enable Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I5203e615f809e56c7597ffeeec56b5ad38d4ff17
2020-11-20IVGCVSW-5538 Fix delegate DepthwiseConv2d, DIV, ReshapeNarumol Prangnawarat
* Correct filter shape for DepthwiseConv2d * Remove non-support data type * Allow check for flatten on Reshape Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ic4be63d7c2f3a2b5e13a1530025a49464c21171b
2020-11-20IVGCVSW-5559 Add int8_t to tflite delegate on ExecuteNetworkFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I56afc73d48848bc40842692831c05316484757a4
2020-11-20IVGCVSW-5544 Fix FullyConnected Delegate testsNarumol Prangnawarat
* Correct input shape Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9d1fe4c8ef32a9dfba7f7fdd6af314e9a522fce8
2020-11-20IVGCVSW-5549 Failing Transpose Conv2d Uint8 testDavid Monahan
* Changing Uint8 tests to Int8 for Delegate Transpose Conv2d * Refactor of Quantization tests to be per backend Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ic1528e1dc339030c7f1eed9f3884e99b14f389e4
2020-11-20IVGCVSW-5550 Fix failing delegate Conv2d tests for CpuAcc/GpuAccJan Eilers
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ibfd1968a622c2538bbfacf4802cd45096de59db5
2020-11-20IVGCVSW-5564 Disable INT16 delegate quant tests on ACLJames Conroy
* Since NEON/CL do not support QSYMM16 for Quantization, disabling related tests on both backends and running on CpuRef only. Change-Id: Ifbc44cdfb81f25587ef87af8c44243dd88bb25c3 Signed-off-by: James Conroy <james.conroy@arm.com>
2020-11-20IVGCVSW-5567 armnn_delegate Reshape operator failsDavid Monahan
* Changes to the reshape parser to more closely match the TfLiteParser * Added boilerplate checks to avoid potential segfaults with invalid option data * Allow fallback to checking for second input tensor if options with invalid data are passed Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I75c4683148257afc5ce18fafb0b2ac495c5ba2a0
2020-11-19IVGCVSW-5548 Fix delegate ElementwiseUnary tests for CpuAcc/GpuAccJan Eilers
* Apply new test suite structure to be able to filter for backends For ElementwiseBinary and ElementwiseUnary * Add tolerance to data comparison Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Iccabb68f316c93533e1076da5822ebc199e23739
2020-11-19IVGCVSW-5093 Remove redundant LogicalUnary functionsJames Conroy
* In favour of ElementwiseUnary functions which are the currently used code path. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I34964d2dcabd4b7ddf0b455df17c48e3c6812ee4
2020-11-19IVGCVSW-5545 Fix delegate Comparison failures on CpuAcc/GpuAccJan Eilers
* Create backend test suite structure * Add special compare function for boolean values Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I55a2ae1ac6ad21cdcdd5ae99ef56ed00fa24776f
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