IVGCVSW-5499 Missing validation for zero stride

* Convolution
* Depthwise Convolution

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I61b356fbffb176e9a05e08d9b6867d082b6712c8

5 files changed, 30 insertions, 8 deletions

diff --git a/include/armnn/Descriptors.hpp b/include/armnn/Descriptors.hpp
index ac0d585751..f023e00e93 100644
--- a/include/armnn/Descriptors.hpp
+++ b/include/armnn/Descriptors.hpp
@@ -407,8 +407,8 @@ struct Convolution2dDescriptor
         , m_PadRight(0)
         , m_PadTop(0)
         , m_PadBottom(0)
-        , m_StrideX(0)
-        , m_StrideY(0)
+        , m_StrideX(1)
+        , m_StrideY(1)
         , m_DilationX(1)
         , m_DilationY(1)
         , m_BiasEnabled(false)
@@ -459,8 +459,8 @@ struct DepthwiseConvolution2dDescriptor
         , m_PadRight(0)
         , m_PadTop(0)
         , m_PadBottom(0)
-        , m_StrideX(0)
-        , m_StrideY(0)
+        , m_StrideX(1)
+        , m_StrideY(1)
         , m_DilationX(1)
         , m_DilationY(1)
         , m_BiasEnabled(false)
diff --git a/python/pyarmnn/test/test_descriptors.py b/python/pyarmnn/test/test_descriptors.py
index b0574a14ba..663abc6ea9 100644
--- a/python/pyarmnn/test/test_descriptors.py
+++ b/python/pyarmnn/test/test_descriptors.py
@@ -94,8 +94,8 @@ def test_convolution2d_descriptor_default_values():
     assert desc.m_PadTop == 0
     assert desc.m_PadRight == 0
     assert desc.m_PadBottom == 0
-    assert desc.m_StrideX == 0
-    assert desc.m_StrideY == 0
+    assert desc.m_StrideX == 1
+    assert desc.m_StrideY == 1
     assert desc.m_DilationX == 1
     assert desc.m_DilationY == 1
     assert desc.m_BiasEnabled == False
@@ -114,8 +114,8 @@ def test_depthwise_convolution2d_descriptor_default_values():
     assert desc.m_PadTop == 0
     assert desc.m_PadRight == 0
     assert desc.m_PadBottom == 0
-    assert desc.m_StrideX == 0
-    assert desc.m_StrideY == 0
+    assert desc.m_StrideX == 1
+    assert desc.m_StrideY == 1
     assert desc.m_DilationX == 1
     assert desc.m_DilationY == 1
     assert desc.m_BiasEnabled == False
diff --git a/src/armnn/layers/Convolution2dLayer.cpp b/src/armnn/layers/Convolution2dLayer.cpp
index 26f11f3d0c..18557bf64e 100644
--- a/src/armnn/layers/Convolution2dLayer.cpp
+++ b/src/armnn/layers/Convolution2dLayer.cpp
@@ -89,6 +89,9 @@ std::vector<TensorShape> Convolution2dLayer::InferOutputShapes(const std::vector
     // If we support multiple batch dimensions in the future, then this assert will need to change.
     ARMNN_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Convolutions will always have 4D input.");
 
+    ARMNN_ASSERT( m_Param.m_StrideX > 0);
+    ARMNN_ASSERT( m_Param.m_StrideY > 0);
+
     DataLayoutIndexed dataLayoutIndex(m_Param.m_DataLayout);
 
     unsigned int inWidth = inputShape[dataLayoutIndex.GetWidthIndex()];
diff --git a/src/armnn/layers/DepthwiseConvolution2dLayer.cpp b/src/armnn/layers/DepthwiseConvolution2dLayer.cpp
index 139d268631..ff9cebafd5 100644
--- a/src/armnn/layers/DepthwiseConvolution2dLayer.cpp
+++ b/src/armnn/layers/DepthwiseConvolution2dLayer.cpp
@@ -90,6 +90,9 @@ DepthwiseConvolution2dLayer::InferOutputShapes(const std::vector<TensorShape>& i
 
     ARMNN_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Convolutions will always have 4D input.");
 
+    ARMNN_ASSERT( m_Param.m_StrideX > 0);
+    ARMNN_ASSERT( m_Param.m_StrideY > 0);
+
     DataLayoutIndexed dataLayoutIndex(m_Param.m_DataLayout);
 
     unsigned int inputBatchSize = inputShape[0];
diff --git a/src/backends/backendsCommon/WorkloadData.cpp b/src/backends/backendsCommon/WorkloadData.cpp
index 530dc48a74..d795e32e4b 100644
--- a/src/backends/backendsCommon/WorkloadData.cpp
+++ b/src/backends/backendsCommon/WorkloadData.cpp
@@ -1260,6 +1260,14 @@ void Convolution2dQueueDescriptor::Validate(const WorkloadInfo& workloadInfo) co
         ValidateBiasTensorQuantization(biasTensorInfo, inputTensorInfo, weightTensorInfo, descriptorName);
     }
 
+    if (m_Parameters.m_StrideX <= 0 || m_Parameters.m_StrideY <= 0  )
+    {
+        throw InvalidArgumentException(
+            fmt::format("{}: strideX (provided {}) and strideY (provided {}) "
+                        "cannot be either negative or 0.",
+                        descriptorName, m_Parameters.m_StrideX, m_Parameters.m_StrideY));
+    }
+
     ValidatePerAxisQuantization(inputTensorInfo,
                                 outputTensorInfo,
                                 weightTensorInfo,
@@ -1320,6 +1328,14 @@ void DepthwiseConvolution2dQueueDescriptor::Validate(const WorkloadInfo& workloa
                         descriptorName, m_Parameters.m_DilationX, m_Parameters.m_DilationX));
     }
 
+    if (m_Parameters.m_StrideX <= 0 || m_Parameters.m_StrideY <= 0  )
+    {
+        throw InvalidArgumentException(
+            fmt::format("{}: strideX (provided {}) and strideY (provided {}) "
+                        "cannot be either negative or 0.",
+                        descriptorName, m_Parameters.m_StrideX, m_Parameters.m_StrideY));
+    }
+
     const unsigned int channelIndex = (m_Parameters.m_DataLayout == DataLayout::NCHW) ? 1 : 3;
 
     // Expected weight shape: [ M, I, H, W ] - This shape does NOT depend on the data layout