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authorNarumol Prangnawarat <narumol.prangnawarat@arm.com>2019-01-31 15:31:54 +0000
committerNarumol Prangnawarat <narumol.prangnawarat@arm.com>2019-02-04 10:57:48 +0000
commitbc67cef3e3dc9e7fe9c4331495009eda48c89527 (patch)
tree6a15af84fbc5989d25213790554acbb46cda5165 /src/backends/reference/workloads/DetectionPostProcess.hpp
parentc981df3bb24df1f98c233d885e73a2ea5c6d3449 (diff)
downloadarmnn-bc67cef3e3dc9e7fe9c4331495009eda48c89527.tar.gz
IVGCVSW-2557 Ref Workload Implementation for Detection PostProcess
* implementation of DetectionPostProcessQueueDescriptor validate * add Uint8ToFloat32Workload * add implementation of Detection PostProcess functionalities * add ref workload implemenentation for float and uint8 * add layer support for Detection PostProcess in ref * unit tests Change-Id: I650461f49edbb3c533d68ef8700377af51bc3592
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diff --git a/src/backends/reference/workloads/DetectionPostProcess.hpp b/src/backends/reference/workloads/DetectionPostProcess.hpp
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+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include "armnn/Tensor.hpp"
+#include "armnn/Descriptors.hpp"
+
+namespace armnn
+{
+
+void DetectionPostProcess(const TensorInfo& boxEncodingsInfo,
+ const TensorInfo& scoresInfo,
+ const TensorInfo& anchorsInfo,
+ const TensorInfo& detectionBoxesInfo,
+ const TensorInfo& detectionClassesInfo,
+ const TensorInfo& detectionScoresInfo,
+ const TensorInfo& numDetectionsInfo,
+ const DetectionPostProcessDescriptor& desc,
+ const float* boxEncodings,
+ const float* scores,
+ const float* anchors,
+ float* detectionBoxes,
+ float* detectionClasses,
+ float* detectionScores,
+ float* numDetections);
+
+} // namespace armnn