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author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2023-11-08 14:01:27 +0000 |
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committer | TeresaARM <teresa.charlinreyes@arm.com> | 2023-11-08 23:29:27 +0000 |
commit | ed0604e69c89aeb6a34372f901fb5970db40032f (patch) | |
tree | 48383f00efd662e43d60e8f1689b35d7e8008a31 /src/armnnTfLiteParser/TfLiteParser.cpp | |
parent | 6f68ad2de312c79bddad2f07f23084f2fec06bda (diff) | |
download | armnn-ed0604e69c89aeb6a34372f901fb5970db40032f.tar.gz |
IVGCVSW-8140 Prelu restriction in quantization not needed
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic3c42db6fd87b379b42d610e0d0f56f55580268d
Diffstat (limited to 'src/armnnTfLiteParser/TfLiteParser.cpp')
-rw-r--r-- | src/armnnTfLiteParser/TfLiteParser.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/armnnTfLiteParser/TfLiteParser.cpp b/src/armnnTfLiteParser/TfLiteParser.cpp index b3f5b560eb..67591b9339 100644 --- a/src/armnnTfLiteParser/TfLiteParser.cpp +++ b/src/armnnTfLiteParser/TfLiteParser.cpp @@ -3088,7 +3088,6 @@ void TfLiteParserImpl::ParsePrelu(size_t subgraphIndex, size_t operatorIndex) } armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1}); - CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0"); layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo); auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex)); |